^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __GENERIC_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __GENERIC_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * These are the "generic" interfaces for doing new-style
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * memory-mapped or PIO accesses. Architectures may do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * their own arch-optimized versions, these just act as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * wrappers around the old-style IO register access functions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * read[bwl]/write[bwl]/in[bwl]/out[bwl]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Don't include this directly, include it from <asm/io.h>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * access or a MMIO access, these functions don't care. The info is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * encoded in the hardware mapping set up by the mapping functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * (or the cookie itself, depending on implementation and hw).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * The generic routines just encode the PIO/MMIO as part of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * cookie, and coldly assume that the MMIO IO mappings are not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * in the low address range. Architectures for which this is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * true can't use this generic implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) extern unsigned int ioread8(const void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) extern unsigned int ioread16(const void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) extern unsigned int ioread16be(const void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) extern unsigned int ioread32(const void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) extern unsigned int ioread32be(const void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) extern u64 ioread64(const void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) extern u64 ioread64be(const void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #ifdef readq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define ioread64_lo_hi ioread64_lo_hi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define ioread64_hi_lo ioread64_hi_lo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define ioread64be_lo_hi ioread64be_lo_hi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define ioread64be_hi_lo ioread64be_hi_lo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) extern u64 ioread64_lo_hi(const void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) extern u64 ioread64_hi_lo(const void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) extern u64 ioread64be_lo_hi(const void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) extern u64 ioread64be_hi_lo(const void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) extern void iowrite8(u8, void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern void iowrite16(u16, void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) extern void iowrite16be(u16, void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) extern void iowrite32(u32, void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) extern void iowrite32be(u32, void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) extern void iowrite64(u64, void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) extern void iowrite64be(u64, void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #ifdef writeq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define iowrite64_lo_hi iowrite64_lo_hi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define iowrite64_hi_lo iowrite64_hi_lo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define iowrite64be_lo_hi iowrite64be_lo_hi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define iowrite64be_hi_lo iowrite64be_hi_lo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) extern void iowrite64_lo_hi(u64 val, void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) extern void iowrite64_hi_lo(u64 val, void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) extern void iowrite64be_lo_hi(u64 val, void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) extern void iowrite64be_hi_lo(u64 val, void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * "string" versions of the above. Note that they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * use native byte ordering for the accesses (on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * the assumption that IO and memory agree on a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * byte order, and CPU byteorder is irrelevant).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * They do _not_ update the port address. If you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * want MMIO that copies stuff laid out in MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * memory across multiple ports, use "memcpy_toio()"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * and friends.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) extern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) extern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) extern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #ifdef CONFIG_HAS_IOPORT_MAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* Create a virtual mapping cookie for an IO port range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) extern void ioport_unmap(void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #ifndef ARCH_HAS_IOREMAP_WC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define ioremap_wc ioremap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #ifndef ARCH_HAS_IOREMAP_WT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define ioremap_wt ioremap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #elif defined(CONFIG_GENERIC_IOMAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #include <asm-generic/pci_iomap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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