^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __ASM_GENERIC_EXTABLE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __ASM_GENERIC_EXTABLE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * The exception table consists of pairs of addresses: the first is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * address of an instruction that is allowed to fault, and the second is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * the address at which the program should continue. No registers are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * modified, so it is entirely up to the continuation code to figure out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * what to do.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * All the routines below use bits of fixup code that are out of line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * with the main instruction path. This means when everything is well,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * we don't even have to jump over them. Further, they do not intrude
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * on our cache or tlb entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct exception_table_entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) unsigned long insn, fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct pt_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) extern int fixup_exception(struct pt_regs *regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #endif