^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * CPPC (Collaborative Processor Performance Control) methods used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * by CPUfreq drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (C) Copyright 2014, 2015 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _CPPC_ACPI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _CPPC_ACPI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <acpi/pcc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <acpi/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Support CPPCv2 and CPPCv3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define CPPC_V2_REV 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CPPC_V3_REV 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CPPC_V2_NUM_ENT 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define CPPC_V3_NUM_ENT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PCC_CMD_COMPLETE_MASK (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PCC_ERROR_MASK (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define MAX_CPC_REG_ENT 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* CPPC specific PCC commands. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define CMD_READ 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define CMD_WRITE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* Each register has the folowing format. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct cpc_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u8 descriptor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u16 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u8 space_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u8 bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u8 bit_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u8 access_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u64 __iomem address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * Each entry in the CPC table is either
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * of type ACPI_TYPE_BUFFER or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * ACPI_TYPE_INTEGER.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct cpc_register_resource {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) acpi_object_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u64 __iomem *sys_mem_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct cpc_reg reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u64 int_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) } cpc_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Container to hold the CPC details for each CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct cpc_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int num_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int cpu_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int write_cmd_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int write_cmd_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct acpi_psd_package domain_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct kobject kobj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* These are indexes into the per-cpu cpc_regs[]. Order is important. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) enum cppc_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) HIGHEST_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) NOMINAL_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) LOW_NON_LINEAR_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) LOWEST_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) GUARANTEED_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) DESIRED_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MIN_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MAX_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PERF_REDUC_TOLERANCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) TIME_WINDOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) CTR_WRAP_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) REFERENCE_CTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) DELIVERED_CTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PERF_LIMITED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) AUTO_SEL_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) AUTO_ACT_WINDOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ENERGY_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) REFERENCE_PERF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) LOWEST_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) NOMINAL_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * Categorization of registers as described
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * in the ACPI v.5.1 spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * XXX: Only filling up ones which are used by governors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * today.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct cppc_perf_caps {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u32 guaranteed_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u32 highest_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u32 nominal_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u32 lowest_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u32 lowest_nonlinear_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u32 lowest_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u32 nominal_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct cppc_perf_ctrls {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u32 max_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u32 min_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u32 desired_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct cppc_perf_fb_ctrs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u64 reference;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) u64 delivered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u64 reference_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u64 wraparound_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Per CPU container for runtime CPPC management. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct cppc_cpudata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct cppc_perf_caps perf_caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct cppc_perf_ctrls perf_ctrls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct cppc_perf_fb_ctrs perf_fb_ctrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct cpufreq_policy *cur_policy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned int shared_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) cpumask_var_t shared_cpu_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) extern int acpi_get_psd_map(struct cppc_cpudata **);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) extern unsigned int cppc_get_transition_latency(int cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) extern bool cpc_ffh_supported(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #endif /* _CPPC_ACPI_H*/
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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