^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2000 - 2020, Intel Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __ACTBL2_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __ACTBL2_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Additional ACPI Tables (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * These tables are not consumed directly by the ACPICA subsystem, but are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * included here to support device drivers and the AML disassembler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Values for description table header signatures for tables defined in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * file. Useful because they make it more difficult to inadvertently type in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * the wrong signature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define ACPI_SIG_RASF "RASF" /* RAS Feature table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * All tables must be byte-packed to match the ACPI specification, since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * the tables are provided by the system BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #pragma pack(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * Note: C bitfields are not used for this reason:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * "Bitfields are great and easy to read, but unfortunately the C language
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * does not specify the layout of bitfields in memory, which means they are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * essentially useless for dealing with packed data in on-disk formats or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * this decision was a design error in C. Ritchie could have picked an order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * and stuck with it." Norman Ramsey.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * See http://stackoverflow.com/a/1053662/41661
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * IORT - IO Remapping Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Conforms to "IO Remapping Table System Software on ARM Platforms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * Document number: ARM DEN 0049D, March 2018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct acpi_table_iort {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct acpi_table_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u32 node_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u32 node_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) u32 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * IORT subtables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct acpi_iort_node {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u16 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u8 revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) u32 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) u32 mapping_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) u32 mapping_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) char node_data[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* Values for subtable Type above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) enum acpi_iort_node_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ACPI_IORT_NODE_ITS_GROUP = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) ACPI_IORT_NODE_SMMU = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ACPI_IORT_NODE_SMMU_V3 = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ACPI_IORT_NODE_PMCG = 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct acpi_iort_id_mapping {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u32 input_base; /* Lowest value in input range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u32 id_count; /* Number of IDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u32 output_base; /* Lowest value in output range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u32 output_reference; /* A reference to the output node */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* Masks for Flags field above for IORT subtable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define ACPI_IORT_ID_SINGLE_MAPPING (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct acpi_iort_memory_access {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u32 cache_coherency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) u8 hints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u8 memory_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Values for cache_coherency field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* Masks for Hints field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define ACPI_IORT_HT_TRANSIENT (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define ACPI_IORT_HT_WRITE (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define ACPI_IORT_HT_READ (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define ACPI_IORT_HT_OVERRIDE (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* Masks for memory_flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define ACPI_IORT_MF_COHERENCY (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define ACPI_IORT_MF_ATTRIBUTES (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * IORT node specific subtables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct acpi_iort_its_group {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) u32 its_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) u32 identifiers[1]; /* GIC ITS identifier array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct acpi_iort_named_component {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) u32 node_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) u64 memory_properties; /* Memory access properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) u8 memory_address_limit; /* Memory address size limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) char device_name[1]; /* Path of namespace object */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* Masks for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define ACPI_IORT_NC_STALL_SUPPORTED (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define ACPI_IORT_NC_PASID_BITS (31<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct acpi_iort_root_complex {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) u64 memory_properties; /* Memory access properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) u32 ats_attribute;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) u32 pci_segment_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) u8 memory_address_limit; /* Memory address size limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) u8 reserved[3]; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* Values for ats_attribute field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct acpi_iort_smmu {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) u64 base_address; /* SMMU base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) u64 span; /* Length of memory range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u32 model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) u32 global_interrupt_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) u32 context_interrupt_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) u32 context_interrupt_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) u32 pmu_interrupt_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) u32 pmu_interrupt_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) u64 interrupts[1]; /* Interrupt array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* Values for Model field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* Masks for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* Global interrupt format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct acpi_iort_smmu_gsi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) u32 nsg_irpt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) u32 nsg_irpt_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u32 nsg_cfg_irpt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) u32 nsg_cfg_irpt_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) struct acpi_iort_smmu_v3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) u64 base_address; /* SMMUv3 base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) u32 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) u64 vatos_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) u32 model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u32 event_gsiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) u32 pri_gsiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) u32 gerr_gsiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u32 sync_gsiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) u32 pxm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) u32 id_mapping_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* Values for Model field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* Masks for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct acpi_iort_pmcg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) u64 page0_base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u32 overflow_gsiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) u32 node_reference;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) u64 page1_base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * IVRS - I/O Virtualization Reporting Structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * Revision 1.26, February 2009.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct acpi_table_ivrs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u32 info; /* Common virtualization info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) u64 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* Values for Info field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* IVRS subtable header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct acpi_ivrs_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) u8 type; /* Subtable type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) u16 length; /* Subtable length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) u16 device_id; /* ID of IOMMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /* Values for subtable Type above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) enum acpi_ivrs_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ACPI_IVRS_TYPE_MEMORY1 = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ACPI_IVRS_TYPE_MEMORY2 = 0x21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ACPI_IVRS_TYPE_MEMORY3 = 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* Masks for Flags field above for IVHD subtable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define ACPI_IVHD_TT_ENABLE (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define ACPI_IVHD_PASS_PW (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define ACPI_IVHD_RES_PASS_PW (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define ACPI_IVHD_ISOC (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define ACPI_IVHD_IOTLB (1<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* Masks for Flags field above for IVMD subtable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define ACPI_IVMD_UNITY (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define ACPI_IVMD_READ (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define ACPI_IVMD_WRITE (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * IVRS subtables, correspond to Type in struct acpi_ivrs_header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct acpi_ivrs_hardware_10 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct acpi_ivrs_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) u16 capability_offset; /* Offset for IOMMU control fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) u64 base_address; /* IOMMU control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u16 pci_segment_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) u16 info; /* MSI number and unit ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) u32 feature_reporting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct acpi_ivrs_hardware_11 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct acpi_ivrs_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) u16 capability_offset; /* Offset for IOMMU control fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) u64 base_address; /* IOMMU control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) u16 pci_segment_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u16 info; /* MSI number and unit ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u32 attributes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) u64 efr_register_image;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) u64 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /* Masks for Info field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * Upper two bits of the Type field are the (encoded) length of the structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) * are reserved for future use but not defined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct acpi_ivrs_de_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) u16 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) u8 data_setting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* Length of device entry is in the top two bits of Type field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define ACPI_IVHD_ENTRY_LENGTH 0xC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) /* Values for device entry Type field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) enum acpi_ivrs_device_entry_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* 4-byte device entries, all use struct acpi_ivrs_device4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ACPI_IVRS_TYPE_PAD4 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) ACPI_IVRS_TYPE_ALL = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) ACPI_IVRS_TYPE_SELECT = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ACPI_IVRS_TYPE_START = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) ACPI_IVRS_TYPE_END = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* 8-byte device entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ACPI_IVRS_TYPE_PAD8 = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ACPI_IVRS_TYPE_NOT_USED = 65,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /* Values for Data field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #define ACPI_IVHD_INIT_PASS (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #define ACPI_IVHD_EINT_PASS (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #define ACPI_IVHD_NMI_PASS (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #define ACPI_IVHD_SYSTEM_MGMT (3<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) #define ACPI_IVHD_LINT0_PASS (1<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #define ACPI_IVHD_LINT1_PASS (1<<7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) /* Types 0-4: 4-byte device entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct acpi_ivrs_device4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) struct acpi_ivrs_de_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* Types 66-67: 8-byte device entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) struct acpi_ivrs_device8a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct acpi_ivrs_de_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) u8 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) u16 used_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) u8 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /* Types 70-71: 8-byte device entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct acpi_ivrs_device8b {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct acpi_ivrs_de_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u32 extended_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /* Values for extended_data above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) #define ACPI_IVHD_ATS_DISABLED (1<<31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) /* Type 72: 8-byte device entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct acpi_ivrs_device8c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct acpi_ivrs_de_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) u8 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) u16 used_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) u8 variety;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /* Values for Variety field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) #define ACPI_IVHD_IOAPIC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #define ACPI_IVHD_HPET 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) struct acpi_ivrs_memory {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) struct acpi_ivrs_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) u16 aux_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) u64 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) u64 start_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) u64 memory_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * LPIT - Low Power Idle Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) struct acpi_table_lpit {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) /* LPIT subtable header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) struct acpi_lpit_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) u32 type; /* Subtable type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) u32 length; /* Subtable length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) u16 unique_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) /* Values for subtable Type above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) enum acpi_lpit_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* Masks for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) #define ACPI_LPIT_STATE_DISABLED (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) #define ACPI_LPIT_NO_COUNTER (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) * LPIT subtables, correspond to Type in struct acpi_lpit_header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) /* 0x00: Native C-state instruction based LPI structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) struct acpi_lpit_native {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) struct acpi_lpit_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) struct acpi_generic_address entry_trigger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) u32 residency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) u32 latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct acpi_generic_address residency_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u64 counter_frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) * MADT - Multiple APIC Description Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) * Version 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) struct acpi_table_madt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) u32 address; /* Physical address of local APIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* Masks for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) /* Values for PCATCompat flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) #define ACPI_MADT_DUAL_PIC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #define ACPI_MADT_MULTIPLE_APIC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) /* Values for MADT subtable type in struct acpi_subtable_header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) enum acpi_madt_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) ACPI_MADT_TYPE_LOCAL_APIC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) ACPI_MADT_TYPE_IO_APIC = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ACPI_MADT_TYPE_NMI_SOURCE = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) ACPI_MADT_TYPE_IO_SAPIC = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) * MADT Subtables, correspond to Type in struct acpi_subtable_header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) /* 0: Processor Local APIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) struct acpi_madt_local_apic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) u8 processor_id; /* ACPI processor id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) u8 id; /* Processor's local APIC id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) u32 lapic_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) /* 1: IO APIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) struct acpi_madt_io_apic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) u8 id; /* I/O APIC ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) u8 reserved; /* reserved - must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) u32 address; /* APIC physical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) u32 global_irq_base; /* Global system interrupt where INTI lines start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) /* 2: Interrupt Override */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) struct acpi_madt_interrupt_override {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) u8 bus; /* 0 - ISA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) u8 source_irq; /* Interrupt source (IRQ) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) u32 global_irq; /* Global system interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) u16 inti_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) /* 3: NMI Source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) struct acpi_madt_nmi_source {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) u16 inti_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) u32 global_irq; /* Global system interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /* 4: Local APIC NMI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) struct acpi_madt_local_apic_nmi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) u8 processor_id; /* ACPI processor id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) u16 inti_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) u8 lint; /* LINTn to which NMI is connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /* 5: Address Override */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct acpi_madt_local_apic_override {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) u16 reserved; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) u64 address; /* APIC physical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* 6: I/O Sapic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct acpi_madt_io_sapic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) u8 id; /* I/O SAPIC ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) u8 reserved; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) u32 global_irq_base; /* Global interrupt for SAPIC start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) u64 address; /* SAPIC physical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) /* 7: Local Sapic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct acpi_madt_local_sapic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) u8 processor_id; /* ACPI processor id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) u8 id; /* SAPIC ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) u8 eid; /* SAPIC EID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) u8 reserved[3]; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) u32 lapic_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) u32 uid; /* Numeric UID - ACPI 3.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) char uid_string[1]; /* String UID - ACPI 3.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) /* 8: Platform Interrupt Source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) struct acpi_madt_interrupt_source {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) u16 inti_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) u8 type; /* 1=PMI, 2=INIT, 3=corrected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) u8 id; /* Processor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) u8 eid; /* Processor EID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) u8 io_sapic_vector; /* Vector value for PMI interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) u32 global_irq; /* Global system interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) u32 flags; /* Interrupt Source Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) /* Masks for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) #define ACPI_MADT_CPEI_OVERRIDE (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) /* 9: Processor Local X2APIC (ACPI 4.0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) struct acpi_madt_local_x2apic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) u16 reserved; /* reserved - must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) u32 local_apic_id; /* Processor x2APIC ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) u32 lapic_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) u32 uid; /* ACPI processor UID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) /* 10: Local X2APIC NMI (ACPI 4.0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) struct acpi_madt_local_x2apic_nmi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) u16 inti_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) u32 uid; /* ACPI processor UID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) u8 lint; /* LINTn to which NMI is connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) u8 reserved[3]; /* reserved - must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) struct acpi_madt_generic_interrupt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) u16 reserved; /* reserved - must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) u32 cpu_interface_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) u32 uid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) u32 parking_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) u32 performance_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) u64 parked_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) u64 gicv_base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) u64 gich_base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) u32 vgic_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) u64 gicr_base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) u64 arm_mpidr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) u8 efficiency_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) u8 reserved2[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) u16 spe_interrupt; /* ACPI 6.3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) /* Masks for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) /* ACPI_MADT_ENABLED (1) Processor is usable if set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) struct acpi_madt_generic_distributor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) u16 reserved; /* reserved - must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) u32 gic_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) u32 global_irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) u8 reserved2[3]; /* reserved - must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) /* Values for Version field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) enum acpi_madt_gic_version {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) ACPI_MADT_GIC_VERSION_NONE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) ACPI_MADT_GIC_VERSION_V1 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) ACPI_MADT_GIC_VERSION_V2 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) ACPI_MADT_GIC_VERSION_V3 = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) ACPI_MADT_GIC_VERSION_V4 = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) /* 13: Generic MSI Frame (ACPI 5.1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) struct acpi_madt_generic_msi_frame {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) u16 reserved; /* reserved - must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) u32 msi_frame_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) u16 spi_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) u16 spi_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /* Masks for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) #define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) /* 14: Generic Redistributor (ACPI 5.1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) struct acpi_madt_generic_redistributor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) u16 reserved; /* reserved - must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) /* 15: Generic Translator (ACPI 6.0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) struct acpi_madt_generic_translator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) u16 reserved; /* reserved - must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) u32 translation_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) u32 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) * Common flags fields for MADT subtables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) /* MADT Local APIC flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) /* MADT MPS INTI flags (inti_flags) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) /* Values for MPS INTI flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) #define ACPI_MADT_POLARITY_CONFORMS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) #define ACPI_MADT_POLARITY_RESERVED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) #define ACPI_MADT_POLARITY_ACTIVE_LOW 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) #define ACPI_MADT_TRIGGER_CONFORMS (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) #define ACPI_MADT_TRIGGER_EDGE (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) #define ACPI_MADT_TRIGGER_RESERVED (2<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) #define ACPI_MADT_TRIGGER_LEVEL (3<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * MCFG - PCI Memory Mapped Configuration table and subtable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) struct acpi_table_mcfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) u8 reserved[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) /* Subtable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) struct acpi_mcfg_allocation {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) u64 address; /* Base address, processor-relative */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) u16 pci_segment; /* PCI segment group number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) u8 start_bus_number; /* Starting PCI Bus number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) u8 end_bus_number; /* Final PCI Bus number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) u32 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) * MCHI - Management Controller Host Interface Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) * Conforms to "Management Component Transport Protocol (MCTP) Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) * Interface Specification", Revision 1.0.0a, October 13, 2009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) struct acpi_table_mchi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) u8 interface_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) u8 protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) u64 protocol_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) u8 interrupt_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) u8 gpe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) u8 pci_device_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) u32 global_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) struct acpi_generic_address control_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) u8 pci_segment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) u8 pci_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) u8 pci_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) u8 pci_function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) * MPST - Memory Power State Table (ACPI 5.0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) #define ACPI_MPST_CHANNEL_INFO \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) u8 channel_id; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) u8 reserved1[3]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) u16 power_node_count; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) u16 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) /* Main table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) struct acpi_table_mpst {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) /* Memory Platform Communication Channel Info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) struct acpi_mpst_channel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) /* Memory Power Node Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) struct acpi_mpst_power_node {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) u8 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) u16 node_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) u64 range_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) u64 range_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) u32 num_power_states;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) u32 num_physical_components;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) /* Values for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) #define ACPI_MPST_ENABLED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) #define ACPI_MPST_POWER_MANAGED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) #define ACPI_MPST_HOT_PLUG_CAPABLE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) /* Memory Power State Structure (follows POWER_NODE above) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) struct acpi_mpst_power_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) u8 power_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) u8 info_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) /* Physical Component ID Structure (follows POWER_STATE above) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) struct acpi_mpst_component {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) u16 component_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) struct acpi_mpst_data_hdr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) u16 characteristics_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) struct acpi_mpst_power_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) u8 structure_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) u16 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) u32 average_power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) u32 power_saving;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) u64 exit_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) u64 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) /* Values for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) #define ACPI_MPST_PRESERVE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) #define ACPI_MPST_AUTOENTRY 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) #define ACPI_MPST_AUTOEXIT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) /* Shared Memory Region (not part of an ACPI table) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) struct acpi_mpst_shared {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) u32 signature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) u16 pcc_command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) u16 pcc_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) u32 command_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) u32 status_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) u32 power_state_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) u32 power_node_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) u64 energy_consumed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) u64 average_power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) * MSCT - Maximum System Characteristics Table (ACPI 4.0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) struct acpi_table_msct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) u32 proximity_offset; /* Location of proximity info struct(s) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) u32 max_proximity_domains; /* Max number of proximity domains */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) u32 max_clock_domains; /* Max number of clock domains */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) u64 max_address; /* Max physical address in system */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) /* subtable - Maximum Proximity Domain Information. Version 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) struct acpi_msct_proximity {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) u8 revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) u8 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) u32 range_start; /* Start of domain range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) u32 range_end; /* End of domain range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) u32 processor_capacity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) u64 memory_capacity; /* In bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) * MSDM - Microsoft Data Management table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) * November 29, 2011. Copyright 2011 Microsoft
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) /* Basic MSDM table is only the common ACPI header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) struct acpi_table_msdm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) * MTMR - MID Timer Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) * Conforms to "Simple Firmware Interface Specification",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) * Draft 0.8.2, Oct 19, 2010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) struct acpi_table_mtmr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) /* MTMR entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) struct acpi_mtmr_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) struct acpi_generic_address physical_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) u32 frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) u32 irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) * NFIT - NVDIMM Interface Table (ACPI 6.0+)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) struct acpi_table_nfit {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) u32 reserved; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) /* Subtable header for NFIT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) struct acpi_nfit_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) u16 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) u16 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) /* Values for subtable type in struct acpi_nfit_header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) enum acpi_nfit_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) ACPI_NFIT_TYPE_MEMORY_MAP = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) ACPI_NFIT_TYPE_INTERLEAVE = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) ACPI_NFIT_TYPE_SMBIOS = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) ACPI_NFIT_TYPE_CONTROL_REGION = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) ACPI_NFIT_TYPE_DATA_REGION = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) ACPI_NFIT_TYPE_CAPABILITIES = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) * NFIT Subtables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) /* 0: System Physical Address Range Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) struct acpi_nfit_system_address {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) struct acpi_nfit_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) u16 range_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) u16 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) u32 reserved; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) u32 proximity_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) u8 range_guid[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) u64 address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) u64 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) u64 memory_mapping;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) /* Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) /* Range Type GUIDs appear in the include/acuuid.h file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) /* 1: Memory Device to System Address Range Map Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) struct acpi_nfit_memory_map {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) struct acpi_nfit_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) u32 device_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) u16 physical_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) u16 region_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) u16 range_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) u16 region_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) u64 region_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) u64 region_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) u64 address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) u16 interleave_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) u16 interleave_ways;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) u16 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) u16 reserved; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) /* Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) /* 2: Interleave Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) struct acpi_nfit_interleave {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) struct acpi_nfit_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) u16 interleave_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) u16 reserved; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) u32 line_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) u32 line_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) u32 line_offset[1]; /* Variable length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) /* 3: SMBIOS Management Information Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) struct acpi_nfit_smbios {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) struct acpi_nfit_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) u32 reserved; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) u8 data[1]; /* Variable length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) /* 4: NVDIMM Control Region Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) struct acpi_nfit_control_region {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) struct acpi_nfit_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) u16 region_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) u16 vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) u16 device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) u16 revision_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) u16 subsystem_vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) u16 subsystem_device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) u16 subsystem_revision_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) u8 valid_fields;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) u8 manufacturing_location;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) u16 manufacturing_date;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) u8 reserved[2]; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) u32 serial_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) u16 code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) u16 windows;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) u64 window_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) u64 command_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) u64 command_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) u64 status_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) u64 status_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) u16 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) u8 reserved1[6]; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) /* Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) /* valid_fields bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) /* 5: NVDIMM Block Data Window Region Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) struct acpi_nfit_data_region {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) struct acpi_nfit_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) u16 region_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) u16 windows;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) u64 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) u64 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) u64 capacity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) u64 start_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) /* 6: Flush Hint Address Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) struct acpi_nfit_flush_address {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) struct acpi_nfit_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) u32 device_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) u16 hint_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) u8 reserved[6]; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) u64 hint_address[1]; /* Variable length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) /* 7: Platform Capabilities Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) struct acpi_nfit_capabilities {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) struct acpi_nfit_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) u8 highest_capability;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) u8 reserved[3]; /* Reserved, must be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) u32 capabilities;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) u32 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) /* Capabilities Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) struct nfit_device_handle {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) u32 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) /* Device handle construction and extraction macros */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) #define ACPI_NFIT_MEMORY_ID_OFFSET 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) #define ACPI_NFIT_SOCKET_ID_OFFSET 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) #define ACPI_NFIT_NODE_ID_OFFSET 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) /* Macro to construct a NFIT/NVDIMM device handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) ((dimm) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) ((node) << ACPI_NFIT_NODE_ID_OFFSET))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) /* Macros to extract individual fields from a NFIT/NVDIMM device handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) #define ACPI_NFIT_GET_MEMORY_ID(handle) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) #define ACPI_NFIT_GET_SOCKET_ID(handle) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) #define ACPI_NFIT_GET_NODE_ID(handle) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) * PCCT - Platform Communications Channel Table (ACPI 5.0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) * Version 2 (ACPI 6.2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) struct acpi_table_pcct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) u64 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) /* Values for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) #define ACPI_PCCT_DOORBELL 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) /* Values for subtable type in struct acpi_subtable_header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) enum acpi_pcct_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) * PCCT Subtables, correspond to Type in struct acpi_subtable_header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) /* 0: Generic Communications Subspace */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) struct acpi_pcct_subspace {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) u8 reserved[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) u64 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) struct acpi_generic_address doorbell_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) u64 preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) u64 write_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) u32 latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) u32 max_access_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) u16 min_turnaround_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) struct acpi_pcct_hw_reduced {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) u32 platform_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) u64 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) struct acpi_generic_address doorbell_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) u64 preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) u64 write_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) u32 latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) u32 max_access_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) u16 min_turnaround_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) struct acpi_pcct_hw_reduced_type2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) u32 platform_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) u64 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) struct acpi_generic_address doorbell_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) u64 preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) u64 write_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) u32 latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) u32 max_access_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) u16 min_turnaround_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) struct acpi_generic_address platform_ack_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) u64 ack_preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) u64 ack_write_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) struct acpi_pcct_ext_pcc_master {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) u32 platform_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) u8 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) struct acpi_generic_address doorbell_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) u64 preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) u64 write_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) u32 latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) u32 max_access_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) u32 min_turnaround_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) struct acpi_generic_address platform_ack_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) u64 ack_preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) u64 ack_set_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) u64 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) struct acpi_generic_address cmd_complete_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) u64 cmd_complete_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) struct acpi_generic_address cmd_update_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) u64 cmd_update_preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) u64 cmd_update_set_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) struct acpi_generic_address error_status_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) u64 error_status_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) struct acpi_pcct_ext_pcc_slave {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) u32 platform_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) u8 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) struct acpi_generic_address doorbell_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) u64 preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) u64 write_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) u32 latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) u32 max_access_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) u32 min_turnaround_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) struct acpi_generic_address platform_ack_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) u64 ack_preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) u64 ack_set_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) u64 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) struct acpi_generic_address cmd_complete_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) u64 cmd_complete_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) struct acpi_generic_address cmd_update_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) u64 cmd_update_preserve_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) u64 cmd_update_set_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) struct acpi_generic_address error_status_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) u64 error_status_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) /* Values for doorbell flags above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) #define ACPI_PCCT_INTERRUPT_POLARITY (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) #define ACPI_PCCT_INTERRUPT_MODE (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) * PCC memory structures (not part of the ACPI table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) /* Shared Memory Region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) struct acpi_pcct_shared_memory {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) u32 signature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) u16 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) u16 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) struct acpi_pcct_ext_pcc_shared_memory {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) u32 signature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) u32 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) * PDTT - Platform Debug Trigger Table (ACPI 6.2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) * Version 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) struct acpi_table_pdtt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) u8 trigger_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) u8 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) u32 array_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) * PDTT Communication Channel Identifier Structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) * The number of these structures is defined by trigger_count above,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) * starting at array_offset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) struct acpi_pdtt_channel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) u8 subchannel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) /* Flags for above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) #define ACPI_PDTT_RUNTIME_TRIGGER (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) #define ACPI_PDTT_WAIT_COMPLETION (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) #define ACPI_PDTT_TRIGGER_ORDER (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) * PMTT - Platform Memory Topology Table (ACPI 5.0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) struct acpi_table_pmtt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) u32 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) /* Common header for PMTT subtables that follow main table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) struct acpi_pmtt_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) u8 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) u16 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) u16 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) u16 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) /* Values for Type field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) #define ACPI_PMTT_TYPE_SOCKET 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) #define ACPI_PMTT_TYPE_CONTROLLER 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) #define ACPI_PMTT_TYPE_DIMM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) /* Values for Flags field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) #define ACPI_PMTT_TOP_LEVEL 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) #define ACPI_PMTT_PHYSICAL 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) #define ACPI_PMTT_MEMORY_TYPE 0x000C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) * PMTT subtables, correspond to Type in struct acpi_pmtt_header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) /* 0: Socket Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) struct acpi_pmtt_socket {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) struct acpi_pmtt_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) u16 socket_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) /* 1: Memory Controller subtable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) struct acpi_pmtt_controller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) struct acpi_pmtt_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) u32 read_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) u32 write_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) u32 read_bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) u32 write_bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) u16 access_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) u16 alignment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) u16 domain_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) /* 1a: Proximity Domain substructure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) struct acpi_pmtt_domain {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) u32 proximity_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) /* 2: Physical Component Identifier (DIMM) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) struct acpi_pmtt_physical_component {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) struct acpi_pmtt_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) u16 component_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) u32 memory_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) u32 bios_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) * PPTT - Processor Properties Topology Table (ACPI 6.2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) struct acpi_table_pptt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) /* Values for Type field above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) enum acpi_pptt_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) ACPI_PPTT_TYPE_PROCESSOR = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) ACPI_PPTT_TYPE_CACHE = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) ACPI_PPTT_TYPE_ID = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) ACPI_PPTT_TYPE_RESERVED = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) /* 0: Processor Hierarchy Node Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) struct acpi_pptt_processor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) u32 parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) u32 acpi_processor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) u32 number_of_priv_resources;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) /* Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) #define ACPI_PPTT_PHYSICAL_PACKAGE (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) /* 1: Cache Type Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) struct acpi_pptt_cache {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) u32 next_level_of_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) u32 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) u32 number_of_sets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) u8 associativity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) u8 attributes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) u16 line_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) /* Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) /* Masks for Attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) /* Attributes describing cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) /* 2: ID Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) struct acpi_pptt_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) struct acpi_subtable_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) u32 vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) u64 level1_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) u64 level2_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) u16 major_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) u16 minor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) u16 spin_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) * RASF - RAS Feature Table (ACPI 5.0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) struct acpi_table_rasf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) u8 channel_id[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) /* RASF Platform Communication Channel Shared Memory Region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) struct acpi_rasf_shared_memory {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) u32 signature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) u16 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) u16 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) u16 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) u8 capabilities[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) u8 set_capabilities[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) u16 num_parameter_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) u32 set_capabilities_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) /* RASF Parameter Block Structure Header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) struct acpi_rasf_parameter_block {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) u16 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) u16 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) u16 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) /* RASF Parameter Block Structure for PATROL_SCRUB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) struct acpi_rasf_patrol_scrub_parameter {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) struct acpi_rasf_parameter_block header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) u16 patrol_scrub_command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) u64 requested_address_range[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) u64 actual_address_range[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) u16 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) u8 requested_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) /* Masks for Flags and Speed fields above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) #define ACPI_RASF_SCRUBBER_RUNNING 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) #define ACPI_RASF_SPEED (7<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) #define ACPI_RASF_SPEED_SLOW (0<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) #define ACPI_RASF_SPEED_MEDIUM (4<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) #define ACPI_RASF_SPEED_FAST (7<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) /* Channel Commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) enum acpi_rasf_commands {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) ACPI_RASF_EXECUTE_RASF_COMMAND = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) /* Platform RAS Capabilities */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) enum acpi_rasf_capabiliities {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) ACPI_SW_PATROL_SCRUB_EXPOSED = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) /* Patrol Scrub Commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) enum acpi_rasf_patrol_scrub_commands {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) ACPI_RASF_GET_PATROL_PARAMETERS = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) ACPI_RASF_START_PATROL_SCRUBBER = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) ACPI_RASF_STOP_PATROL_SCRUBBER = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) /* Channel Command flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) #define ACPI_RASF_GENERATE_SCI (1<<15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) /* Status values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) enum acpi_rasf_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) ACPI_RASF_SUCCESS = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) ACPI_RASF_NOT_VALID = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) ACPI_RASF_NOT_SUPPORTED = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) ACPI_RASF_BUSY = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) ACPI_RASF_FAILED = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) ACPI_RASF_ABORTED = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) ACPI_RASF_INVALID_DATA = 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) /* Status flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) #define ACPI_RASF_COMMAND_COMPLETE (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) #define ACPI_RASF_SCI_DOORBELL (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) #define ACPI_RASF_ERROR (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) #define ACPI_RASF_STATUS (0x1F<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) * SBST - Smart Battery Specification Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) struct acpi_table_sbst {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) u32 warning_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) u32 low_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) u32 critical_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) * SDEI - Software Delegated Exception Interface Descriptor Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) * May 8th, 2017. Copyright 2017 ARM Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) struct acpi_table_sdei {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) * SDEV - Secure Devices Table (ACPI 6.2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) * Version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) struct acpi_table_sdev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) struct acpi_table_header header; /* Common ACPI table header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) struct acpi_sdev_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) u16 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) /* Values for subtable type above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) enum acpi_sdev_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) /* Values for flags above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) * SDEV subtables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) /* 0: Namespace Device Based Secure Device Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) struct acpi_sdev_namespace {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) struct acpi_sdev_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) u16 device_id_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) u16 device_id_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) u16 vendor_data_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) u16 vendor_data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) /* 1: PCIe Endpoint Device Based Device Structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) struct acpi_sdev_pcie {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) struct acpi_sdev_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) u16 segment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) u16 start_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) u16 path_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) u16 path_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) u16 vendor_data_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) u16 vendor_data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) /* 1a: PCIe Endpoint path entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) struct acpi_sdev_pcie_path {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) u8 device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) u8 function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) /* Reset to default packing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) #pragma pack()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) #endif /* __ACTBL2_H__ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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