^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * platform-pci.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Xen platform PCI device driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Authors: ssmith@xensource.com and stefano.stabellini@eu.citrix.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (c) 2005, Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (c) 2007, XenSource Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Copyright (c) 2010, Citrix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <xen/platform_pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <xen/grant_table.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <xen/xenbus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <xen/events.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <xen/hvm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <xen/xen-ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DRV_NAME "xen-platform-pci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static unsigned long platform_mmio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static unsigned long platform_mmio_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static unsigned long platform_mmiolen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static uint64_t callback_via;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static unsigned long alloc_xen_mmio(unsigned long len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) addr = platform_mmio + platform_mmio_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) platform_mmio_alloc += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) BUG_ON(platform_mmio_alloc > platform_mmiolen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static uint64_t get_callback_via(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u8 pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) irq = pdev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (irq < 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return irq; /* ISA IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) pin = pdev->pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* We don't know the GSI. Specify the PCI INTx line instead. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return ((uint64_t)0x01 << HVM_CALLBACK_VIA_TYPE_SHIFT) | /* PCI INTx identifier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ((uint64_t)pci_domain_nr(pdev->bus) << 32) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ((uint64_t)pdev->bus->number << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ((uint64_t)(pdev->devfn & 0xff) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ((uint64_t)(pin - 1) & 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static irqreturn_t do_hvm_evtchn_intr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) xen_hvm_evtchn_do_upcall();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static int xen_allocate_irq(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return request_irq(pdev->irq, do_hvm_evtchn_intr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) IRQF_NOBALANCING | IRQF_TRIGGER_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) "xen-platform-pci", pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static int platform_pci_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (xen_have_vector_callback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) err = xen_set_callback_via(callback_via);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) dev_err(dev, "platform_pci_resume failure!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static int platform_pci_probe(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) const struct pci_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) long ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) long mmio_addr, mmio_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) unsigned int max_nr_gframes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) unsigned long grant_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (!xen_domain())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) i = pci_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ioaddr = pci_resource_start(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) mmio_addr = pci_resource_start(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) mmio_len = pci_resource_len(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (mmio_addr == 0 || ioaddr == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) dev_err(&pdev->dev, "no resources found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ret = -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) goto pci_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = pci_request_region(pdev, 1, DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) goto pci_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ret = pci_request_region(pdev, 0, DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) goto mem_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) platform_mmio = mmio_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) platform_mmiolen = mmio_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (!xen_have_vector_callback) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ret = xen_allocate_irq(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) dev_warn(&pdev->dev, "request_irq failed err=%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) callback_via = get_callback_via(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ret = xen_set_callback_via(callback_via);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) dev_warn(&pdev->dev, "Unable to set the evtchn callback "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) "err=%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) max_nr_gframes = gnttab_max_grant_frames();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) grant_frames = alloc_xen_mmio(PAGE_SIZE * max_nr_gframes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ret = gnttab_setup_auto_xlat_frames(grant_frames);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) ret = gnttab_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) goto grant_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) grant_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) gnttab_free_auto_xlat_frames();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pci_release_region(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) mem_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) pci_release_region(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) pci_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const struct pci_device_id platform_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {PCI_VENDOR_ID_XEN, PCI_DEVICE_ID_XEN_PLATFORM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {0,}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static const struct dev_pm_ops platform_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .resume_noirq = platform_pci_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static struct pci_driver platform_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .probe = platform_pci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .id_table = platform_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .pm = &platform_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) builtin_pci_driver(platform_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags