Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2009, Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Author: Weidong Han <weidong.han@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/pci-acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <xen/xen.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <xen/interface/physdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <xen/interface/xen.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <asm/xen/hypervisor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/xen/hypercall.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "../pci/pci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #ifdef CONFIG_PCI_MMCONFIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/pci_x86.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) static int xen_mcfg_late(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) static bool __read_mostly pci_seg_supported = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static int xen_add_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct pci_dev *pci_dev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #ifdef CONFIG_PCI_IOV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct pci_dev *physfn = pci_dev->physfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #ifdef CONFIG_PCI_MMCONFIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	static bool pci_mcfg_reserved = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	 * Reserve MCFG areas in Xen on first invocation due to this being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	 * potentially called from inside of acpi_init immediately after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	 * MCFG table has been finally parsed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	if (!pci_mcfg_reserved) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		xen_mcfg_late();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		pci_mcfg_reserved = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	if (pci_seg_supported) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 			struct physdev_pci_device_add add;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 			uint32_t pxm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		} add_ext = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 			.add.seg = pci_domain_nr(pci_dev->bus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 			.add.bus = pci_dev->bus->number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 			.add.devfn = pci_dev->devfn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		struct physdev_pci_device_add *add = &add_ext.add;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		acpi_handle handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #ifdef CONFIG_PCI_IOV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		if (pci_dev->is_virtfn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 			add->flags = XEN_PCI_DEV_VIRTFN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			add->physfn.bus = physfn->bus->number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			add->physfn.devfn = physfn->devfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		if (pci_ari_enabled(pci_dev->bus) && PCI_SLOT(pci_dev->devfn))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			add->flags = XEN_PCI_DEV_EXTFN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		handle = ACPI_HANDLE(&pci_dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #ifdef CONFIG_PCI_IOV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		if (!handle && pci_dev->is_virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			handle = ACPI_HANDLE(physfn->bus->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		if (!handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 			 * This device was not listed in the ACPI name space at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			 * all. Try to get acpi handle of parent pci bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 			struct pci_bus *pbus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			for (pbus = pci_dev->bus; pbus; pbus = pbus->parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 				handle = acpi_pci_get_bridge_handle(pbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 				if (handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 					break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		if (handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 			acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 				unsigned long long pxm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				status = acpi_evaluate_integer(handle, "_PXM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 							       NULL, &pxm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 				if (ACPI_SUCCESS(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 					add->optarr[0] = pxm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 					add->flags |= XEN_PCI_DEV_PXM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 					break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				status = acpi_get_parent(handle, &handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			} while (ACPI_SUCCESS(status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #endif /* CONFIG_ACPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		r = HYPERVISOR_physdev_op(PHYSDEVOP_pci_device_add, add);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		if (r != -ENOSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		pci_seg_supported = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (pci_domain_nr(pci_dev->bus))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		r = -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #ifdef CONFIG_PCI_IOV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	else if (pci_dev->is_virtfn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		struct physdev_manage_pci_ext manage_pci_ext = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			.bus		= pci_dev->bus->number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			.devfn		= pci_dev->devfn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			.is_virtfn 	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			.physfn.bus	= physfn->bus->number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			.physfn.devfn	= physfn->devfn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		r = HYPERVISOR_physdev_op(PHYSDEVOP_manage_pci_add_ext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			&manage_pci_ext);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	else if (pci_ari_enabled(pci_dev->bus) && PCI_SLOT(pci_dev->devfn)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		struct physdev_manage_pci_ext manage_pci_ext = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			.bus		= pci_dev->bus->number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			.devfn		= pci_dev->devfn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			.is_extfn	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		r = HYPERVISOR_physdev_op(PHYSDEVOP_manage_pci_add_ext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			&manage_pci_ext);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		struct physdev_manage_pci manage_pci = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			.bus	= pci_dev->bus->number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			.devfn	= pci_dev->devfn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		r = HYPERVISOR_physdev_op(PHYSDEVOP_manage_pci_add,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			&manage_pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static int xen_remove_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	struct pci_dev *pci_dev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	if (pci_seg_supported) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		struct physdev_pci_device device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			.seg = pci_domain_nr(pci_dev->bus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			.bus = pci_dev->bus->number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			.devfn = pci_dev->devfn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		r = HYPERVISOR_physdev_op(PHYSDEVOP_pci_device_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 					  &device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	} else if (pci_domain_nr(pci_dev->bus))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		r = -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		struct physdev_manage_pci manage_pci = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 			.bus = pci_dev->bus->number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			.devfn = pci_dev->devfn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		r = HYPERVISOR_physdev_op(PHYSDEVOP_manage_pci_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 					  &manage_pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static int xen_pci_notifier(struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			    unsigned long action, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	int r = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	switch (action) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	case BUS_NOTIFY_ADD_DEVICE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		r = xen_add_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	case BUS_NOTIFY_DEL_DEVICE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		r = xen_remove_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	if (r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		dev_err(dev, "Failed to %s - passthrough or MSI/MSI-X might fail!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			action == BUS_NOTIFY_ADD_DEVICE ? "add" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 			(action == BUS_NOTIFY_DEL_DEVICE ? "delete" : "?"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	return NOTIFY_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static struct notifier_block device_nb = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	.notifier_call = xen_pci_notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static int __init register_xen_pci_notifier(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	if (!xen_initial_domain())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	return bus_register_notifier(&pci_bus_type, &device_nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) arch_initcall(register_xen_pci_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #ifdef CONFIG_PCI_MMCONFIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static int xen_mcfg_late(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	struct pci_mmcfg_region *cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (!xen_initial_domain())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	if ((pci_probe & PCI_PROBE_MMCONF) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	if (list_empty(&pci_mmcfg_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	/* Check whether they are in the right area. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	list_for_each_entry(cfg, &pci_mmcfg_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		struct physdev_pci_mmcfg_reserved r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		r.address = cfg->address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		r.segment = cfg->segment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		r.start_bus = cfg->start_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		r.end_bus = cfg->end_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		r.flags = XEN_PCI_MMCFG_RESERVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		rc = HYPERVISOR_physdev_op(PHYSDEVOP_pci_mmcfg_reserved, &r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		switch (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		case -ENOSYS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 			pr_warn("Failed to report MMCONFIG reservation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 				" state for %s to hypervisor"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 				" (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 				cfg->name, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #endif