Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) ST-Ericsson SA 2011-2013
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Author: Mathieu Poirier <mathieu.poirier@linaro.org> for ST-Ericsson
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/platform_data/ux500_wdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/mfd/dbx500-prcmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define WATCHDOG_TIMEOUT 600 /* 10 minutes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define WATCHDOG_MIN	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define WATCHDOG_MAX28	268435  /* 28 bit resolution in ms == 268435.455 s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define WATCHDOG_MAX32	4294967 /* 32 bit resolution in ms == 4294967.295 s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static unsigned int timeout = WATCHDOG_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) module_param(timeout, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) MODULE_PARM_DESC(timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	"Watchdog timeout in seconds. default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 				__MODULE_STRING(WATCHDOG_TIMEOUT) ".");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static bool nowayout = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) module_param(nowayout, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) MODULE_PARM_DESC(nowayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	"Watchdog cannot be stopped once started (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static int ux500_wdt_start(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	return prcmu_enable_a9wdog(PRCMU_WDOG_ALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int ux500_wdt_stop(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	return prcmu_disable_a9wdog(PRCMU_WDOG_ALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static int ux500_wdt_keepalive(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	return prcmu_kick_a9wdog(PRCMU_WDOG_ALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) static int ux500_wdt_set_timeout(struct watchdog_device *wdd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 				 unsigned int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	ux500_wdt_stop(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	ux500_wdt_start(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static const struct watchdog_info ux500_wdt_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.identity = "Ux500 WDT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.firmware_version = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static const struct watchdog_ops ux500_wdt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	.start = ux500_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	.stop  = ux500_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	.ping  = ux500_wdt_keepalive,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	.set_timeout = ux500_wdt_set_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static struct watchdog_device ux500_wdt = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	.info = &ux500_wdt_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	.ops = &ux500_wdt_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	.min_timeout = WATCHDOG_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	.max_timeout = WATCHDOG_MAX32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static int ux500_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct ux500_wdt_data *pdata = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	if (pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		if (pdata->timeout > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 			timeout = pdata->timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		if (pdata->has_28_bits_resolution)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 			ux500_wdt.max_timeout = WATCHDOG_MAX28;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	ux500_wdt.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	watchdog_set_nowayout(&ux500_wdt, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	/* disable auto off on sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	/* set HW initial value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	ret = devm_watchdog_register_device(dev, &ux500_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	dev_info(dev, "initialized\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int ux500_wdt_suspend(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			     pm_message_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if (watchdog_active(&ux500_wdt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		ux500_wdt_stop(&ux500_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		prcmu_config_a9wdog(PRCMU_WDOG_CPU1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		ux500_wdt_start(&ux500_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int ux500_wdt_resume(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (watchdog_active(&ux500_wdt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		ux500_wdt_stop(&ux500_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		ux500_wdt_start(&ux500_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define ux500_wdt_suspend NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define ux500_wdt_resume NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static struct platform_driver ux500_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	.probe		= ux500_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	.suspend	= ux500_wdt_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	.resume		= ux500_wdt_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		.name	= "ux500_wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) module_platform_driver(ux500_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MODULE_AUTHOR("Jonas Aaberg <jonas.aberg@stericsson.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MODULE_DESCRIPTION("Ux500 Watchdog Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) MODULE_ALIAS("platform:ux500_wdt");