^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Watchdog driver for TS-4800 based boards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2015 - Savoir-faire Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static bool nowayout = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) module_param(nowayout, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MODULE_PARM_DESC(nowayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) "Watchdog cannot be stopped once started (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* possible feed values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define TS4800_WDT_FEED_2S 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define TS4800_WDT_FEED_10S 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define TS4800_WDT_DISABLE 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct ts4800_wdt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct watchdog_device wdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u32 feed_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u32 feed_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * TS-4800 supports the following timeout values:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * value desc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * ---------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * 0 feed for 338ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * 1 feed for 2.706s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * 2 feed for 10.824s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * 3 disable watchdog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * Keep the regmap/timeout map ordered by timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) const int timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) const int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) } ts4800_wdt_map[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) { 2, TS4800_WDT_FEED_2S },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) { 10, TS4800_WDT_FEED_10S },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define MAX_TIMEOUT_INDEX (ARRAY_SIZE(ts4800_wdt_map) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static void ts4800_write_feed(struct ts4800_wdt *wdt, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) regmap_write(wdt->regmap, wdt->feed_offset, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static int ts4800_wdt_start(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct ts4800_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ts4800_write_feed(wdt, wdt->feed_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static int ts4800_wdt_stop(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct ts4800_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ts4800_write_feed(wdt, TS4800_WDT_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static int ts4800_wdt_set_timeout(struct watchdog_device *wdd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct ts4800_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) for (i = 0; i < MAX_TIMEOUT_INDEX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (ts4800_wdt_map[i].timeout >= timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) wdd->timeout = ts4800_wdt_map[i].timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) wdt->feed_val = ts4800_wdt_map[i].regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static const struct watchdog_ops ts4800_wdt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .start = ts4800_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .stop = ts4800_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .set_timeout = ts4800_wdt_set_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static const struct watchdog_info ts4800_wdt_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .identity = "TS-4800 Watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int ts4800_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct device_node *syscon_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct watchdog_device *wdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct ts4800_wdt *wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) syscon_np = of_parse_phandle(np, "syscon", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (!syscon_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) dev_err(dev, "no syscon property\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ret = of_property_read_u32_index(np, "syscon", 1, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dev_err(dev, "no offset in syscon\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* allocate memory for watchdog struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (!wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* set regmap and offset to know where to write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) wdt->feed_offset = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) wdt->regmap = syscon_node_to_regmap(syscon_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) of_node_put(syscon_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (IS_ERR(wdt->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_err(dev, "cannot get parent's regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return PTR_ERR(wdt->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* Initialize struct watchdog_device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) wdd = &wdt->wdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) wdd->parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) wdd->info = &ts4800_wdt_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) wdd->ops = &ts4800_wdt_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) wdd->min_timeout = ts4800_wdt_map[0].timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) wdd->max_timeout = ts4800_wdt_map[MAX_TIMEOUT_INDEX].timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) watchdog_set_drvdata(wdd, wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) watchdog_set_nowayout(wdd, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) watchdog_init_timeout(wdd, 0, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * As this watchdog supports only a few values, ts4800_wdt_set_timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * must be called to initialize timeout and feed_val with valid values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * Default to maximum timeout if none, or an invalid one, is provided in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * device tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (!wdd->timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) wdd->timeout = wdd->max_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ts4800_wdt_set_timeout(wdd, wdd->timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * The feed register is write-only, so it is not possible to determine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * watchdog's state. Disable it to be in a known state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ts4800_wdt_stop(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) ret = devm_watchdog_register_device(dev, wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) platform_set_drvdata(pdev, wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) dev_info(dev, "initialized (timeout = %d sec, nowayout = %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) wdd->timeout, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const struct of_device_id ts4800_wdt_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { .compatible = "technologic,ts4800-wdt", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MODULE_DEVICE_TABLE(of, ts4800_wdt_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static struct platform_driver ts4800_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .probe = ts4800_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .name = "ts4800_wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .of_match_table = ts4800_wdt_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) module_platform_driver(ts4800_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MODULE_AUTHOR("Damien Riegel <damien.riegel@savoirfairelinux.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) MODULE_ALIAS("platform:ts4800_wdt");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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