^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // Copyright (C) STMicroelectronics 2018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/mfd/stpmic1.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* WATCHDOG CONTROL REGISTER bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define WDT_START BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define WDT_PING BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define WDT_START_MASK BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define WDT_PING_MASK BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define WDT_STOP 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PMIC_WDT_MIN_TIMEOUT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PMIC_WDT_MAX_TIMEOUT 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PMIC_WDT_DEFAULT_TIMEOUT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static bool nowayout = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) module_param(nowayout, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct stpmic1_wdt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct stpmic1 *pmic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct watchdog_device wdtdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static int pmic_wdt_start(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct stpmic1_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) return regmap_update_bits(wdt->pmic->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) WCHDG_CR, WDT_START_MASK, WDT_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int pmic_wdt_stop(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct stpmic1_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return regmap_update_bits(wdt->pmic->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) WCHDG_CR, WDT_START_MASK, WDT_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int pmic_wdt_ping(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct stpmic1_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return regmap_update_bits(wdt->pmic->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) WCHDG_CR, WDT_PING_MASK, WDT_PING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int pmic_wdt_set_timeout(struct watchdog_device *wdd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct stpmic1_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) wdd->timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* timeout is equal to register value + 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return regmap_write(wdt->pmic->regmap, WCHDG_TIMER_CR, timeout - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static const struct watchdog_info pmic_watchdog_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .identity = "STPMIC1 PMIC Watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static const struct watchdog_ops pmic_watchdog_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .start = pmic_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .stop = pmic_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .ping = pmic_wdt_ping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .set_timeout = pmic_wdt_set_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int pmic_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct stpmic1 *pmic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct stpmic1_wdt *wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (!dev->parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) pmic = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (!pmic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) wdt = devm_kzalloc(dev, sizeof(struct stpmic1_wdt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (!wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) wdt->pmic = pmic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) wdt->wdtdev.info = &pmic_watchdog_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) wdt->wdtdev.ops = &pmic_watchdog_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) wdt->wdtdev.min_timeout = PMIC_WDT_MIN_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) wdt->wdtdev.max_timeout = PMIC_WDT_MAX_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) wdt->wdtdev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) wdt->wdtdev.timeout = PMIC_WDT_DEFAULT_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) watchdog_init_timeout(&wdt->wdtdev, 0, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) watchdog_set_nowayout(&wdt->wdtdev, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) watchdog_set_drvdata(&wdt->wdtdev, wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ret = devm_watchdog_register_device(dev, &wdt->wdtdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) dev_dbg(wdt->pmic->dev, "PMIC Watchdog driver probed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static const struct of_device_id of_pmic_wdt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { .compatible = "st,stpmic1-wdt" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) MODULE_DEVICE_TABLE(of, of_pmic_wdt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static struct platform_driver stpmic1_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .probe = pmic_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .name = "stpmic1-wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .of_match_table = of_pmic_wdt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) module_platform_driver(stpmic1_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MODULE_DESCRIPTION("Watchdog driver for STPMIC1 device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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