^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ST's LPC Watchdog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2014 STMicroelectronics -- All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: David Paris <david.paris@st.com> for STMicroelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Lee Jones <lee.jones@linaro.org> for STMicroelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <dt-bindings/mfd/st-lpc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* Low Power Alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LPC_LPA_LSB_OFF 0x410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define LPC_LPA_START_OFF 0x418
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* LPC as WDT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LPC_WDT_OFF 0x510
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static struct watchdog_device st_wdog_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct st_wdog_syscfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned int reset_type_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned int reset_type_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned int enable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned int enable_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct st_wdog {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct st_wdog_syscfg *syscfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned long clkrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) bool warm_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static struct st_wdog_syscfg stih407_syscfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .enable_reg = 0x204,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .enable_mask = BIT(19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static const struct of_device_id st_wdog_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .compatible = "st,stih407-lpc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .data = &stih407_syscfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MODULE_DEVICE_TABLE(of, st_wdog_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static void st_wdog_setup(struct st_wdog *st_wdog, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* Type of watchdog reset - 0: Cold 1: Warm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (st_wdog->syscfg->reset_type_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) regmap_update_bits(st_wdog->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) st_wdog->syscfg->reset_type_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) st_wdog->syscfg->reset_type_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) st_wdog->warm_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Mask/unmask watchdog reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) regmap_update_bits(st_wdog->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) st_wdog->syscfg->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) st_wdog->syscfg->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) enable ? 0 : st_wdog->syscfg->enable_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static void st_wdog_load_timer(struct st_wdog *st_wdog, unsigned int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned long clkrate = st_wdog->clkrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) writel_relaxed(timeout * clkrate, st_wdog->base + LPC_LPA_LSB_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) writel_relaxed(1, st_wdog->base + LPC_LPA_START_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int st_wdog_start(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) writel_relaxed(1, st_wdog->base + LPC_WDT_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static int st_wdog_stop(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) writel_relaxed(0, st_wdog->base + LPC_WDT_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int st_wdog_set_timeout(struct watchdog_device *wdd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) unsigned int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) wdd->timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) st_wdog_load_timer(st_wdog, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int st_wdog_keepalive(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) st_wdog_load_timer(st_wdog, wdd->timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static const struct watchdog_info st_wdog_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .identity = "ST LPC WDT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static const struct watchdog_ops st_wdog_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .start = st_wdog_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .stop = st_wdog_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .ping = st_wdog_keepalive,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .set_timeout = st_wdog_set_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static struct watchdog_device st_wdog_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .info = &st_wdog_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .ops = &st_wdog_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static void st_clk_disable_unprepare(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) clk_disable_unprepare(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static int st_wdog_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct st_wdog *st_wdog;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) uint32_t mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ret = of_property_read_u32(np, "st,lpc-mode", &mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) dev_err(dev, "An LPC mode must be provided\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /* LPC can either run as a Clocksource or in RTC or WDT mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (mode != ST_LPC_MODE_WDT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) st_wdog = devm_kzalloc(dev, sizeof(*st_wdog), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (!st_wdog)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) match = of_match_device(st_wdog_match, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (!match) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dev_err(dev, "Couldn't match device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) st_wdog->syscfg = (struct st_wdog_syscfg *)match->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (IS_ERR(base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return PTR_ERR(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) dev_err(dev, "No syscfg phandle specified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) clk = devm_clk_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) dev_err(dev, "Unable to request clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) st_wdog->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) st_wdog->base = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) st_wdog->clk = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) st_wdog->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) st_wdog->warm_reset = of_property_read_bool(np, "st,warm_reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) st_wdog->clkrate = clk_get_rate(st_wdog->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (!st_wdog->clkrate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dev_err(dev, "Unable to fetch clock rate\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) st_wdog_dev.max_timeout = 0xFFFFFFFF / st_wdog->clkrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) st_wdog_dev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ret = clk_prepare_enable(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dev_err(dev, "Unable to enable clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ret = devm_add_action_or_reset(dev, st_clk_disable_unprepare, clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) watchdog_set_drvdata(&st_wdog_dev, st_wdog);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) watchdog_set_nowayout(&st_wdog_dev, WATCHDOG_NOWAYOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* Init Watchdog timeout with value in DT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ret = watchdog_init_timeout(&st_wdog_dev, 0, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ret = devm_watchdog_register_device(dev, &st_wdog_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) st_wdog_setup(st_wdog, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) dev_info(dev, "LPC Watchdog driver registered, reset type is %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) st_wdog->warm_reset ? "warm" : "cold");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int st_wdog_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) st_wdog_setup(st_wdog, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static int st_wdog_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (watchdog_active(&st_wdog_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) st_wdog_stop(&st_wdog_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) st_wdog_setup(st_wdog, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) clk_disable(st_wdog->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static int st_wdog_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ret = clk_enable(st_wdog->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) dev_err(dev, "Unable to re-enable clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) watchdog_unregister_device(&st_wdog_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) clk_unprepare(st_wdog->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) st_wdog_setup(st_wdog, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (watchdog_active(&st_wdog_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) st_wdog_load_timer(st_wdog, st_wdog_dev.timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) st_wdog_start(&st_wdog_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static SIMPLE_DEV_PM_OPS(st_wdog_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) st_wdog_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) st_wdog_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static struct platform_driver st_wdog_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .name = "st-lpc-wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .pm = &st_wdog_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .of_match_table = st_wdog_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .probe = st_wdog_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .remove = st_wdog_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) module_platform_driver(st_wdog_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MODULE_AUTHOR("David Paris <david.paris@st.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MODULE_DESCRIPTION("ST LPC Watchdog Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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