Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * drivers/watchdog/shwdt.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Watchdog driver for integrated watchdog in the SuperH processors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2001 - 2012  Paul Mundt <lethal@linux-sh.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *     Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * 19-Apr-2002 Rob Radez <rob@osinvestor.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *     Added expect close support, made emulated timeout runtime changeable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *     general cleanups, add some ioctls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <asm/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define DRV_NAME "sh-wdt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * Default clock division ratio is 5.25 msecs. For an additional table of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * values, consult the asm-sh/watchdog.h. Overload this at module load
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * In order for this to work reliably we need to have HZ set to 1000 or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * something quite higher than 100 (or we need a proper high-res timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * implementation that will deal with this properly), otherwise the 10ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * resolution of a jiffy is enough to trigger the overflow. For things like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * the SH-4 and SH-5, this isn't necessarily that big of a problem, though
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * for the SH-2 and SH-3, this isn't recommended unless the WDT is absolutely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * necssary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * As a result of this timing problem, the only modes that are particularly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * feasible are the 4096 and the 2048 divisors, which yield 5.25 and 2.62ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * overflow periods respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * Also, since we can't really expect userspace to be responsive enough
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  * before the overflow happens, we maintain two separate timers .. One in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * the kernel for clearing out WOVF every 2ms or so (again, this depends on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * HZ == 1000), and another for monitoring userspace writes to the WDT device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  * As such, we currently use a configurable heartbeat interval which defaults
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * to 30s. In this case, the userspace daemon is only responsible for periodic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * writes to the device before the next heartbeat is scheduled. If the daemon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  * misses its deadline, the kernel timer will allow the WDT to overflow.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) static int clock_division_ratio = WTCSR_CKS_4096;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define next_ping_period(cks)	(jiffies + msecs_to_jiffies(cks - 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define WATCHDOG_HEARTBEAT 30			/* 30 sec default heartbeat */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static int heartbeat = WATCHDOG_HEARTBEAT;	/* in seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static bool nowayout = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static unsigned long next_heartbeat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) struct sh_wdt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	void __iomem		*base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct device		*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct clk		*clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	spinlock_t		lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct timer_list	timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int sh_wdt_start(struct watchdog_device *wdt_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	u8 csr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	pm_runtime_get_sync(wdt->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	clk_enable(wdt->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	spin_lock_irqsave(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	next_heartbeat = jiffies + (heartbeat * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	csr = sh_wdt_read_csr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	csr |= WTCSR_WT | clock_division_ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	sh_wdt_write_csr(csr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	sh_wdt_write_cnt(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	 * These processors have a bit of an inconsistent initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	 * process.. starting with SH-3, RSTS was moved to WTCSR, and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	 * RSTCSR register was removed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	 * On the SH-2 however, in addition with bits being in different
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	 * locations, we must deal with RSTCSR outright..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	csr = sh_wdt_read_csr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	csr |= WTCSR_TME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	csr &= ~WTCSR_RSTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	sh_wdt_write_csr(csr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #ifdef CONFIG_CPU_SH2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	csr = sh_wdt_read_rstcsr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	csr &= ~RSTCSR_RSTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	sh_wdt_write_rstcsr(csr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	spin_unlock_irqrestore(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int sh_wdt_stop(struct watchdog_device *wdt_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	u8 csr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	spin_lock_irqsave(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	del_timer(&wdt->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	csr = sh_wdt_read_csr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	csr &= ~WTCSR_TME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	sh_wdt_write_csr(csr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	spin_unlock_irqrestore(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	clk_disable(wdt->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	pm_runtime_put_sync(wdt->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static int sh_wdt_keepalive(struct watchdog_device *wdt_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	spin_lock_irqsave(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	next_heartbeat = jiffies + (heartbeat * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	spin_unlock_irqrestore(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static int sh_wdt_set_heartbeat(struct watchdog_device *wdt_dev, unsigned t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	spin_lock_irqsave(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	heartbeat = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	wdt_dev->timeout = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	spin_unlock_irqrestore(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static void sh_wdt_ping(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	struct sh_wdt *wdt = from_timer(wdt, t, timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	spin_lock_irqsave(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (time_before(jiffies, next_heartbeat)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		u8 csr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		csr = sh_wdt_read_csr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		csr &= ~WTCSR_IOVF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		sh_wdt_write_csr(csr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		sh_wdt_write_cnt(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		dev_warn(wdt->dev, "Heartbeat lost! Will not ping "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		         "the watchdog\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	spin_unlock_irqrestore(&wdt->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static const struct watchdog_info sh_wdt_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	.options		= WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 				  WDIOF_MAGICCLOSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.firmware_version	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	.identity		= "SH WDT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static const struct watchdog_ops sh_wdt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	.owner		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	.start		= sh_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	.stop		= sh_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	.ping		= sh_wdt_keepalive,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	.set_timeout	= sh_wdt_set_heartbeat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static struct watchdog_device sh_wdt_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	.info	= &sh_wdt_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	.ops	= &sh_wdt_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static int sh_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct sh_wdt *wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	 * As this driver only covers the global watchdog case, reject
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	 * any attempts to register per-CPU watchdogs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	if (pdev->id != -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	wdt = devm_kzalloc(&pdev->dev, sizeof(struct sh_wdt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (unlikely(!wdt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	wdt->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	wdt->clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	if (IS_ERR(wdt->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		 * Clock framework support is optional, continue on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		 * anyways if we don't find a matching clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		wdt->clk = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	wdt->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if (IS_ERR(wdt->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		return PTR_ERR(wdt->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	watchdog_set_nowayout(&sh_wdt_dev, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	watchdog_set_drvdata(&sh_wdt_dev, wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	sh_wdt_dev.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	spin_lock_init(&wdt->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	rc = sh_wdt_set_heartbeat(&sh_wdt_dev, heartbeat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	if (unlikely(rc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		/* Default timeout if invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		sh_wdt_set_heartbeat(&sh_wdt_dev, WATCHDOG_HEARTBEAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		dev_warn(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 			 "heartbeat value must be 1<=x<=3600, using %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 			 sh_wdt_dev.timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	dev_info(&pdev->dev, "configured with heartbeat=%d sec (nowayout=%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		 sh_wdt_dev.timeout, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	rc = watchdog_register_device(&sh_wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	if (unlikely(rc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		dev_err(&pdev->dev, "Can't register watchdog (err=%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	timer_setup(&wdt->timer, sh_wdt_ping, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	wdt->timer.expires	= next_ping_period(clock_division_ratio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	dev_info(&pdev->dev, "initialized.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	pm_runtime_enable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static int sh_wdt_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	watchdog_unregister_device(&sh_wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	pm_runtime_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static void sh_wdt_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	sh_wdt_stop(&sh_wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static struct platform_driver sh_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		.name	= DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	.probe		= sh_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	.remove		= sh_wdt_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	.shutdown	= sh_wdt_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static int __init sh_wdt_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	if (unlikely(clock_division_ratio < 0x5 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		     clock_division_ratio > 0x7)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		clock_division_ratio = WTCSR_CKS_4096;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		pr_info("divisor must be 0x5<=x<=0x7, using %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 			clock_division_ratio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	return platform_driver_register(&sh_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static void __exit sh_wdt_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	platform_driver_unregister(&sh_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) module_init(sh_wdt_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) module_exit(sh_wdt_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) MODULE_DESCRIPTION("SuperH watchdog driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) MODULE_ALIAS("platform:" DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) module_param(clock_division_ratio, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MODULE_PARM_DESC(clock_division_ratio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	"Clock division ratio. Valid ranges are from 0x5 (1.31ms) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	"to 0x7 (5.25ms). (default=" __MODULE_STRING(WTCSR_CKS_4096) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) module_param(heartbeat, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MODULE_PARM_DESC(heartbeat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	"Watchdog heartbeat in seconds. (1 <= heartbeat <= 3600, default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 				__MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) module_param(nowayout, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) MODULE_PARM_DESC(nowayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	"Watchdog cannot be stopped once started (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");