Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *	sch311x_wdt.c - Driver for the SCH311x Super-I/O chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *			integrated watchdog.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *	(c) Copyright 2008 Wim Van Sebroeck <wim@iguana.be>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *	Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *	provide warranty for any of this software. This material is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *	provided "AS-IS" and at no charge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *	Includes, defines, variables, module parameters, ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /* Includes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/module.h>		/* For module specific items */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/moduleparam.h>		/* For new moduleparam's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/types.h>		/* For standard types (like size_t) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/errno.h>		/* For the -ENODEV/... values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/kernel.h>		/* For printk/... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/miscdevice.h>		/* For struct miscdevice */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/watchdog.h>		/* For the watchdog specific items */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/init.h>			/* For __init/__exit/... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/fs.h>			/* For file operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/platform_device.h>	/* For platform_driver framework */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/ioport.h>		/* For io-port access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/spinlock.h>		/* For spin_lock/spin_unlock/... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/uaccess.h>		/* For copy_to_user/put_user/... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/io.h>			/* For inb/outb/... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) /* Module and version information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define DRV_NAME	"sch311x_wdt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /* Runtime registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define GP60			0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define WDT_TIME_OUT		0x65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define WDT_VAL			0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define WDT_CFG			0x67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define WDT_CTRL		0x68
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) /* internal variables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static unsigned long sch311x_wdt_is_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static char sch311x_wdt_expect_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static struct platform_device *sch311x_wdt_pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static int sch311x_ioports[] = { 0x2e, 0x4e, 0x162e, 0x164e, 0x00 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static struct {	/* The devices private data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	/* the Runtime Register base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	unsigned short runtime_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	/* The card's boot status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	int boot_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	/* the lock for io operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	spinlock_t io_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) } sch311x_wdt_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) /* Module load parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static unsigned short force_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) module_param(force_id, ushort, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) MODULE_PARM_DESC(force_id, "Override the detected device ID");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define WATCHDOG_TIMEOUT 60		/* 60 sec default timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static int timeout = WATCHDOG_TIMEOUT;	/* in seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) module_param(timeout, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) MODULE_PARM_DESC(timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	"Watchdog timeout in seconds. 1<= timeout <=15300, default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		__MODULE_STRING(WATCHDOG_TIMEOUT) ".");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static bool nowayout = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) module_param(nowayout, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) MODULE_PARM_DESC(nowayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	"Watchdog cannot be stopped once started (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  *	Super-IO functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static inline void sch311x_sio_enter(int sio_config_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	outb(0x55, sio_config_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static inline void sch311x_sio_exit(int sio_config_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	outb(0xaa, sio_config_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static inline int sch311x_sio_inb(int sio_config_port, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	outb(reg, sio_config_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	return inb(sio_config_port + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static inline void sch311x_sio_outb(int sio_config_port, int reg, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	outb(reg, sio_config_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	outb(val, sio_config_port + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)  *	Watchdog Operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static void sch311x_wdt_set_timeout(int t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	unsigned char timeout_unit = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	/* When new timeout is bigger then 255 seconds, we will use minutes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (t > 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		timeout_unit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		t /= 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	/* -- Watchdog Timeout --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	 * Bit 0-6 (Reserved)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	 * Bit 7   WDT Time-out Value Units Select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	 *         (0 = Minutes, 1 = Seconds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	outb(timeout_unit, sch311x_wdt_data.runtime_reg + WDT_TIME_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	/* -- Watchdog Timer Time-out Value --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	 * Bit 0-7 Binary coded units (0=Disabled, 1..255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	outb(t, sch311x_wdt_data.runtime_reg + WDT_VAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static void sch311x_wdt_start(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	unsigned char t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	spin_lock(&sch311x_wdt_data.io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	/* set watchdog's timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	sch311x_wdt_set_timeout(timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	/* enable the watchdog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	/* -- General Purpose I/O Bit 6.0 --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	 * Bit 0,   In/Out: 0 = Output, 1 = Input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	 * Bit 1,   Polarity: 0 = No Invert, 1 = Invert
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	 * Bit 2-3, Function select: 00 = GPI/O, 01 = LED1, 11 = WDT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	 *                           10 = Either Edge Triggered Intr.4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	 * Bit 4-6  (Reserved)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	 * Bit 7,   Output Type: 0 = Push Pull Bit, 1 = Open Drain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	t = inb(sch311x_wdt_data.runtime_reg + GP60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	outb((t & ~0x0d) | 0x0c, sch311x_wdt_data.runtime_reg + GP60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	spin_unlock(&sch311x_wdt_data.io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static void sch311x_wdt_stop(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	unsigned char t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	spin_lock(&sch311x_wdt_data.io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	/* stop the watchdog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	t = inb(sch311x_wdt_data.runtime_reg + GP60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	outb((t & ~0x0d) | 0x01, sch311x_wdt_data.runtime_reg + GP60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	/* disable timeout by setting it to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	sch311x_wdt_set_timeout(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	spin_unlock(&sch311x_wdt_data.io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static void sch311x_wdt_keepalive(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	spin_lock(&sch311x_wdt_data.io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	sch311x_wdt_set_timeout(timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	spin_unlock(&sch311x_wdt_data.io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int sch311x_wdt_set_heartbeat(int t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (t < 1 || t > (255*60))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	/* When new timeout is bigger then 255 seconds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	 * we will round up to minutes (with a max of 255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (t > 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		t = (((t - 1) / 60) + 1) * 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	timeout = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static void sch311x_wdt_get_status(int *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	unsigned char new_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	*status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	spin_lock(&sch311x_wdt_data.io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	/* -- Watchdog timer control --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	 * Bit 0   Status Bit: 0 = Timer counting, 1 = Timeout occurred
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	 * Bit 1   Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	 * Bit 2   Force Timeout: 1 = Forces WD timeout event (self-cleaning)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	 * Bit 3   P20 Force Timeout enabled:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	 *          0 = P20 activity does not generate the WD timeout event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	 *          1 = P20 Allows rising edge of P20, from the keyboard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	 *              controller, to force the WD timeout event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	 * Bit 4-7 Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	new_status = inb(sch311x_wdt_data.runtime_reg + WDT_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	if (new_status & 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		*status |= WDIOF_CARDRESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	spin_unlock(&sch311x_wdt_data.io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)  *	/dev/watchdog handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static ssize_t sch311x_wdt_write(struct file *file, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 						size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	if (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		if (!nowayout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			size_t i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			sch311x_wdt_expect_close = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 			for (i = 0; i != count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 				char c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 				if (get_user(c, buf + i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 					return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 				if (c == 'V')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 					sch311x_wdt_expect_close = 42;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		sch311x_wdt_keepalive();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static long sch311x_wdt_ioctl(struct file *file, unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 							unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	int new_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	void __user *argp = (void __user *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	int __user *p = argp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	static const struct watchdog_info ident = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		.options		= WDIOF_KEEPALIVEPING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 					  WDIOF_SETTIMEOUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 					  WDIOF_MAGICCLOSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		.firmware_version	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		.identity		= DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	case WDIOC_GETSUPPORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		if (copy_to_user(argp, &ident, sizeof(ident)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	case WDIOC_GETSTATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		sch311x_wdt_get_status(&status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		return put_user(status, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	case WDIOC_GETBOOTSTATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		return put_user(sch311x_wdt_data.boot_status, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	case WDIOC_SETOPTIONS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		int options, retval = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		if (get_user(options, p))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		if (options & WDIOS_DISABLECARD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 			sch311x_wdt_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		if (options & WDIOS_ENABLECARD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 			sch311x_wdt_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 			retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	case WDIOC_KEEPALIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		sch311x_wdt_keepalive();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	case WDIOC_SETTIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		if (get_user(new_timeout, p))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		if (sch311x_wdt_set_heartbeat(new_timeout))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		sch311x_wdt_keepalive();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	case WDIOC_GETTIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		return put_user(timeout, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		return -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int sch311x_wdt_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	if (test_and_set_bit(0, &sch311x_wdt_is_open))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	 *	Activate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	sch311x_wdt_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	return stream_open(inode, file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static int sch311x_wdt_close(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	if (sch311x_wdt_expect_close == 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		sch311x_wdt_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		pr_crit("Unexpected close, not stopping watchdog!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		sch311x_wdt_keepalive();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	clear_bit(0, &sch311x_wdt_is_open);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	sch311x_wdt_expect_close = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)  *	Kernel Interfaces
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static const struct file_operations sch311x_wdt_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	.owner		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	.llseek		= no_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	.write		= sch311x_wdt_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	.unlocked_ioctl	= sch311x_wdt_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	.compat_ioctl	= compat_ptr_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	.open		= sch311x_wdt_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	.release	= sch311x_wdt_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static struct miscdevice sch311x_wdt_miscdev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	.minor	= WATCHDOG_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	.name	= "watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	.fops	= &sch311x_wdt_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)  *	Init & exit routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static int sch311x_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	spin_lock_init(&sch311x_wdt_data.io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	if (!request_region(sch311x_wdt_data.runtime_reg + GP60, 1, DRV_NAME)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 			sch311x_wdt_data.runtime_reg + GP60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 			sch311x_wdt_data.runtime_reg + GP60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		err = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	if (!request_region(sch311x_wdt_data.runtime_reg + WDT_TIME_OUT, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 								DRV_NAME)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 		dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 			sch311x_wdt_data.runtime_reg + WDT_TIME_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 			sch311x_wdt_data.runtime_reg + WDT_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		err = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		goto exit_release_region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	/* Make sure that the watchdog is not running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	sch311x_wdt_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	/* Disable keyboard and mouse interaction and interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	/* -- Watchdog timer configuration --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	 * Bit 0   Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	 * Bit 1   Keyboard enable: 0* = No Reset, 1 = Reset WDT upon KBD Intr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	 * Bit 2   Mouse enable: 0* = No Reset, 1 = Reset WDT upon Mouse Intr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	 * Bit 3   Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	 * Bit 4-7 WDT Interrupt Mapping: (0000* = Disabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	 *            0001=IRQ1, 0010=(Invalid), 0011=IRQ3 to 1111=IRQ15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	outb(0, sch311x_wdt_data.runtime_reg + WDT_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	/* Check that the heartbeat value is within it's range ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	 * if not reset to the default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	if (sch311x_wdt_set_heartbeat(timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		sch311x_wdt_set_heartbeat(WATCHDOG_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		dev_info(dev, "timeout value must be 1<=x<=15300, using %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 			timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	/* Get status at boot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	sch311x_wdt_get_status(&sch311x_wdt_data.boot_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	sch311x_wdt_miscdev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	err = misc_register(&sch311x_wdt_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	if (err != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 		dev_err(dev, "cannot register miscdev on minor=%d (err=%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 							WATCHDOG_MINOR, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		goto exit_release_region2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	dev_info(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 		"SMSC SCH311x WDT initialized. timeout=%d sec (nowayout=%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		timeout, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) exit_release_region2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	release_region(sch311x_wdt_data.runtime_reg + WDT_TIME_OUT, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) exit_release_region:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	release_region(sch311x_wdt_data.runtime_reg + GP60, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	sch311x_wdt_data.runtime_reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static int sch311x_wdt_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	/* Stop the timer before we leave */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	if (!nowayout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		sch311x_wdt_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	/* Deregister */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	misc_deregister(&sch311x_wdt_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	release_region(sch311x_wdt_data.runtime_reg + WDT_TIME_OUT, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	release_region(sch311x_wdt_data.runtime_reg + GP60, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	sch311x_wdt_data.runtime_reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static void sch311x_wdt_shutdown(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	/* Turn the WDT off if we have a soft shutdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	sch311x_wdt_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static struct platform_driver sch311x_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	.probe		= sch311x_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	.remove		= sch311x_wdt_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	.shutdown	= sch311x_wdt_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 		.name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static int __init sch311x_detect(int sio_config_port, unsigned short *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	int err = 0, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	unsigned short base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	unsigned char dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	sch311x_sio_enter(sio_config_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	/* Check device ID. We currently know about:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	 * SCH3112 (0x7c), SCH3114 (0x7d), and SCH3116 (0x7f). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	reg = force_id ? force_id : sch311x_sio_inb(sio_config_port, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 		err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 		goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	dev_id = reg == 0x7c ? 2 : reg == 0x7d ? 4 : 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	/* Select logical device A (runtime registers) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	sch311x_sio_outb(sio_config_port, 0x07, 0x0a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	/* Check if Logical Device Register is currently active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	if ((sch311x_sio_inb(sio_config_port, 0x30) & 0x01) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 		pr_info("Seems that LDN 0x0a is not active...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	/* Get the base address of the runtime registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	base_addr = (sch311x_sio_inb(sio_config_port, 0x60) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 			   sch311x_sio_inb(sio_config_port, 0x61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	if (!base_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 		pr_err("Base address not set\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 		err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 		goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	*addr = base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	pr_info("Found an SMSC SCH311%d chip at 0x%04x\n", dev_id, base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	sch311x_sio_exit(sio_config_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static int __init sch311x_wdt_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 	int err, i, found = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	unsigned short addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	for (i = 0; !found && sch311x_ioports[i]; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 		if (sch311x_detect(sch311x_ioports[i], &addr) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 			found++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	if (!found)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	sch311x_wdt_data.runtime_reg = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	err = platform_driver_register(&sch311x_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	sch311x_wdt_pdev = platform_device_register_simple(DRV_NAME, addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 								NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	if (IS_ERR(sch311x_wdt_pdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 		err = PTR_ERR(sch311x_wdt_pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 		goto unreg_platform_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) unreg_platform_driver:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	platform_driver_unregister(&sch311x_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static void __exit sch311x_wdt_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	platform_device_unregister(sch311x_wdt_pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	platform_driver_unregister(&sch311x_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) module_init(sch311x_wdt_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) module_exit(sch311x_wdt_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) MODULE_DESCRIPTION("SMSC SCH311x WatchDog Timer Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) MODULE_LICENSE("GPL");