^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Realtek RTD129x watchdog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2017 Andreas Färber
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define RTD119X_TCWCR 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define RTD119X_TCWTR 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define RTD119X_TCWOV 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RTD119X_TCWCR_WDEN_DISABLED 0xa5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RTD119X_TCWCR_WDEN_ENABLED 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RTD119X_TCWCR_WDEN_MASK 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RTD119X_TCWTR_WDCLR BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct rtd119x_watchdog_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct watchdog_device wdt_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static int rtd119x_wdt_start(struct watchdog_device *wdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct rtd119x_watchdog_device *data = watchdog_get_drvdata(wdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) val = readl_relaxed(data->base + RTD119X_TCWCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) val &= ~RTD119X_TCWCR_WDEN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) val |= RTD119X_TCWCR_WDEN_ENABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) writel(val, data->base + RTD119X_TCWCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static int rtd119x_wdt_stop(struct watchdog_device *wdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct rtd119x_watchdog_device *data = watchdog_get_drvdata(wdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) val = readl_relaxed(data->base + RTD119X_TCWCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) val &= ~RTD119X_TCWCR_WDEN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) val |= RTD119X_TCWCR_WDEN_DISABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) writel(val, data->base + RTD119X_TCWCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int rtd119x_wdt_ping(struct watchdog_device *wdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct rtd119x_watchdog_device *data = watchdog_get_drvdata(wdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) writel_relaxed(RTD119X_TCWTR_WDCLR, data->base + RTD119X_TCWTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return rtd119x_wdt_start(wdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int rtd119x_wdt_set_timeout(struct watchdog_device *wdev, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct rtd119x_watchdog_device *data = watchdog_get_drvdata(wdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) writel(val * clk_get_rate(data->clk), data->base + RTD119X_TCWOV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) data->wdt_dev.timeout = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static const struct watchdog_ops rtd119x_wdt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .start = rtd119x_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .stop = rtd119x_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .ping = rtd119x_wdt_ping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .set_timeout = rtd119x_wdt_set_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static const struct watchdog_info rtd119x_wdt_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .identity = "rtd119x-wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .options = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static const struct of_device_id rtd119x_wdt_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) { .compatible = "realtek,rtd1295-watchdog" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static void rtd119x_clk_disable_unprepare(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) clk_disable_unprepare(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static int rtd119x_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct rtd119x_watchdog_device *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) data->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (IS_ERR(data->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return PTR_ERR(data->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) data->clk = devm_clk_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (IS_ERR(data->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return PTR_ERR(data->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ret = clk_prepare_enable(data->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ret = devm_add_action_or_reset(dev, rtd119x_clk_disable_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) data->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) data->wdt_dev.info = &rtd119x_wdt_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) data->wdt_dev.ops = &rtd119x_wdt_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) data->wdt_dev.timeout = 120;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) data->wdt_dev.max_timeout = 0xffffffff / clk_get_rate(data->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) data->wdt_dev.min_timeout = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) data->wdt_dev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) watchdog_stop_on_reboot(&data->wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) watchdog_set_drvdata(&data->wdt_dev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) platform_set_drvdata(pdev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) writel_relaxed(RTD119X_TCWTR_WDCLR, data->base + RTD119X_TCWTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) rtd119x_wdt_set_timeout(&data->wdt_dev, data->wdt_dev.timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) rtd119x_wdt_stop(&data->wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return devm_watchdog_register_device(dev, &data->wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static struct platform_driver rtd119x_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .probe = rtd119x_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .name = "rtd1295-watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .of_match_table = rtd119x_wdt_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) builtin_platform_driver(rtd119x_wdt_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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