Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * RDC321x watchdog driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2007-2010 Florian Fainelli <florian@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * This driver is highly inspired from the cpu5_wdt driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/mfd/rdc321x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define RDC_WDT_MASK	0x80000000 /* Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define RDC_WDT_EN	0x00800000 /* Enable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define RDC_WDT_WTI	0x00200000 /* Generate CPU reset/NMI/WDT on timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define RDC_WDT_RST	0x00100000 /* Reset bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define RDC_WDT_WIF	0x00040000 /* WDT IRQ Flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define RDC_WDT_IRT	0x00000100 /* IRQ Routing table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define RDC_WDT_CNT	0x00000001 /* WDT count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define RDC_CLS_TMR	0x80003844 /* Clear timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define RDC_WDT_INTERVAL	(HZ/10+1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static int ticks = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) /* some device data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct completion stop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	int running;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct timer_list timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	int queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	int default_ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	unsigned long inuse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct pci_dev *sb_pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	int base_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) } rdc321x_wdt_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) /* generic helper functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static void rdc321x_wdt_trigger(struct timer_list *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	if (rdc321x_wdt_device.running)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		ticks--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	/* keep watchdog alive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 					rdc321x_wdt_device.base_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	val |= RDC_WDT_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 					rdc321x_wdt_device.base_reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	/* requeue?? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	if (rdc321x_wdt_device.queue && ticks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		mod_timer(&rdc321x_wdt_device.timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 				jiffies + RDC_WDT_INTERVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		/* ticks doesn't matter anyway */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		complete(&rdc321x_wdt_device.stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static void rdc321x_wdt_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	ticks = rdc321x_wdt_device.default_ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static void rdc321x_wdt_start(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (!rdc321x_wdt_device.queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		rdc321x_wdt_device.queue = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		/* Clear the timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 				rdc321x_wdt_device.base_reg, RDC_CLS_TMR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		/* Enable watchdog and set the timeout to 81.92 us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 					rdc321x_wdt_device.base_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 					RDC_WDT_EN | RDC_WDT_CNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		mod_timer(&rdc321x_wdt_device.timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				jiffies + RDC_WDT_INTERVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	/* if process dies, counter is not decremented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	rdc321x_wdt_device.running++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int rdc321x_wdt_stop(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (rdc321x_wdt_device.running)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		rdc321x_wdt_device.running = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	ticks = rdc321x_wdt_device.default_ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* filesystem operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int rdc321x_wdt_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (test_and_set_bit(0, &rdc321x_wdt_device.inuse))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	return stream_open(inode, file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int rdc321x_wdt_release(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	clear_bit(0, &rdc321x_wdt_device.inuse);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static long rdc321x_wdt_ioctl(struct file *file, unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 				unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	void __user *argp = (void __user *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	static const struct watchdog_info ident = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		.options = WDIOF_CARDRESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		.identity = "RDC321x WDT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	case WDIOC_KEEPALIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		rdc321x_wdt_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	case WDIOC_GETSTATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		/* Read the value from the DATA register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 					rdc321x_wdt_device.base_reg, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		if (copy_to_user(argp, &value, sizeof(u32)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	case WDIOC_GETSUPPORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		if (copy_to_user(argp, &ident, sizeof(ident)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	case WDIOC_SETOPTIONS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		if (copy_from_user(&value, argp, sizeof(int)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		switch (value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		case WDIOS_ENABLECARD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			rdc321x_wdt_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		case WDIOS_DISABLECARD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 			return rdc321x_wdt_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		return -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static ssize_t rdc321x_wdt_write(struct file *file, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 				size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	if (!count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	rdc321x_wdt_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static const struct file_operations rdc321x_wdt_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.owner		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	.llseek		= no_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	.unlocked_ioctl	= rdc321x_wdt_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	.compat_ioctl	= compat_ptr_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	.open		= rdc321x_wdt_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	.write		= rdc321x_wdt_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	.release	= rdc321x_wdt_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static struct miscdevice rdc321x_wdt_misc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	.minor	= WATCHDOG_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.name	= "watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.fops	= &rdc321x_wdt_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int rdc321x_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct rdc321x_wdt_pdata *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	pdata = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		dev_err(&pdev->dev, "no platform data supplied\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	r = platform_get_resource_byname(pdev, IORESOURCE_IO, "wdt-reg");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (!r) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		dev_err(&pdev->dev, "failed to get wdt-reg resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	rdc321x_wdt_device.sb_pdev = pdata->sb_pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	rdc321x_wdt_device.base_reg = r->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	rdc321x_wdt_device.queue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	rdc321x_wdt_device.default_ticks = ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	err = misc_register(&rdc321x_wdt_misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		dev_err(&pdev->dev, "misc_register failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	spin_lock_init(&rdc321x_wdt_device.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	/* Reset the watchdog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 				rdc321x_wdt_device.base_reg, RDC_WDT_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	init_completion(&rdc321x_wdt_device.stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	clear_bit(0, &rdc321x_wdt_device.inuse);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	timer_setup(&rdc321x_wdt_device.timer, rdc321x_wdt_trigger, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	dev_info(&pdev->dev, "watchdog init success\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int rdc321x_wdt_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	if (rdc321x_wdt_device.queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		rdc321x_wdt_device.queue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		wait_for_completion(&rdc321x_wdt_device.stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	misc_deregister(&rdc321x_wdt_misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static struct platform_driver rdc321x_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	.probe = rdc321x_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	.remove = rdc321x_wdt_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		.name = "rdc321x-wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) module_platform_driver(rdc321x_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MODULE_DESCRIPTION("RDC321x watchdog driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MODULE_LICENSE("GPL");