^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * MEN 14F021P00 Board Management Controller (BMC) Watchdog Driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2014 MEN Mikro Elektronik Nuernberg GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define DEVNAME "menf21bmc_wdt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define BMC_CMD_WD_ON 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define BMC_CMD_WD_OFF 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define BMC_CMD_WD_TRIG 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define BMC_CMD_WD_TIME 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define BMC_CMD_WD_STATE 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define BMC_WD_OFF_VAL 0x69
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define BMC_CMD_RST_RSN 0x92
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BMC_WD_TIMEOUT_MIN 1 /* in sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define BMC_WD_TIMEOUT_MAX 6553 /* in sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static bool nowayout = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) module_param(nowayout, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct menf21bmc_wdt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct watchdog_device wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct i2c_client *i2c_client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int menf21bmc_wdt_set_bootstatus(struct menf21bmc_wdt *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int rst_rsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) rst_rsn = i2c_smbus_read_byte_data(data->i2c_client, BMC_CMD_RST_RSN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (rst_rsn < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return rst_rsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (rst_rsn == 0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) data->wdt.bootstatus |= WDIOF_CARDRESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) else if (rst_rsn == 0x05)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) data->wdt.bootstatus |= WDIOF_EXTERN1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) else if (rst_rsn == 0x06)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) data->wdt.bootstatus |= WDIOF_EXTERN2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) else if (rst_rsn == 0x0A)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) data->wdt.bootstatus |= WDIOF_POWERUNDER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int menf21bmc_wdt_start(struct watchdog_device *wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct menf21bmc_wdt *drv_data = watchdog_get_drvdata(wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return i2c_smbus_write_byte(drv_data->i2c_client, BMC_CMD_WD_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int menf21bmc_wdt_stop(struct watchdog_device *wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct menf21bmc_wdt *drv_data = watchdog_get_drvdata(wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return i2c_smbus_write_byte_data(drv_data->i2c_client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) BMC_CMD_WD_OFF, BMC_WD_OFF_VAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) menf21bmc_wdt_settimeout(struct watchdog_device *wdt, unsigned int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct menf21bmc_wdt *drv_data = watchdog_get_drvdata(wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * BMC Watchdog does have a resolution of 100ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * Watchdog API defines the timeout in seconds, so we have to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * multiply the value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ret = i2c_smbus_write_word_data(drv_data->i2c_client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) BMC_CMD_WD_TIME, timeout * 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) wdt->timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static int menf21bmc_wdt_ping(struct watchdog_device *wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct menf21bmc_wdt *drv_data = watchdog_get_drvdata(wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return i2c_smbus_write_byte(drv_data->i2c_client, BMC_CMD_WD_TRIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static const struct watchdog_info menf21bmc_wdt_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .identity = DEVNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const struct watchdog_ops menf21bmc_wdt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .start = menf21bmc_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .stop = menf21bmc_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .ping = menf21bmc_wdt_ping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .set_timeout = menf21bmc_wdt_settimeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static int menf21bmc_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int ret, bmc_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct menf21bmc_wdt *drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct i2c_client *i2c_client = to_i2c_client(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) drv_data = devm_kzalloc(dev, sizeof(struct menf21bmc_wdt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (!drv_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) drv_data->wdt.ops = &menf21bmc_wdt_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) drv_data->wdt.info = &menf21bmc_wdt_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) drv_data->wdt.min_timeout = BMC_WD_TIMEOUT_MIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) drv_data->wdt.max_timeout = BMC_WD_TIMEOUT_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) drv_data->wdt.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) drv_data->i2c_client = i2c_client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * Get the current wdt timeout value from the BMC because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * the BMC will save the value set before if the system restarts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) bmc_timeout = i2c_smbus_read_word_data(drv_data->i2c_client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) BMC_CMD_WD_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (bmc_timeout < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) dev_err(dev, "failed to get current WDT timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return bmc_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) watchdog_init_timeout(&drv_data->wdt, bmc_timeout / 10, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) watchdog_set_nowayout(&drv_data->wdt, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) watchdog_set_drvdata(&drv_data->wdt, drv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) platform_set_drvdata(pdev, drv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ret = menf21bmc_wdt_set_bootstatus(drv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) dev_err(dev, "failed to set Watchdog bootstatus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) ret = devm_watchdog_register_device(dev, &drv_data->wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) dev_info(dev, "MEN 14F021P00 BMC Watchdog device enabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static void menf21bmc_wdt_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct menf21bmc_wdt *drv_data = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) i2c_smbus_write_word_data(drv_data->i2c_client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) BMC_CMD_WD_OFF, BMC_WD_OFF_VAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static struct platform_driver menf21bmc_wdt = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .name = DEVNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .probe = menf21bmc_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .shutdown = menf21bmc_wdt_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) module_platform_driver(menf21bmc_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) MODULE_DESCRIPTION("MEN 14F021P00 BMC Watchdog driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) MODULE_AUTHOR("Andreas Werner <andreas.werner@men.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MODULE_ALIAS("platform:menf21bmc_wdt");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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