Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * drivers/char/watchdog/max63xx_wdt.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Driver for max63{69,70,71,72,73,74} watchdog timers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * This driver assumes the watchdog pins are memory mapped (as it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * the case for the Arcom Zeus). Should it be connected over GPIOs or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * another interface, some abstraction will have to be introduced.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define DEFAULT_HEARTBEAT 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define MAX_HEARTBEAT     60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) static unsigned int heartbeat = DEFAULT_HEARTBEAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static bool nowayout  = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * Memory mapping: a single byte, 3 first lower bits to select bit 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * to ping the watchdog.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define MAX6369_WDSET	(7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define MAX6369_WDI	(1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define MAX6369_WDSET_DISABLED	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int nodelay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) struct max63xx_wdt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct watchdog_device wdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	const struct max63xx_timeout *timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	/* memory mapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	/* WDI and WSET bits write access routines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	void (*ping)(struct max63xx_wdt *wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	void (*set)(struct max63xx_wdt *wdt, u8 set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * The timeout values used are actually the absolute minimum the chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  * offers. Typical values on my board are slightly over twice as long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * (10s setting ends up with a 25s timeout), and can be up to 3 times
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  * the nominal setting (according to the datasheet). So please take
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * these values with a grain of salt. Same goes for the initial delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  * "feature". Only max6373/74 have a few settings without this initial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  * delay (selected with the "nodelay" parameter).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * I also decided to remove from the tables any timeout smaller than a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  * second, as it looked completly overkill...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) /* Timeouts in second */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) struct max63xx_timeout {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	const u8 wdset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	const u8 tdelay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	const u8 twd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) static const struct max63xx_timeout max6369_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	{ 5,  1,  1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	{ 6, 10, 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	{ 7, 60, 60 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static const struct max63xx_timeout max6371_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	{ 6, 60,  3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	{ 7, 60, 60 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static const struct max63xx_timeout max6373_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	{ 2, 60,  1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	{ 5,  0,  1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	{ 1,  3,  3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	{ 7, 60, 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	{ 6,  0, 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static struct max63xx_timeout *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) max63xx_select_timeout(struct max63xx_timeout *table, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	while (table->twd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		if (value <= table->twd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			if (nodelay && table->tdelay == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				return table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			if (!nodelay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 				return table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		table++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int max63xx_wdt_ping(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	wdt->ping(wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int max63xx_wdt_start(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	wdt->set(wdt, wdt->timeout->wdset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	/* check for a edge triggered startup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if (wdt->timeout->tdelay == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		wdt->ping(wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int max63xx_wdt_stop(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	wdt->set(wdt, MAX6369_WDSET_DISABLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static const struct watchdog_ops max63xx_wdt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	.start = max63xx_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	.stop = max63xx_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	.ping = max63xx_wdt_ping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const struct watchdog_info max63xx_wdt_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	.options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	.identity = "max63xx Watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static void max63xx_mmap_ping(struct max63xx_wdt *wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	spin_lock(&wdt->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	val = __raw_readb(wdt->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	__raw_writeb(val | MAX6369_WDI, wdt->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	__raw_writeb(val & ~MAX6369_WDI, wdt->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	spin_unlock(&wdt->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static void max63xx_mmap_set(struct max63xx_wdt *wdt, u8 set)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	spin_lock(&wdt->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	val = __raw_readb(wdt->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	val &= ~MAX6369_WDSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	val |= set & MAX6369_WDSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	__raw_writeb(val, wdt->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	spin_unlock(&wdt->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int max63xx_mmap_init(struct platform_device *p, struct max63xx_wdt *wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	wdt->base = devm_platform_ioremap_resource(p, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	if (IS_ERR(wdt->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		return PTR_ERR(wdt->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	spin_lock_init(&wdt->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	wdt->ping = max63xx_mmap_ping;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	wdt->set = max63xx_mmap_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static int max63xx_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	struct max63xx_wdt *wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	struct max63xx_timeout *table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	if (!wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		heartbeat = DEFAULT_HEARTBEAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	wdt->timeout = max63xx_select_timeout(table, heartbeat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (!wdt->timeout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		dev_err(dev, "unable to satisfy %ds heartbeat request\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 			heartbeat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	err = max63xx_mmap_init(pdev, wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	platform_set_drvdata(pdev, &wdt->wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	watchdog_set_drvdata(&wdt->wdd, wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	wdt->wdd.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	wdt->wdd.timeout = wdt->timeout->twd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	wdt->wdd.info = &max63xx_wdt_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	wdt->wdd.ops = &max63xx_wdt_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	watchdog_set_nowayout(&wdt->wdd, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	err = devm_watchdog_register_device(dev, &wdt->wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	dev_info(dev, "using %ds heartbeat with %ds initial delay\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		 wdt->timeout->twd, wdt->timeout->tdelay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static const struct platform_device_id max63xx_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	{ "max6369_wdt", (kernel_ulong_t)max6369_table, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	{ "max6370_wdt", (kernel_ulong_t)max6369_table, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	{ "max6371_wdt", (kernel_ulong_t)max6371_table, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	{ "max6372_wdt", (kernel_ulong_t)max6371_table, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	{ "max6373_wdt", (kernel_ulong_t)max6373_table, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	{ "max6374_wdt", (kernel_ulong_t)max6373_table, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) MODULE_DEVICE_TABLE(platform, max63xx_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static struct platform_driver max63xx_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	.probe		= max63xx_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	.id_table	= max63xx_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		.name	= "max63xx_wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) module_platform_driver(max63xx_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MODULE_DESCRIPTION("max63xx Watchdog Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) module_param(heartbeat, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) MODULE_PARM_DESC(heartbeat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		 "Watchdog heartbeat period in seconds from 1 to "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		 __MODULE_STRING(MAX_HEARTBEAT) ", default "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		 __MODULE_STRING(DEFAULT_HEARTBEAT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) module_param(nowayout, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) module_param(nodelay, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MODULE_PARM_DESC(nodelay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		 "Force selection of a timeout setting without initial delay "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		 "(max6373/74 only, default=0)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MODULE_LICENSE("GPL v2");