^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Intel Atom E6xx Watchdog driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2011 Alexander Stein
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * <alexander.stein@systec-electronic.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define DRIVER_NAME "ie6xx_wdt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PV1 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PV2 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define RR0 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RR1 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define WDT_RELOAD 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define WDT_TOUT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define WDTCR 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define WDT_PRE_SEL 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define WDT_RESET_SEL 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define WDT_RESET_EN 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define WDT_TOUT_EN 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DCR 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define WDTLR 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define WDT_LOCK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define WDT_ENABLE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define WDT_TOUT_CNF 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define MIN_TIME 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define MAX_TIME (10 * 60) /* 10 minutes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define DEFAULT_TIME 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static unsigned int timeout = DEFAULT_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) module_param(timeout, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MODULE_PARM_DESC(timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "Default Watchdog timer setting ("
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) __MODULE_STRING(DEFAULT_TIME) "s)."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) "The range is from 1 to 600");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static bool nowayout = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) module_param(nowayout, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MODULE_PARM_DESC(nowayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) "Watchdog cannot be stopped once started (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static u8 resetmode = 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) module_param(resetmode, byte, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MODULE_PARM_DESC(resetmode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) "Resetmode bits: 0x08 warm reset (cold reset otherwise), "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) "0x10 reset enable, 0x20 disable toggle GPIO[4] (default=0x10)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned short sch_wdtba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) spinlock_t unlock_sequence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct dentry *debugfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) } ie6xx_wdt_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * This is needed to write to preload and reload registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * struct ie6xx_wdt_data.unlock_sequence must be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * to prevent sequence interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static void ie6xx_wdt_unlock_registers(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) outb(0x80, ie6xx_wdt_data.sch_wdtba + RR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) outb(0x86, ie6xx_wdt_data.sch_wdtba + RR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int ie6xx_wdt_ping(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) spin_lock(&ie6xx_wdt_data.unlock_sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ie6xx_wdt_unlock_registers();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) outb(WDT_RELOAD, ie6xx_wdt_data.sch_wdtba + RR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) spin_unlock(&ie6xx_wdt_data.unlock_sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static int ie6xx_wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u32 preload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u64 clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u8 wdtcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* Watchdog clock is PCI Clock (33MHz) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) clock = 33000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* and the preload value is loaded into [34:15] of the down counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) preload = (t * clock) >> 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * Manual states preload must be one less.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * Does not wrap as t is at least 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) preload -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) spin_lock(&ie6xx_wdt_data.unlock_sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* Set ResetMode & Enable prescaler for range 10ms to 10 min */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) wdtcr = resetmode & 0x38;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) outb(wdtcr, ie6xx_wdt_data.sch_wdtba + WDTCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ie6xx_wdt_unlock_registers();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) outl(0, ie6xx_wdt_data.sch_wdtba + PV1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ie6xx_wdt_unlock_registers();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) outl(preload, ie6xx_wdt_data.sch_wdtba + PV2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ie6xx_wdt_unlock_registers();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) outb(WDT_RELOAD | WDT_TOUT, ie6xx_wdt_data.sch_wdtba + RR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) spin_unlock(&ie6xx_wdt_data.unlock_sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) wdd->timeout = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int ie6xx_wdt_start(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ie6xx_wdt_set_timeout(wdd, wdd->timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Enable the watchdog timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) spin_lock(&ie6xx_wdt_data.unlock_sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) outb(WDT_ENABLE, ie6xx_wdt_data.sch_wdtba + WDTLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) spin_unlock(&ie6xx_wdt_data.unlock_sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int ie6xx_wdt_stop(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (inb(ie6xx_wdt_data.sch_wdtba + WDTLR) & WDT_LOCK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* Disable the watchdog timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) spin_lock(&ie6xx_wdt_data.unlock_sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) outb(0, ie6xx_wdt_data.sch_wdtba + WDTLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) spin_unlock(&ie6xx_wdt_data.unlock_sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static const struct watchdog_info ie6xx_wdt_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .identity = "Intel Atom E6xx Watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .options = WDIOF_SETTIMEOUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) WDIOF_MAGICCLOSE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) WDIOF_KEEPALIVEPING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const struct watchdog_ops ie6xx_wdt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .start = ie6xx_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .stop = ie6xx_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .ping = ie6xx_wdt_ping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .set_timeout = ie6xx_wdt_set_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static struct watchdog_device ie6xx_wdt_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .info = &ie6xx_wdt_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .ops = &ie6xx_wdt_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .min_timeout = MIN_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .max_timeout = MAX_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static int ie6xx_wdt_show(struct seq_file *s, void *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) seq_printf(s, "PV1 = 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) inl(ie6xx_wdt_data.sch_wdtba + PV1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) seq_printf(s, "PV2 = 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) inl(ie6xx_wdt_data.sch_wdtba + PV2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) seq_printf(s, "RR = 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) inw(ie6xx_wdt_data.sch_wdtba + RR0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) seq_printf(s, "WDTCR = 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) inw(ie6xx_wdt_data.sch_wdtba + WDTCR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) seq_printf(s, "DCR = 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) inl(ie6xx_wdt_data.sch_wdtba + DCR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) seq_printf(s, "WDTLR = 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) inw(ie6xx_wdt_data.sch_wdtba + WDTLR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) seq_printf(s, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) DEFINE_SHOW_ATTRIBUTE(ie6xx_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static void ie6xx_wdt_debugfs_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* /sys/kernel/debug/ie6xx_wdt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ie6xx_wdt_data.debugfs = debugfs_create_file("ie6xx_wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) S_IFREG | S_IRUGO, NULL, NULL, &ie6xx_wdt_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static void ie6xx_wdt_debugfs_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) debugfs_remove(ie6xx_wdt_data.debugfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static void ie6xx_wdt_debugfs_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static void ie6xx_wdt_debugfs_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static int ie6xx_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) u8 wdtlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) res = platform_get_resource(pdev, IORESOURCE_IO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (!res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (!request_region(res->start, resource_size(res), pdev->name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) dev_err(&pdev->dev, "Watchdog region 0x%llx already in use!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) (u64)res->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ie6xx_wdt_data.sch_wdtba = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) dev_dbg(&pdev->dev, "WDT = 0x%X\n", ie6xx_wdt_data.sch_wdtba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) ie6xx_wdt_dev.timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) watchdog_set_nowayout(&ie6xx_wdt_dev, nowayout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ie6xx_wdt_dev.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) spin_lock_init(&ie6xx_wdt_data.unlock_sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) wdtlr = inb(ie6xx_wdt_data.sch_wdtba + WDTLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (wdtlr & WDT_LOCK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) dev_warn(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) "Watchdog Timer is Locked (Reg=0x%x)\n", wdtlr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) ie6xx_wdt_debugfs_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ret = watchdog_register_device(&ie6xx_wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) goto misc_register_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) misc_register_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) ie6xx_wdt_debugfs_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) release_region(res->start, resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ie6xx_wdt_data.sch_wdtba = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static int ie6xx_wdt_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) res = platform_get_resource(pdev, IORESOURCE_IO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ie6xx_wdt_stop(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) watchdog_unregister_device(&ie6xx_wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ie6xx_wdt_debugfs_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) release_region(res->start, resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ie6xx_wdt_data.sch_wdtba = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static struct platform_driver ie6xx_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .probe = ie6xx_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .remove = ie6xx_wdt_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static int __init ie6xx_wdt_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* Check boot parameters to verify that their initial values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* are in range. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if ((timeout < MIN_TIME) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) (timeout > MAX_TIME)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) pr_err("Watchdog timer: value of timeout %d (dec) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) "is out of range from %d to %d (dec)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) timeout, MIN_TIME, MAX_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return platform_driver_register(&ie6xx_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static void __exit ie6xx_wdt_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) platform_driver_unregister(&ie6xx_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) late_initcall(ie6xx_wdt_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) module_exit(ie6xx_wdt_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) MODULE_AUTHOR("Alexander Stein <alexander.stein@systec-electronic.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MODULE_DESCRIPTION("Intel Atom E6xx Watchdog Device Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MODULE_ALIAS("platform:" DRIVER_NAME);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags