^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Watchdog driver for Faraday Technology FTWDT010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Inspired by the out-of-tree drivers from OpenWRT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define FTWDT010_WDCOUNTER 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define FTWDT010_WDLOAD 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define FTWDT010_WDRESTART 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FTWDT010_WDCR 0xC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define WDRESTART_MAGIC 0x5AB9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define WDCR_CLOCK_5MHZ BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define WDCR_WDEXT BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define WDCR_WDINTR BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define WDCR_SYS_RST BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define WDCR_ENABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define WDT_CLOCK 5000000 /* 5 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct ftwdt010_wdt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct watchdog_device wdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) bool has_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static inline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct ftwdt010_wdt *to_ftwdt010_wdt(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return container_of(wdd, struct ftwdt010_wdt, wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int ftwdt010_wdt_start(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u32 enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) writel(wdd->timeout * WDT_CLOCK, gwdt->base + FTWDT010_WDLOAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* set clock before enabling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) enable = WDCR_CLOCK_5MHZ | WDCR_SYS_RST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) writel(enable, gwdt->base + FTWDT010_WDCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (gwdt->has_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) enable |= WDCR_WDINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) enable |= WDCR_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) writel(enable, gwdt->base + FTWDT010_WDCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int ftwdt010_wdt_stop(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) writel(0, gwdt->base + FTWDT010_WDCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static int ftwdt010_wdt_ping(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int ftwdt010_wdt_set_timeout(struct watchdog_device *wdd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) wdd->timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (watchdog_active(wdd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ftwdt010_wdt_start(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static irqreturn_t ftwdt010_wdt_interrupt(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct ftwdt010_wdt *gwdt = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) watchdog_notify_pretimeout(&gwdt->wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static const struct watchdog_ops ftwdt010_wdt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .start = ftwdt010_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .stop = ftwdt010_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .ping = ftwdt010_wdt_ping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .set_timeout = ftwdt010_wdt_set_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static const struct watchdog_info ftwdt010_wdt_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .options = WDIOF_KEEPALIVEPING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) | WDIOF_MAGICCLOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) | WDIOF_SETTIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .identity = KBUILD_MODNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int ftwdt010_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct ftwdt010_wdt *gwdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (!gwdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) gwdt->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (IS_ERR(gwdt->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return PTR_ERR(gwdt->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) gwdt->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) gwdt->wdd.info = &ftwdt010_wdt_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) gwdt->wdd.ops = &ftwdt010_wdt_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) gwdt->wdd.min_timeout = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) gwdt->wdd.max_timeout = 0xFFFFFFFF / WDT_CLOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) gwdt->wdd.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * If 'timeout-sec' unspecified in devicetree, assume a 13 second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) gwdt->wdd.timeout = 13U;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) watchdog_init_timeout(&gwdt->wdd, 0, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) reg = readw(gwdt->base + FTWDT010_WDCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (reg & WDCR_ENABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* Watchdog was enabled by the bootloader, disable it. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) reg &= ~WDCR_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) writel(reg, gwdt->base + FTWDT010_WDCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ret = devm_request_irq(dev, irq, ftwdt010_wdt_interrupt, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) "watchdog bark", gwdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) gwdt->has_irq = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ret = devm_watchdog_register_device(dev, &gwdt->wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* Set up platform driver data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) platform_set_drvdata(pdev, gwdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) dev_info(dev, "FTWDT010 watchdog driver enabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int __maybe_unused ftwdt010_wdt_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) struct ftwdt010_wdt *gwdt = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) reg = readw(gwdt->base + FTWDT010_WDCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) reg &= ~WDCR_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) writel(reg, gwdt->base + FTWDT010_WDCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int __maybe_unused ftwdt010_wdt_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct ftwdt010_wdt *gwdt = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (watchdog_active(&gwdt->wdd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) reg = readw(gwdt->base + FTWDT010_WDCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) reg |= WDCR_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) writel(reg, gwdt->base + FTWDT010_WDCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const struct dev_pm_ops ftwdt010_wdt_dev_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) SET_SYSTEM_SLEEP_PM_OPS(ftwdt010_wdt_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) ftwdt010_wdt_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const struct of_device_id ftwdt010_wdt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) { .compatible = "faraday,ftwdt010" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) { .compatible = "cortina,gemini-watchdog" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) MODULE_DEVICE_TABLE(of, ftwdt010_wdt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static struct platform_driver ftwdt010_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .probe = ftwdt010_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .name = "ftwdt010-wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .of_match_table = of_match_ptr(ftwdt010_wdt_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .pm = &ftwdt010_wdt_dev_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) module_platform_driver(ftwdt010_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) MODULE_AUTHOR("Linus Walleij");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) MODULE_DESCRIPTION("Watchdog driver for Faraday Technology FTWDT010");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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