^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /***************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) ***************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/notifier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DRVNAME "f71808e_wdt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define SIO_REG_LDSEL 0x07 /* Logical device select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define SIO_REG_DEVREV 0x22 /* Device revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define SIO_REG_CLOCK_SEL 0x26 /* Clock select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define SIO_REG_TSI_LEVEL_SEL 0x28 /* TSI Level select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define SIO_F81866_REG_GPIO1 0x2c /* F81866 GPIO1 Enable Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define SIO_REG_ENABLE 0x30 /* Logical device enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define SIO_F71808_ID 0x0901 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define SIO_F71858_ID 0x0507 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define SIO_F71862_ID 0x0601 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define SIO_F71868_ID 0x1106 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define SIO_F71869_ID 0x0814 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define SIO_F71869A_ID 0x1007 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define SIO_F71882_ID 0x0541 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define SIO_F71889_ID 0x0723 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define SIO_F81803_ID 0x1210 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define SIO_F81865_ID 0x0704 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define SIO_F81866_ID 0x1010 /* Chipset ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define F71808FG_REG_WDO_CONF 0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define F71808FG_REG_WDT_CONF 0xf5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define F71808FG_REG_WD_TIME 0xf6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define F71808FG_FLAG_WDOUT_EN 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define F71808FG_FLAG_WDTMOUT_STS 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define F71808FG_FLAG_WD_EN 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define F71808FG_FLAG_WD_PULSE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define F71808FG_FLAG_WD_UNIT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define F81865_REG_WDO_CONF 0xfa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define F81865_FLAG_WDOUT_EN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Default values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define WATCHDOG_MAX_TIMEOUT (60 * 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) watchdog signal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) pin number 63 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static unsigned short force_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) module_param(force_id, ushort, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MODULE_PARM_DESC(force_id, "Override the detected device ID");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) module_param(timeout, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MODULE_PARM_DESC(timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) "Watchdog timeout in seconds. 1<= timeout <="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) module_param(pulse_width, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MODULE_PARM_DESC(pulse_width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) "Watchdog signal pulse width. 0(=level), 1, 25, 30, 125, 150, 5000 or 6000 ms"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) module_param(f71862fg_pin, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) MODULE_PARM_DESC(f71862fg_pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static bool nowayout = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) module_param(nowayout, bool, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static unsigned int start_withtimeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) module_param(start_withtimeout, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) " given initial timeout. Zero (default) disables this feature.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) enum chips { f71808fg, f71858fg, f71862fg, f71868, f71869, f71882fg, f71889fg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) f81803, f81865, f81866};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static const char *f71808e_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) "f71808fg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) "f71858fg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) "f71862fg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) "f71868",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) "f71869",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) "f71882fg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) "f71889fg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) "f81803",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) "f81865",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) "f81866",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Super-I/O Function prototypes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static inline int superio_inb(int base, int reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static inline int superio_inw(int base, int reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static inline void superio_outb(int base, int reg, u8 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static inline void superio_set_bit(int base, int reg, int bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static inline void superio_clear_bit(int base, int reg, int bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static inline int superio_enter(int base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static inline void superio_select(int base, int ld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static inline void superio_exit(int base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct watchdog_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned short sioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) enum chips type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned long opened;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) char expect_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct watchdog_info ident;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) unsigned short timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u8 timer_val; /* content for the wd_time register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) char minutes_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) u8 pulse_val; /* pulse width flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) char pulse_mode; /* enable pulse output mode? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) char caused_reboot; /* last reboot was by the watchdog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static struct watchdog_data watchdog = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .lock = __MUTEX_INITIALIZER(watchdog.lock),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* Super I/O functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static inline int superio_inb(int base, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) outb(reg, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return inb(base + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static int superio_inw(int base, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) val = superio_inb(base, reg) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) val |= superio_inb(base, reg + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static inline void superio_outb(int base, int reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) outb(reg, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) outb(val, base + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static inline void superio_set_bit(int base, int reg, int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) unsigned long val = superio_inb(base, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) __set_bit(bit, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) superio_outb(base, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static inline void superio_clear_bit(int base, int reg, int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) unsigned long val = superio_inb(base, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) __clear_bit(bit, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) superio_outb(base, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static inline int superio_enter(int base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* Don't step on other drivers' I/O space by accident */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (!request_muxed_region(base, 2, DRVNAME)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) pr_err("I/O address 0x%04x already in use\n", (int)base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* according to the datasheet the key must be sent twice! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) outb(SIO_UNLOCK_KEY, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) outb(SIO_UNLOCK_KEY, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static inline void superio_select(int base, int ld)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) outb(SIO_REG_LDSEL, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) outb(ld, base + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static inline void superio_exit(int base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) outb(SIO_LOCK_KEY, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) release_region(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static int watchdog_set_timeout(int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (timeout <= 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) || timeout > max_timeout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) pr_err("watchdog timeout out of range\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) mutex_lock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (timeout > 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) watchdog.minutes_mode = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) timeout = watchdog.timer_val * 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) watchdog.timer_val = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) watchdog.minutes_mode = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) watchdog.timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static int watchdog_set_pulse_width(unsigned int pw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) unsigned int t1 = 25, t2 = 125, t3 = 5000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (watchdog.type == f71868) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) t1 = 30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) t2 = 150;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) t3 = 6000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) mutex_lock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (pw <= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) watchdog.pulse_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) } else if (pw <= t1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) watchdog.pulse_val = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) } else if (pw <= t2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) watchdog.pulse_val = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) } else if (pw <= t3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) watchdog.pulse_val = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) pr_err("pulse width out of range\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) goto exit_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) watchdog.pulse_mode = pw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) exit_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static int watchdog_keepalive(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) mutex_lock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) err = superio_enter(watchdog.sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) goto exit_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (watchdog.minutes_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* select minutes for timer units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) F71808FG_FLAG_WD_UNIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /* select seconds for timer units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) F71808FG_FLAG_WD_UNIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /* Set timer value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) watchdog.timer_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) superio_exit(watchdog.sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) exit_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static int watchdog_start(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* Make sure we don't die as soon as the watchdog is enabled below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) err = watchdog_keepalive();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) mutex_lock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) err = superio_enter(watchdog.sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) goto exit_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* Watchdog pin configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) switch (watchdog.type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) case f71808fg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) case f71862fg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (f71862fg_pin == 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) /* SPI must be disabled first to use this pin! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) superio_clear_bit(watchdog.sioaddr, SIO_REG_ROM_ADDR_SEL, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) } else if (f71862fg_pin == 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) case f71868:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) case f71869:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* GPIO14 --> WDTRST# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) case f71882fg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* Set pin 56 to WDTRST# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) case f71889fg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /* set pin 40 to WDTRST# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) case f81803:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* Enable TSI Level register bank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) superio_clear_bit(watchdog.sioaddr, SIO_REG_CLOCK_SEL, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /* Set pin 27 to WDTRST# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) superio_outb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL, 0x5f &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) superio_inb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) case f81865:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /* Set pin 70 to WDTRST# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) case f81866:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * BIT5: 0 -> WDTRST#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * 1 -> GPIO15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) tmp = superio_inb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) tmp &= ~(BIT(3) | BIT(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) tmp |= BIT(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) superio_outb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * 'default' label to shut up the compiler and catch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * programmer errors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) goto exit_superio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (watchdog.type == f81865 || watchdog.type == f81866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) F81865_FLAG_WDOUT_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) F71808FG_FLAG_WDOUT_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) F71808FG_FLAG_WD_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) if (watchdog.pulse_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* Select "pulse" output mode with given duration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) u8 wdt_conf = superio_inb(watchdog.sioaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) F71808FG_REG_WDT_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) /* Set WD_PSWIDTH bits (1:0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) /* Set WD_PULSE to "pulse" mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) wdt_conf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) /* Select "level" output mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) F71808FG_FLAG_WD_PULSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) exit_superio:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) superio_exit(watchdog.sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) exit_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static int watchdog_stop(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) mutex_lock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) err = superio_enter(watchdog.sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) goto exit_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) F71808FG_FLAG_WD_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) superio_exit(watchdog.sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) exit_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static int watchdog_get_status(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) mutex_lock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) static bool watchdog_is_running(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * if we fail to determine the watchdog's status assume it to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) * running to be on the safe side
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) bool is_running = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) mutex_lock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (superio_enter(watchdog.sioaddr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) goto exit_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) & BIT(F71808FG_FLAG_WD_EN));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) superio_exit(watchdog.sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) exit_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return is_running;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) /* /dev/watchdog api */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) static int watchdog_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* If the watchdog is alive we don't need to start it again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (test_and_set_bit(0, &watchdog.opened))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) err = watchdog_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) clear_bit(0, &watchdog.opened);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (nowayout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) __module_get(THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) watchdog.expect_close = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return stream_open(inode, file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static int watchdog_release(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) clear_bit(0, &watchdog.opened);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) if (!watchdog.expect_close) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) watchdog_keepalive();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) pr_crit("Unexpected close, not stopping watchdog!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) } else if (!nowayout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) watchdog_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * watchdog_write:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * @file: file handle to the watchdog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * @buf: buffer to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * @count: count of bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * @ppos: pointer to the position to write. No seeks allowed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) * A write to a watchdog device is defined as a keepalive signal. Any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) * write of data will do, as we we don't define content meaning.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static ssize_t watchdog_write(struct file *file, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (!nowayout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) size_t i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) /* In case it was set long ago */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) bool expect_close = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) for (i = 0; i != count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) char c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (get_user(c, buf + i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (c == 'V')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) expect_close = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /* Properly order writes across fork()ed processes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) mutex_lock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) watchdog.expect_close = expect_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /* someone wrote to us, we should restart timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) watchdog_keepalive();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * watchdog_ioctl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) * @inode: inode of the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * @file: file handle to the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) * @cmd: watchdog command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * @arg: argument pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) * The watchdog API defines a common set of functions for all watchdogs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * according to their available features.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static long watchdog_ioctl(struct file *file, unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) int new_options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) int new_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) struct watchdog_info __user *ident;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) int __user *i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) } uarg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) uarg.i = (int __user *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) case WDIOC_GETSUPPORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) return copy_to_user(uarg.ident, &watchdog.ident,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) sizeof(watchdog.ident)) ? -EFAULT : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) case WDIOC_GETSTATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) status = watchdog_get_status();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) return put_user(status, uarg.i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) case WDIOC_GETBOOTSTATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) return put_user(0, uarg.i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) case WDIOC_SETOPTIONS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (get_user(new_options, uarg.i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (new_options & WDIOS_DISABLECARD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) watchdog_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) if (new_options & WDIOS_ENABLECARD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) return watchdog_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) case WDIOC_KEEPALIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) watchdog_keepalive();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) case WDIOC_SETTIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (get_user(new_timeout, uarg.i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (watchdog_set_timeout(new_timeout))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) watchdog_keepalive();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) case WDIOC_GETTIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) return put_user(watchdog.timeout, uarg.i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) return -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) void *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) if (code == SYS_DOWN || code == SYS_HALT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) watchdog_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) static const struct file_operations watchdog_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) .llseek = no_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) .open = watchdog_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) .release = watchdog_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) .write = watchdog_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .unlocked_ioctl = watchdog_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) .compat_ioctl = compat_ptr_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) static struct miscdevice watchdog_miscdev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) .minor = WATCHDOG_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) .name = "watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .fops = &watchdog_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) static struct notifier_block watchdog_notifier = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .notifier_call = watchdog_notify_sys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) static int __init watchdog_init(int sioaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) int wdt_conf, err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) /* No need to lock watchdog.lock here because no entry points
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) * into the module have been registered yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) watchdog.sioaddr = sioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) watchdog.ident.options = WDIOF_MAGICCLOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) | WDIOF_KEEPALIVEPING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) | WDIOF_CARDRESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) snprintf(watchdog.ident.identity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) sizeof(watchdog.ident.identity), "%s watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) f71808e_names[watchdog.type]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) err = superio_enter(sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) * We don't want WDTMOUT_STS to stick around till regular reboot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) * Write 1 to the bit to clear it to zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) superio_outb(sioaddr, F71808FG_REG_WDT_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) wdt_conf | BIT(F71808FG_FLAG_WDTMOUT_STS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) superio_exit(sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) err = watchdog_set_timeout(timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) err = watchdog_set_pulse_width(pulse_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) err = register_reboot_notifier(&watchdog_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) err = misc_register(&watchdog_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) pr_err("cannot register miscdev on minor=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) watchdog_miscdev.minor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) goto exit_reboot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (start_withtimeout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) if (start_withtimeout <= 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) || start_withtimeout > max_timeout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) pr_err("starting timeout out of range\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) goto exit_miscdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) err = watchdog_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) pr_err("cannot start watchdog timer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) goto exit_miscdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) mutex_lock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) err = superio_enter(sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) goto exit_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) if (start_withtimeout > 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) /* select minutes for timer units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) F71808FG_FLAG_WD_UNIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) superio_outb(sioaddr, F71808FG_REG_WD_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) DIV_ROUND_UP(start_withtimeout, 60));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) /* select seconds for timer units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) F71808FG_FLAG_WD_UNIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) superio_outb(sioaddr, F71808FG_REG_WD_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) start_withtimeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) superio_exit(sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) if (nowayout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) __module_get(THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) pr_info("watchdog started with initial timeout of %u sec\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) start_withtimeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) exit_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) mutex_unlock(&watchdog.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) exit_miscdev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) misc_deregister(&watchdog_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) exit_reboot:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) unregister_reboot_notifier(&watchdog_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) static int __init f71808e_find(int sioaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) u16 devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) int err = superio_enter(sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) devid = superio_inw(sioaddr, SIO_REG_MANID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) if (devid != SIO_FINTEK_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) pr_debug("Not a Fintek device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) switch (devid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) case SIO_F71808_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) watchdog.type = f71808fg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) case SIO_F71862_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) watchdog.type = f71862fg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) case SIO_F71868_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) watchdog.type = f71868;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) case SIO_F71869_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) case SIO_F71869A_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) watchdog.type = f71869;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) case SIO_F71882_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) watchdog.type = f71882fg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) case SIO_F71889_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) watchdog.type = f71889fg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) case SIO_F71858_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) /* Confirmed (by datasheet) not to have a watchdog. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) case SIO_F81803_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) watchdog.type = f81803;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) case SIO_F81865_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) watchdog.type = f81865;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) case SIO_F81866_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) watchdog.type = f81866;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) pr_info("Unrecognized Fintek device: %04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) (unsigned int)devid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) pr_info("Found %s watchdog chip, revision %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) f71808e_names[watchdog.type],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) (int)superio_inb(sioaddr, SIO_REG_DEVREV));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) superio_exit(sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) static int __init f71808e_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) static const unsigned short addrs[] = { 0x2e, 0x4e };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) int err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) if (f71862fg_pin != 63 && f71862fg_pin != 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) for (i = 0; i < ARRAY_SIZE(addrs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) err = f71808e_find(addrs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) if (err == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) if (i == ARRAY_SIZE(addrs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) return watchdog_init(addrs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) static void __exit f71808e_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) if (watchdog_is_running()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) pr_warn("Watchdog timer still running, stopping it\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) watchdog_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) misc_deregister(&watchdog_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) unregister_reboot_notifier(&watchdog_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) MODULE_DESCRIPTION("F71808E Watchdog Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) module_init(f71808e_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) module_exit(f71808e_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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