^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Watchdog device driver for DA9062 and DA9061 PMICs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2015 Dialog Semiconductor Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mfd/da9062/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mfd/da9062/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static const unsigned int wdt_timeout[] = { 0, 2, 4, 8, 16, 32, 65, 131 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DA9062_TWDSCALE_DISABLE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DA9062_TWDSCALE_MIN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DA9062_TWDSCALE_MAX (ARRAY_SIZE(wdt_timeout) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DA9062_WDT_MIN_TIMEOUT wdt_timeout[DA9062_TWDSCALE_MIN]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DA9062_WDT_MAX_TIMEOUT wdt_timeout[DA9062_TWDSCALE_MAX]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DA9062_WDG_DEFAULT_TIMEOUT wdt_timeout[DA9062_TWDSCALE_MAX-1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DA9062_RESET_PROTECTION_MS 300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct da9062_watchdog {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct da9062 *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct watchdog_device wdtdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) bool use_sw_pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static unsigned int da9062_wdt_read_timeout(struct da9062_watchdog *wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) regmap_read(wdt->hw->regmap, DA9062AA_CONTROL_D, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return wdt_timeout[val & DA9062AA_TWDSCALE_MASK];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static unsigned int da9062_wdt_timeout_to_sel(unsigned int secs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) for (i = DA9062_TWDSCALE_MIN; i <= DA9062_TWDSCALE_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (wdt_timeout[i] >= secs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return DA9062_TWDSCALE_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int da9062_reset_watchdog_timer(struct da9062_watchdog *wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return regmap_update_bits(wdt->hw->regmap, DA9062AA_CONTROL_F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) DA9062AA_WATCHDOG_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) DA9062AA_WATCHDOG_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static int da9062_wdt_update_timeout_register(struct da9062_watchdog *wdt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) unsigned int regval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct da9062 *chip = wdt->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) regmap_update_bits(chip->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) DA9062AA_CONTROL_D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) DA9062AA_TWDSCALE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) DA9062_TWDSCALE_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) usleep_range(150, 300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return regmap_update_bits(chip->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) DA9062AA_CONTROL_D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) DA9062AA_TWDSCALE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static int da9062_wdt_start(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct da9062_watchdog *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned int selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) selector = da9062_wdt_timeout_to_sel(wdt->wdtdev.timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ret = da9062_wdt_update_timeout_register(wdt, selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) dev_err(wdt->hw->dev, "Watchdog failed to start (err = %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static int da9062_wdt_stop(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct da9062_watchdog *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ret = regmap_update_bits(wdt->hw->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) DA9062AA_CONTROL_D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) DA9062AA_TWDSCALE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) DA9062_TWDSCALE_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) dev_err(wdt->hw->dev, "Watchdog failed to stop (err = %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int da9062_wdt_ping(struct watchdog_device *wdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct da9062_watchdog *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ret = da9062_reset_watchdog_timer(wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) dev_err(wdt->hw->dev, "Failed to ping the watchdog (err = %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int da9062_wdt_set_timeout(struct watchdog_device *wdd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct da9062_watchdog *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned int selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) selector = da9062_wdt_timeout_to_sel(timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ret = da9062_wdt_update_timeout_register(wdt, selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) dev_err(wdt->hw->dev, "Failed to set watchdog timeout (err = %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) wdd->timeout = wdt_timeout[selector];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static int da9062_wdt_restart(struct watchdog_device *wdd, unsigned long action,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct da9062_watchdog *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct i2c_client *client = to_i2c_client(wdt->hw->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* Don't use regmap because it is not atomic safe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) ret = i2c_smbus_write_byte_data(client, DA9062AA_CONTROL_F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) DA9062AA_SHUTDOWN_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) dev_alert(wdt->hw->dev, "Failed to shutdown (err = %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* wait for reset to assert... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) mdelay(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static const struct watchdog_info da9062_watchdog_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .identity = "DA9062 WDT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static const struct watchdog_ops da9062_watchdog_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .start = da9062_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .stop = da9062_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .ping = da9062_wdt_ping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .set_timeout = da9062_wdt_set_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .restart = da9062_wdt_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static const struct of_device_id da9062_compatible_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { .compatible = "dlg,da9062-watchdog", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MODULE_DEVICE_TABLE(of, da9062_compatible_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static int da9062_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) unsigned int timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct da9062 *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct da9062_watchdog *wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) chip = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (!wdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) wdt->use_sw_pm = device_property_present(dev, "dlg,use-sw-pm");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) wdt->hw = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) wdt->wdtdev.info = &da9062_watchdog_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) wdt->wdtdev.ops = &da9062_watchdog_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) wdt->wdtdev.min_timeout = DA9062_WDT_MIN_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) wdt->wdtdev.max_timeout = DA9062_WDT_MAX_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) wdt->wdtdev.min_hw_heartbeat_ms = DA9062_RESET_PROTECTION_MS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) wdt->wdtdev.timeout = DA9062_WDG_DEFAULT_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) wdt->wdtdev.status = WATCHDOG_NOWAYOUT_INIT_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) wdt->wdtdev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) watchdog_set_restart_priority(&wdt->wdtdev, 128);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) watchdog_set_drvdata(&wdt->wdtdev, wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) dev_set_drvdata(dev, &wdt->wdtdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) timeout = da9062_wdt_read_timeout(wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) wdt->wdtdev.timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* Set timeout from DT value if available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) watchdog_init_timeout(&wdt->wdtdev, 0, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (timeout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) da9062_wdt_set_timeout(&wdt->wdtdev, wdt->wdtdev.timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) set_bit(WDOG_HW_RUNNING, &wdt->wdtdev.status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return devm_watchdog_register_device(dev, &wdt->wdtdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static int __maybe_unused da9062_wdt_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct watchdog_device *wdd = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct da9062_watchdog *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (!wdt->use_sw_pm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (watchdog_active(wdd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return da9062_wdt_stop(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static int __maybe_unused da9062_wdt_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct watchdog_device *wdd = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct da9062_watchdog *wdt = watchdog_get_drvdata(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (!wdt->use_sw_pm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (watchdog_active(wdd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return da9062_wdt_start(wdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static SIMPLE_DEV_PM_OPS(da9062_wdt_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) da9062_wdt_suspend, da9062_wdt_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static struct platform_driver da9062_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .probe = da9062_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .name = "da9062-watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .pm = &da9062_wdt_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .of_match_table = da9062_compatible_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) module_platform_driver(da9062_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) MODULE_AUTHOR("S Twiss <stwiss.opensource@diasemi.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) MODULE_DESCRIPTION("WDT device driver for Dialog DA9062 and DA9061");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) MODULE_ALIAS("platform:da9062-watchdog");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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