^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * System monitoring driver for DA9052 PMICs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright(c) 2012 Dialog Semiconductor Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Anthony Olech <Anthony.Olech@diasemi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mfd/da9052/reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/mfd/da9052/da9052.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DA9052_DEF_TIMEOUT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DA9052_TWDMIN 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct da9052_wdt_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct watchdog_device wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct da9052 *da9052;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned long jpast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u8 reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int time; /* Seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) } da9052_wdt_maps[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) { 1, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) { 2, 4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) { 3, 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) { 4, 16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) { 5, 32 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { 5, 33 }, /* Actual time 32.768s so included both 32s and 33s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) { 6, 65 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { 6, 66 }, /* Actual time 65.536s so include both, 65s and 66s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) { 7, 131 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int da9052_wdt_set_timeout(struct watchdog_device *wdt_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct da9052_wdt_data *driver_data = watchdog_get_drvdata(wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct da9052 *da9052 = driver_data->da9052;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * Disable the Watchdog timer before setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * new time out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) DA9052_CONTROLD_TWDSCALE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) dev_err(da9052->dev, "Failed to disable watchdog bit, %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (timeout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * To change the timeout, da9052 needs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * be disabled for at least 150 us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) udelay(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Set the desired timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) for (i = 0; i < ARRAY_SIZE(da9052_wdt_maps); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (da9052_wdt_maps[i].time == timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (i == ARRAY_SIZE(da9052_wdt_maps))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) DA9052_CONTROLD_TWDSCALE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) da9052_wdt_maps[i].reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) dev_err(da9052->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) "Failed to update timescale bit, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) wdt_dev->timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) driver_data->jpast = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static int da9052_wdt_start(struct watchdog_device *wdt_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return da9052_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int da9052_wdt_stop(struct watchdog_device *wdt_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return da9052_wdt_set_timeout(wdt_dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static int da9052_wdt_ping(struct watchdog_device *wdt_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct da9052_wdt_data *driver_data = watchdog_get_drvdata(wdt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct da9052 *da9052 = driver_data->da9052;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) unsigned long msec, jnow = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * We have a minimum time for watchdog window called TWDMIN. A write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * to the watchdog before this elapsed time should cause an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) msec = (jnow - driver_data->jpast) * 1000/HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (msec < DA9052_TWDMIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) mdelay(msec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* Reset the watchdog timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) DA9052_CONTROLD_WATCHDOG, 1 << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * FIXME: Reset the watchdog core, in general PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * is supposed to do this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) DA9052_CONTROLD_WATCHDOG, 0 << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct watchdog_info da9052_wdt_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .identity = "DA9052 Watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static const struct watchdog_ops da9052_wdt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .start = da9052_wdt_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .stop = da9052_wdt_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .ping = da9052_wdt_ping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .set_timeout = da9052_wdt_set_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int da9052_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct da9052 *da9052 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct da9052_wdt_data *driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct watchdog_device *da9052_wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) driver_data = devm_kzalloc(dev, sizeof(*driver_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (!driver_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) driver_data->da9052 = da9052;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) da9052_wdt = &driver_data->wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) da9052_wdt->timeout = DA9052_DEF_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) da9052_wdt->info = &da9052_wdt_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) da9052_wdt->ops = &da9052_wdt_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) da9052_wdt->parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) watchdog_set_drvdata(da9052_wdt, driver_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) DA9052_CONTROLD_TWDSCALE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) dev_err(dev, "Failed to disable watchdog bits, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return devm_watchdog_register_device(dev, &driver_data->wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static struct platform_driver da9052_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .probe = da9052_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .name = "da9052-watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) module_platform_driver(da9052_wdt_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) MODULE_AUTHOR("Anthony Olech <Anthony.Olech@diasemi.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) MODULE_DESCRIPTION("DA9052 SM Device Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MODULE_ALIAS("platform:da9052-watchdog");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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