Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * sma cpu5 watchdog driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /* adjustable parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static int verbose;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static int port = 0x91;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static int ticks = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static DEFINE_SPINLOCK(cpu5wdt_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define PFX			"cpu5wdt: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define CPU5WDT_EXTENT          0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define CPU5WDT_STATUS_REG      0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define CPU5WDT_TIME_A_REG      0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define CPU5WDT_TIME_B_REG      0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define CPU5WDT_MODE_REG        0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define CPU5WDT_TRIGGER_REG     0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define CPU5WDT_ENABLE_REG      0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define CPU5WDT_RESET_REG       0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define CPU5WDT_INTERVAL	(HZ/10+1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) /* some device data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct completion stop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	int running;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct timer_list timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	int queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	int default_ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	unsigned long inuse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) } cpu5wdt_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) /* generic helper functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static void cpu5wdt_trigger(struct timer_list *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (verbose > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		pr_debug("trigger at %i ticks\n", ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	if (cpu5wdt_device.running)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		ticks--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	spin_lock(&cpu5wdt_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	/* keep watchdog alive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	outb(1, port + CPU5WDT_TRIGGER_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	/* requeue?? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	if (cpu5wdt_device.queue && ticks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		/* ticks doesn't matter anyway */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		complete(&cpu5wdt_device.stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	spin_unlock(&cpu5wdt_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static void cpu5wdt_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	ticks = cpu5wdt_device.default_ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	if (verbose)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		pr_debug("reset (%i ticks)\n", (int) ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static void cpu5wdt_start(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	spin_lock_irqsave(&cpu5wdt_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (!cpu5wdt_device.queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		cpu5wdt_device.queue = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		outb(0, port + CPU5WDT_TIME_A_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		outb(0, port + CPU5WDT_TIME_B_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		outb(1, port + CPU5WDT_MODE_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		outb(0, port + CPU5WDT_RESET_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		outb(0, port + CPU5WDT_ENABLE_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	/* if process dies, counter is not decremented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	cpu5wdt_device.running++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	spin_unlock_irqrestore(&cpu5wdt_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int cpu5wdt_stop(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	spin_lock_irqsave(&cpu5wdt_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (cpu5wdt_device.running)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		cpu5wdt_device.running = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	ticks = cpu5wdt_device.default_ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	spin_unlock_irqrestore(&cpu5wdt_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (verbose)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		pr_crit("stop not possible\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* filesystem operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int cpu5wdt_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	if (test_and_set_bit(0, &cpu5wdt_device.inuse))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	return stream_open(inode, file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int cpu5wdt_release(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	clear_bit(0, &cpu5wdt_device.inuse);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static long cpu5wdt_ioctl(struct file *file, unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 						unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	void __user *argp = (void __user *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	int __user *p = argp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	unsigned int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	static const struct watchdog_info ident = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		.options = WDIOF_CARDRESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		.identity = "CPU5 WDT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	case WDIOC_GETSUPPORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		if (copy_to_user(argp, &ident, sizeof(ident)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	case WDIOC_GETSTATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		value = inb(port + CPU5WDT_STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		value = (value >> 2) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		return put_user(value, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	case WDIOC_GETBOOTSTATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		return put_user(0, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	case WDIOC_SETOPTIONS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		if (get_user(value, p))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		if (value & WDIOS_ENABLECARD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			cpu5wdt_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		if (value & WDIOS_DISABLECARD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			cpu5wdt_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	case WDIOC_KEEPALIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		cpu5wdt_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		return -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static ssize_t cpu5wdt_write(struct file *file, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 						size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (!count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	cpu5wdt_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const struct file_operations cpu5wdt_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.owner		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.llseek		= no_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.unlocked_ioctl	= cpu5wdt_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	.compat_ioctl	= compat_ptr_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	.open		= cpu5wdt_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	.write		= cpu5wdt_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	.release	= cpu5wdt_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static struct miscdevice cpu5wdt_misc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	.minor	= WATCHDOG_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	.name	= "watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.fops	= &cpu5wdt_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* init/exit function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static int cpu5wdt_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	if (verbose)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		pr_debug("port=0x%x, verbose=%i\n", port, verbose);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	init_completion(&cpu5wdt_device.stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	cpu5wdt_device.queue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	timer_setup(&cpu5wdt_device.timer, cpu5wdt_trigger, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	cpu5wdt_device.default_ticks = ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (!request_region(port, CPU5WDT_EXTENT, PFX)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		pr_err("request_region failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		err = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		goto no_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	/* watchdog reboot? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	val = inb(port + CPU5WDT_STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	val = (val >> 2) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (!val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		pr_info("sorry, was my fault\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	err = misc_register(&cpu5wdt_misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		pr_err("misc_register failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		goto no_misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	pr_info("init success\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) no_misc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	release_region(port, CPU5WDT_EXTENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) no_port:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static int cpu5wdt_init_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	return cpu5wdt_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static void cpu5wdt_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (cpu5wdt_device.queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		cpu5wdt_device.queue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		wait_for_completion(&cpu5wdt_device.stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		del_timer(&cpu5wdt_device.timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	misc_deregister(&cpu5wdt_misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	release_region(port, CPU5WDT_EXTENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static void cpu5wdt_exit_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	cpu5wdt_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* module entry points */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) module_init(cpu5wdt_init_module);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) module_exit(cpu5wdt_exit_module);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) MODULE_DESCRIPTION("sma cpu5 watchdog driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) module_param_hw(port, int, ioport, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) module_param(verbose, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) module_param(ticks, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");