Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * drivers/watchdog/ar7_wdt.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Some code taken from:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * National Semiconductor SCx200 Watchdog support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/watchdog.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/addrspace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <asm/mach-ar7/ar7.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define LONGNAME "TI AR7 Watchdog Timer"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) MODULE_DESCRIPTION(LONGNAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) static int margin = 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) module_param(margin, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) MODULE_PARM_DESC(margin, "Watchdog margin in seconds");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static bool nowayout = WATCHDOG_NOWAYOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) module_param(nowayout, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define READ_REG(x) readl((void __iomem *)&(x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define WRITE_REG(x, v) writel((v), (void __iomem *)&(x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) struct ar7_wdt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	u32 kick_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	u32 kick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	u32 change_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u32 change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	u32 disable_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	u32 disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u32 prescale_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	u32 prescale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static unsigned long wdt_is_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static unsigned expect_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static DEFINE_SPINLOCK(wdt_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) /* XXX currently fixed, allows max margin ~68.72 secs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define prescale_value 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) /* Resource of the WDT registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static struct resource *ar7_regs_wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) /* Pointer to the remapped WDT IO space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static struct ar7_wdt *ar7_wdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static struct clk *vbus_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static void ar7_wdt_kick(u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	WRITE_REG(ar7_wdt->kick_lock, 0x5555);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		WRITE_REG(ar7_wdt->kick_lock, 0xaaaa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			WRITE_REG(ar7_wdt->kick, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	pr_err("failed to unlock WDT kick reg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static void ar7_wdt_prescale(u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			WRITE_REG(ar7_wdt->prescale, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	pr_err("failed to unlock WDT prescale reg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static void ar7_wdt_change(u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	WRITE_REG(ar7_wdt->change_lock, 0x6666);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		WRITE_REG(ar7_wdt->change_lock, 0xbbbb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			WRITE_REG(ar7_wdt->change, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	pr_err("failed to unlock WDT change reg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static void ar7_wdt_disable(u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	WRITE_REG(ar7_wdt->disable_lock, 0x7777);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		WRITE_REG(ar7_wdt->disable_lock, 0xcccc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			WRITE_REG(ar7_wdt->disable_lock, 0xdddd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 				WRITE_REG(ar7_wdt->disable, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 				return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	pr_err("failed to unlock WDT disable reg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static void ar7_wdt_update_margin(int new_margin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	u32 change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	u32 vbus_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	vbus_rate = clk_get_rate(vbus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	change = new_margin * (vbus_rate / prescale_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if (change < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		change = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (change > 0xffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		change = 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	ar7_wdt_change(change);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	margin = change * prescale_value / vbus_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	pr_info("timer margin %d seconds (prescale %d, change %d, freq %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		margin, prescale_value, change, vbus_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static void ar7_wdt_enable_wdt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	pr_debug("enabling watchdog timer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	ar7_wdt_disable(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	ar7_wdt_kick(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static void ar7_wdt_disable_wdt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	pr_debug("disabling watchdog timer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	ar7_wdt_disable(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static int ar7_wdt_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	/* only allow one at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (test_and_set_bit(0, &wdt_is_open))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	ar7_wdt_enable_wdt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	expect_close = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	return stream_open(inode, file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static int ar7_wdt_release(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	if (!expect_close)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	else if (!nowayout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		ar7_wdt_disable_wdt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	clear_bit(0, &wdt_is_open);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static ssize_t ar7_wdt_write(struct file *file, const char *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			     size_t len, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	/* check for a magic close character */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	if (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		size_t i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		spin_lock(&wdt_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		ar7_wdt_kick(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		spin_unlock(&wdt_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		expect_close = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		for (i = 0; i < len; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 			char c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 			if (get_user(c, data + i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 				return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			if (c == 'V')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 				expect_close = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static long ar7_wdt_ioctl(struct file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 					unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	static const struct watchdog_info ident = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		.identity = LONGNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		.firmware_version = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		.options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 						WDIOF_MAGICCLOSE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	int new_margin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	case WDIOC_GETSUPPORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		if (copy_to_user((struct watchdog_info *)arg, &ident,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 				sizeof(ident)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	case WDIOC_GETSTATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	case WDIOC_GETBOOTSTATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		if (put_user(0, (int *)arg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	case WDIOC_KEEPALIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		ar7_wdt_kick(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	case WDIOC_SETTIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		if (get_user(new_margin, (int *)arg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		if (new_margin < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		spin_lock(&wdt_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		ar7_wdt_update_margin(new_margin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		ar7_wdt_kick(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		spin_unlock(&wdt_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	case WDIOC_GETTIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		if (put_user(margin, (int *)arg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		return -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static const struct file_operations ar7_wdt_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	.owner		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	.write		= ar7_wdt_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	.unlocked_ioctl	= ar7_wdt_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	.compat_ioctl	= compat_ptr_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	.open		= ar7_wdt_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	.release	= ar7_wdt_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	.llseek		= no_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static struct miscdevice ar7_wdt_miscdev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	.minor		= WATCHDOG_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	.name		= "watchdog",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	.fops		= &ar7_wdt_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static int ar7_wdt_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	ar7_regs_wdt =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	if (IS_ERR(ar7_wdt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		return PTR_ERR(ar7_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	vbus_clk = clk_get(NULL, "vbus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	if (IS_ERR(vbus_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		pr_err("could not get vbus clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		return PTR_ERR(vbus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	ar7_wdt_disable_wdt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	ar7_wdt_prescale(prescale_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	ar7_wdt_update_margin(margin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	rc = misc_register(&ar7_wdt_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		pr_err("unable to register misc device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	clk_put(vbus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	vbus_clk = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static int ar7_wdt_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	misc_deregister(&ar7_wdt_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	clk_put(vbus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	vbus_clk = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static void ar7_wdt_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	if (!nowayout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		ar7_wdt_disable_wdt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static struct platform_driver ar7_wdt_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	.probe = ar7_wdt_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	.remove = ar7_wdt_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	.shutdown = ar7_wdt_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		.name = "ar7_wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) module_platform_driver(ar7_wdt_driver);