Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * 1-Wire implementation for the ds2438 chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2017 Mariusz Bialonczyk <manio@skyboo.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/w1.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define W1_FAMILY_DS2438		0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define W1_DS2438_RETRIES		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) /* Memory commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define W1_DS2438_READ_SCRATCH		0xBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define W1_DS2438_WRITE_SCRATCH		0x4E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define W1_DS2438_COPY_SCRATCH		0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define W1_DS2438_RECALL_MEMORY		0xB8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /* Register commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define W1_DS2438_CONVERT_TEMP		0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define W1_DS2438_CONVERT_VOLTAGE	0xB4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define DS2438_PAGE_SIZE		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define DS2438_ADC_INPUT_VAD		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define DS2438_ADC_INPUT_VDD		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define DS2438_MAX_CONVERSION_TIME	10		/* ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /* Page #0 definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define DS2438_STATUS_REG		0x00		/* Status/Configuration Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define DS2438_STATUS_IAD		(1 << 0)	/* Current A/D Control Bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define DS2438_STATUS_CA		(1 << 1)	/* Current Accumulator Configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define DS2438_STATUS_EE		(1 << 2)	/* Current Accumulator Shadow Selector bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define DS2438_STATUS_AD		(1 << 3)	/* Voltage A/D Input Select Bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define DS2438_STATUS_TB		(1 << 4)	/* Temperature Busy Flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define DS2438_STATUS_NVB		(1 << 5)	/* Nonvolatile Memory Busy Flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define DS2438_STATUS_ADB		(1 << 6)	/* A/D Converter Busy Flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define DS2438_TEMP_LSB			0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define DS2438_TEMP_MSB			0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define DS2438_VOLTAGE_LSB		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define DS2438_VOLTAGE_MSB		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define DS2438_CURRENT_LSB		0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define DS2438_CURRENT_MSB		0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define DS2438_THRESHOLD		0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static int w1_ds2438_get_page(struct w1_slave *sl, int pageno, u8 *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	unsigned int retries = W1_DS2438_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u8 w1_buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	u8 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	size_t count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	while (retries--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		crc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		if (w1_reset_select_slave(sl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		w1_buf[0] = W1_DS2438_RECALL_MEMORY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		w1_buf[1] = (u8)pageno;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		w1_write_block(sl->master, w1_buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		if (w1_reset_select_slave(sl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		w1_buf[0] = W1_DS2438_READ_SCRATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		w1_buf[1] = (u8)pageno;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		w1_write_block(sl->master, w1_buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		count = w1_read_block(sl->master, buf, DS2438_PAGE_SIZE + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		if (count == DS2438_PAGE_SIZE + 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			crc = w1_calc_crc8(buf, DS2438_PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 			/* check for correct CRC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			if ((u8)buf[DS2438_PAGE_SIZE] == crc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static int w1_ds2438_get_temperature(struct w1_slave *sl, int16_t *temperature)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	unsigned int retries = W1_DS2438_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	u8 w1_buf[DS2438_PAGE_SIZE + 1 /*for CRC*/];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	unsigned int tm = DS2438_MAX_CONVERSION_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	unsigned long sleep_rem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	mutex_lock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	while (retries--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		if (w1_reset_select_slave(sl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		w1_write_8(sl->master, W1_DS2438_CONVERT_TEMP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		mutex_unlock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		sleep_rem = msleep_interruptible(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		if (sleep_rem != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			goto post_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		if (mutex_lock_interruptible(&sl->master->bus_mutex) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			goto post_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	if (w1_ds2438_get_page(sl, 0, w1_buf) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		*temperature = (((int16_t) w1_buf[DS2438_TEMP_MSB]) << 8) | ((uint16_t) w1_buf[DS2438_TEMP_LSB]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	mutex_unlock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) post_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int w1_ds2438_change_config_bit(struct w1_slave *sl, u8 mask, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	unsigned int retries = W1_DS2438_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	u8 w1_buf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int perform_write = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	while (retries--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		if (w1_reset_select_slave(sl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		w1_buf[0] = W1_DS2438_RECALL_MEMORY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		w1_buf[1] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		w1_write_block(sl->master, w1_buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		if (w1_reset_select_slave(sl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		w1_buf[0] = W1_DS2438_READ_SCRATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		w1_buf[1] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		w1_write_block(sl->master, w1_buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		/* reading one byte of result */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		status = w1_read_8(sl->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		/* if bit0=1, set a value to a mask for easy compare */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			value = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		if ((status & mask) == value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			return 0;	/* already set as requested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			/* changing bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			status ^= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			perform_write = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	if (perform_write) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		retries = W1_DS2438_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		while (retries--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 			if (w1_reset_select_slave(sl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			w1_buf[0] = W1_DS2438_WRITE_SCRATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			w1_buf[1] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			w1_buf[2] = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			w1_write_block(sl->master, w1_buf, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 			if (w1_reset_select_slave(sl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			w1_buf[0] = W1_DS2438_COPY_SCRATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 			w1_buf[1] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 			w1_write_block(sl->master, w1_buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static int w1_ds2438_get_voltage(struct w1_slave *sl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 				 int adc_input, uint16_t *voltage)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	unsigned int retries = W1_DS2438_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	u8 w1_buf[DS2438_PAGE_SIZE + 1 /*for CRC*/];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	unsigned int tm = DS2438_MAX_CONVERSION_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	unsigned long sleep_rem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	mutex_lock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	if (w1_ds2438_change_config_bit(sl, DS2438_STATUS_AD, adc_input)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		goto pre_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	while (retries--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		if (w1_reset_select_slave(sl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		w1_write_8(sl->master, W1_DS2438_CONVERT_VOLTAGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		mutex_unlock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		sleep_rem = msleep_interruptible(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		if (sleep_rem != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			goto post_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		if (mutex_lock_interruptible(&sl->master->bus_mutex) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			goto post_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	if (w1_ds2438_get_page(sl, 0, w1_buf) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		*voltage = (((uint16_t) w1_buf[DS2438_VOLTAGE_MSB]) << 8) | ((uint16_t) w1_buf[DS2438_VOLTAGE_LSB]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) pre_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	mutex_unlock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) post_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static int w1_ds2438_get_current(struct w1_slave *sl, int16_t *voltage)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	u8 w1_buf[DS2438_PAGE_SIZE + 1 /*for CRC*/];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	mutex_lock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (w1_ds2438_get_page(sl, 0, w1_buf) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		/* The voltage measured across current sense resistor RSENS. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		*voltage = (((int16_t) w1_buf[DS2438_CURRENT_MSB]) << 8) | ((int16_t) w1_buf[DS2438_CURRENT_LSB]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	mutex_unlock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static ssize_t iad_write(struct file *filp, struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 			 struct bin_attribute *bin_attr, char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			 loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	struct w1_slave *sl = kobj_to_w1_slave(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	if (count != 1 || off != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	mutex_lock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	if (w1_ds2438_change_config_bit(sl, DS2438_STATUS_IAD, *buf & 0x01) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	mutex_unlock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static ssize_t iad_read(struct file *filp, struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 			struct bin_attribute *bin_attr, char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 			loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	struct w1_slave *sl = kobj_to_w1_slave(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	int16_t voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (off != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	if (w1_ds2438_get_current(sl, &voltage) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		ret = snprintf(buf, count, "%i\n", voltage);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static ssize_t page0_read(struct file *filp, struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			  struct bin_attribute *bin_attr, char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 			  loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	struct w1_slave *sl = kobj_to_w1_slave(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	u8 w1_buf[DS2438_PAGE_SIZE + 1 /*for CRC*/];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	if (off != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	mutex_lock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	/* Read no more than page0 size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	if (count > DS2438_PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		count = DS2438_PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	if (w1_ds2438_get_page(sl, 0, w1_buf) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		memcpy(buf, &w1_buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		ret = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	mutex_unlock(&sl->master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static ssize_t temperature_read(struct file *filp, struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 				struct bin_attribute *bin_attr, char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 				loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	struct w1_slave *sl = kobj_to_w1_slave(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	int16_t temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	if (off != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	if (w1_ds2438_get_temperature(sl, &temp) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		ret = snprintf(buf, count, "%i\n", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static ssize_t vad_read(struct file *filp, struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 			struct bin_attribute *bin_attr, char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 			loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	struct w1_slave *sl = kobj_to_w1_slave(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	uint16_t voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	if (off != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	if (w1_ds2438_get_voltage(sl, DS2438_ADC_INPUT_VAD, &voltage) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		ret = snprintf(buf, count, "%u\n", voltage);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static ssize_t vdd_read(struct file *filp, struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 			struct bin_attribute *bin_attr, char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 			loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	struct w1_slave *sl = kobj_to_w1_slave(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	uint16_t voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	if (off != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	if (w1_ds2438_get_voltage(sl, DS2438_ADC_INPUT_VDD, &voltage) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		ret = snprintf(buf, count, "%u\n", voltage);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static BIN_ATTR(iad, S_IRUGO | S_IWUSR | S_IWGRP, iad_read, iad_write, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static BIN_ATTR_RO(page0, DS2438_PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static BIN_ATTR_RO(temperature, 0/* real length varies */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static BIN_ATTR_RO(vad, 0/* real length varies */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static BIN_ATTR_RO(vdd, 0/* real length varies */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static struct bin_attribute *w1_ds2438_bin_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	&bin_attr_iad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	&bin_attr_page0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	&bin_attr_temperature,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	&bin_attr_vad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	&bin_attr_vdd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static const struct attribute_group w1_ds2438_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	.bin_attrs = w1_ds2438_bin_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static const struct attribute_group *w1_ds2438_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	&w1_ds2438_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static const struct w1_family_ops w1_ds2438_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	.groups		= w1_ds2438_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static struct w1_family w1_ds2438_family = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	.fid = W1_FAMILY_DS2438,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	.fops = &w1_ds2438_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) module_w1_family(w1_ds2438_family);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) MODULE_AUTHOR("Mariusz Bialonczyk <manio@skyboo.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) MODULE_DESCRIPTION("1-wire driver for Maxim/Dallas DS2438 Smart Battery Monitor");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) MODULE_ALIAS("w1-family-" __stringify(W1_FAMILY_DS2438));