^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ds2490.c USB to one wire bridge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2004 Evgeniy Polyakov <zbr@ioremap.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/w1.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* USB Standard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* USB Control request vendor type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define VENDOR 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* COMMAND TYPE CODES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CONTROL_CMD 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define COMM_CMD 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MODE_CMD 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* CONTROL COMMAND CODES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define CTL_RESET_DEVICE 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define CTL_START_EXE 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define CTL_RESUME_EXE 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define CTL_HALT_EXE_IDLE 0x0003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define CTL_HALT_EXE_DONE 0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define CTL_FLUSH_COMM_CMDS 0x0007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define CTL_FLUSH_RCV_BUFFER 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define CTL_FLUSH_XMT_BUFFER 0x0009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define CTL_GET_COMM_CMDS 0x000A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* MODE COMMAND CODES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define MOD_PULSE_EN 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define MOD_SPEED_CHANGE_EN 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define MOD_1WIRE_SPEED 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define MOD_STRONG_PU_DURATION 0x0003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define MOD_PULLDOWN_SLEWRATE 0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define MOD_PROG_PULSE_DURATION 0x0005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define MOD_WRITE1_LOWTIME 0x0006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define MOD_DSOW0_TREC 0x0007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* COMMUNICATION COMMAND CODES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define COMM_ERROR_ESCAPE 0x0601
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define COMM_SET_DURATION 0x0012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define COMM_BIT_IO 0x0020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define COMM_PULSE 0x0030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define COMM_1_WIRE_RESET 0x0042
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define COMM_BYTE_IO 0x0052
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define COMM_MATCH_ACCESS 0x0064
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define COMM_BLOCK_IO 0x0074
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define COMM_READ_STRAIGHT 0x0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define COMM_DO_RELEASE 0x6092
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define COMM_SET_PATH 0x00A2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define COMM_WRITE_SRAM_PAGE 0x00B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define COMM_WRITE_EPROM 0x00C4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define COMM_READ_CRC_PROT_PAGE 0x00D4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define COMM_READ_REDIRECT_PAGE_CRC 0x21E4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define COMM_SEARCH_ACCESS 0x00F4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Communication command bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define COMM_TYPE 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define COMM_SE 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define COMM_D 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define COMM_Z 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define COMM_CH 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define COMM_SM 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define COMM_R 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define COMM_IM 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define COMM_PS 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define COMM_PST 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define COMM_CIB 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define COMM_RTS 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define COMM_DT 0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define COMM_SPU 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define COMM_F 0x0800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define COMM_NTF 0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define COMM_ICP 0x0200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define COMM_RST 0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define PULSE_PROG 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define PULSE_SPUE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define BRANCH_MAIN 0xCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define BRANCH_AUX 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* Status flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define ST_SPUA 0x01 /* Strong Pull-up is active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define ST_PRGA 0x02 /* 12V programming pulse is being generated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define ST_12VP 0x04 /* external 12V programming voltage is present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define ST_PMOD 0x08 /* DS2490 powered from USB and external sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define ST_HALT 0x10 /* DS2490 is currently halted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define ST_IDLE 0x20 /* DS2490 is currently idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define ST_EPOF 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Status transfer size, 16 bytes status, 16 byte result flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define ST_SIZE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Result Register flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define RR_DETECT 0xA5 /* New device detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define RR_NRS 0x01 /* Reset no presence or ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define RR_SH 0x02 /* short on reset or set path */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define RR_APP 0x04 /* alarming presence on reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define RR_VPP 0x08 /* 12V expected not seen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define RR_CMP 0x10 /* compare error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define RR_CRC 0x20 /* CRC error detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define RR_RDP 0x40 /* redirected page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define RR_EOS 0x80 /* end of search error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define SPEED_NORMAL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define SPEED_FLEXIBLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define SPEED_OVERDRIVE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define NUM_EP 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define EP_CONTROL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define EP_STATUS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define EP_DATA_OUT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define EP_DATA_IN 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct ds_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct list_head ds_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct usb_device *udev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct usb_interface *intf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int ep[NUM_EP];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* Strong PullUp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * 0: pullup not active, else duration in milliseconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int spu_sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* spu_bit contains COMM_SPU or 0 depending on if the strong pullup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * should be active or not for writes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) u16 spu_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) u8 st_buf[ST_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u8 byte_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct w1_bus_master master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct ds_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) u8 enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u8 speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) u8 pullup_dur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) u8 ppuls_dur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) u8 pulldown_slew;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) u8 write1_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) u8 write0_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u8 reserved0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) u8 command0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) u8 command1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) u8 command_buffer_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) u8 data_out_buffer_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) u8 data_in_buffer_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) u8 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) u8 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static LIST_HEAD(ds_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static DEFINE_MUTEX(ds_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int ds_send_control_cmd(struct ds_device *dev, u16 value, u16 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) err = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, dev->ep[EP_CONTROL]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) CONTROL_CMD, VENDOR, value, index, NULL, 0, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) pr_err("Failed to send command control message %x.%x: err=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) value, index, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static int ds_send_control_mode(struct ds_device *dev, u16 value, u16 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) err = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, dev->ep[EP_CONTROL]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) MODE_CMD, VENDOR, value, index, NULL, 0, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) pr_err("Failed to send mode control message %x.%x: err=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) value, index, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static int ds_send_control(struct ds_device *dev, u16 value, u16 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) err = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, dev->ep[EP_CONTROL]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) COMM_CMD, VENDOR, value, index, NULL, 0, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) pr_err("Failed to send control message %x.%x: err=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) value, index, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static inline void ds_print_msg(unsigned char *buf, unsigned char *str, int off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) pr_info("%45s: %8x\n", str, buf[off]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static void ds_dump_status(struct ds_device *dev, unsigned char *buf, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) pr_info("0x%x: count=%d, status: ", dev->ep[EP_STATUS], count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) for (i = 0; i < count; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) pr_info("%02x ", buf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) pr_info("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (count >= 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ds_print_msg(buf, "enable flag", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) ds_print_msg(buf, "1-wire speed", 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ds_print_msg(buf, "strong pullup duration", 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) ds_print_msg(buf, "programming pulse duration", 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ds_print_msg(buf, "pulldown slew rate control", 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ds_print_msg(buf, "write-1 low time", 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ds_print_msg(buf, "data sample offset/write-0 recovery time",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) ds_print_msg(buf, "reserved (test register)", 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ds_print_msg(buf, "device status flags", 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ds_print_msg(buf, "communication command byte 1", 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ds_print_msg(buf, "communication command byte 2", 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ds_print_msg(buf, "communication command buffer status", 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ds_print_msg(buf, "1-wire data output buffer status", 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ds_print_msg(buf, "1-wire data input buffer status", 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) ds_print_msg(buf, "reserved", 14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ds_print_msg(buf, "reserved", 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) for (i = 16; i < count; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (buf[i] == RR_DETECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) ds_print_msg(buf, "new device detect", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ds_print_msg(buf, "Result Register Value: ", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (buf[i] & RR_NRS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) pr_info("NRS: Reset no presence or ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (buf[i] & RR_SH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) pr_info("SH: short on reset or set path\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (buf[i] & RR_APP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) pr_info("APP: alarming presence on reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (buf[i] & RR_VPP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) pr_info("VPP: 12V expected not seen\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (buf[i] & RR_CMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) pr_info("CMP: compare error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (buf[i] & RR_CRC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) pr_info("CRC: CRC error detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) if (buf[i] & RR_RDP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) pr_info("RDP: redirected page\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (buf[i] & RR_EOS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) pr_info("EOS: end of search error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static int ds_recv_status(struct ds_device *dev, struct ds_status *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) bool dump)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) int count, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (st)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) memset(st, 0, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) err = usb_interrupt_msg(dev->udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) usb_rcvintpipe(dev->udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) dev->ep[EP_STATUS]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) dev->st_buf, sizeof(dev->st_buf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) &count, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) pr_err("Failed to read 1-wire data from 0x%x: err=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) dev->ep[EP_STATUS], err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (dump)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ds_dump_status(dev, dev->st_buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (st && count >= sizeof(*st))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) memcpy(st, dev->st_buf, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static void ds_reset_device(struct ds_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ds_send_control_cmd(dev, CTL_RESET_DEVICE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /* Always allow strong pullup which allow individual writes to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * the strong pullup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (ds_send_control_mode(dev, MOD_PULSE_EN, PULSE_SPUE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) pr_err("ds_reset_device: Error allowing strong pullup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* Chip strong pullup time was cleared. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (dev->spu_sleep) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* lower 4 bits are 0, see ds_set_pullup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) u8 del = dev->spu_sleep>>4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (ds_send_control(dev, COMM_SET_DURATION | COMM_IM, del))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) pr_err("ds_reset_device: Error setting duration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static int ds_recv_data(struct ds_device *dev, unsigned char *buf, int size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) int count, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* Careful on size. If size is less than what is available in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * the input buffer, the device fails the bulk transfer and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * clears the input buffer. It could read the maximum size of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) * the data buffer, but then do you return the first, last, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) * some set of the middle size bytes? As long as the rest of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * the code is correct there will be size bytes waiting. A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) * call to ds_wait_status will wait until the device is idle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) * and any data to be received would have been available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) err = usb_bulk_msg(dev->udev, usb_rcvbulkpipe(dev->udev, dev->ep[EP_DATA_IN]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) buf, size, &count, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) pr_info("Clearing ep0x%x.\n", dev->ep[EP_DATA_IN]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) usb_clear_halt(dev->udev, usb_rcvbulkpipe(dev->udev, dev->ep[EP_DATA_IN]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ds_recv_status(dev, NULL, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) printk("%s: count=%d: ", __func__, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) for (i = 0; i < count; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) printk("%02x ", buf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static int ds_send_data(struct ds_device *dev, unsigned char *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) int count, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) err = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, dev->ep[EP_DATA_OUT]), buf, len, &count, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) pr_err("Failed to write 1-wire data to ep0x%x: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) "err=%d.\n", dev->ep[EP_DATA_OUT], err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) int ds_stop_pulse(struct ds_device *dev, int limit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) int count = 0, err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) err = ds_send_control(dev, CTL_HALT_EXE_IDLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) err = ds_send_control(dev, CTL_RESUME_EXE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) err = ds_recv_status(dev, &st, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if ((st.status & ST_SPUA) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) err = ds_send_control_mode(dev, MOD_PULSE_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) } while (++count < limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) int ds_detect(struct ds_device *dev, struct ds_status *st)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) err = ds_send_control_cmd(dev, CTL_RESET_DEVICE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) err = ds_send_control(dev, COMM_SET_DURATION | COMM_IM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) err = ds_send_control(dev, COMM_SET_DURATION | COMM_IM | COMM_TYPE, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) err = ds_send_control_mode(dev, MOD_PULSE_EN, PULSE_PROG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) err = ds_dump_status(dev, st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #endif /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static int ds_wait_status(struct ds_device *dev, struct ds_status *st)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) int err, count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) st->status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) err = ds_recv_status(dev, st, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) if (err >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) printk("0x%x: count=%d, status: ", dev->ep[EP_STATUS], err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) for (i = 0; i < err; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) printk("%02x ", dev->st_buf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) } while (!(st->status & ST_IDLE) && !(err < 0) && ++count < 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (err >= 16 && st->status & ST_EPOF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) pr_info("Resetting device after ST_EPOF.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) ds_reset_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /* Always dump the device status. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) count = 101;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /* Dump the status for errors or if there is extended return data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * The extended status includes new device detection (maybe someone
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * can do something with it).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (err > 16 || count >= 100 || err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ds_dump_status(dev, dev->st_buf, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) /* Extended data isn't an error. Well, a short is, but the dump
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * would have already told the user that and we can't do anything
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * about it in software anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (count >= 100 || err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static int ds_reset(struct ds_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /* Other potentionally interesting flags for reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * COMM_NTF: Return result register feedback. This could be used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) * detect some conditions such as short, alarming presence, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * detect if a new device was detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * COMM_SE which allows SPEED_NORMAL, SPEED_FLEXIBLE, SPEED_OVERDRIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) * Select the data transfer rate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) err = ds_send_control(dev, COMM_1_WIRE_RESET | COMM_IM, SPEED_NORMAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static int ds_set_speed(struct ds_device *dev, int speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (speed != SPEED_NORMAL && speed != SPEED_FLEXIBLE && speed != SPEED_OVERDRIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (speed != SPEED_OVERDRIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) speed = SPEED_FLEXIBLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) speed &= 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) err = ds_send_control_mode(dev, MOD_1WIRE_SPEED, speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) #endif /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) static int ds_set_pullup(struct ds_device *dev, int delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) u8 del = 1 + (u8)(delay >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /* Just storing delay would not get the trunication and roundup. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) int ms = del<<4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /* Enable spu_bit if a delay is set. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) dev->spu_bit = delay ? COMM_SPU : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) /* If delay is zero, it has already been disabled, if the time is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) * the same as the hardware was last programmed to, there is also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) * nothing more to do. Compare with the recalculated value ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) * rather than del or delay which can have a different value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (delay == 0 || ms == dev->spu_sleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) err = ds_send_control(dev, COMM_SET_DURATION | COMM_IM, del);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) dev->spu_sleep = ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) static int ds_touch_bit(struct ds_device *dev, u8 bit, u8 *tbit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) err = ds_send_control(dev, COMM_BIT_IO | COMM_IM | (bit ? COMM_D : 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) err = ds_recv_data(dev, tbit, sizeof(*tbit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static int ds_write_bit(struct ds_device *dev, u8 bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) /* Set COMM_ICP to write without a readback. Note, this will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * produce one time slot, a down followed by an up with COMM_D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * only determing the timing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) err = ds_send_control(dev, COMM_BIT_IO | COMM_IM | COMM_ICP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) (bit ? COMM_D : 0), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) static int ds_write_byte(struct ds_device *dev, u8 byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) err = ds_send_control(dev, COMM_BYTE_IO | COMM_IM | dev->spu_bit, byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) if (dev->spu_bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) msleep(dev->spu_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) err = ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) err = ds_recv_data(dev, &dev->byte_buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) return !(byte == dev->byte_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) static int ds_read_byte(struct ds_device *dev, u8 *byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) err = ds_send_control(dev, COMM_BYTE_IO | COMM_IM, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) err = ds_recv_data(dev, byte, sizeof(*byte));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) static int ds_read_block(struct ds_device *dev, u8 *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) if (len > 64*1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) return -E2BIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) memset(buf, 0xFF, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) err = ds_send_data(dev, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) memset(buf, 0x00, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) err = ds_recv_data(dev, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static int ds_write_block(struct ds_device *dev, u8 *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) err = ds_send_data(dev, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM | dev->spu_bit, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (dev->spu_bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) msleep(dev->spu_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) err = ds_recv_data(dev, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return !(err == len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static void ds9490r_search(void *data, struct w1_master *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) u8 search_type, w1_slave_found_callback callback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) /* When starting with an existing id, the first id returned will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) * be that device (if it is still on the bus most likely).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * If the number of devices found is less than or equal to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) * search_limit, that number of IDs will be returned. If there are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) * more, search_limit IDs will be returned followed by a non-zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * discrepency value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) u16 value, index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) int search_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) int found = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) /* DS18b20 spec, 13.16 ms per device, 75 per second, sleep for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) * discovering 8 devices (1 bulk transfer and 1/2 FIFO size) at a time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) const unsigned long jtime = msecs_to_jiffies(1000*8/75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) /* FIFO 128 bytes, bulk packet size 64, read a multiple of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) * packet size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) const size_t bufsize = 2 * 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) u64 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) buf = kmalloc(bufsize, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) mutex_lock(&master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /* address to start searching at */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) if (ds_send_data(dev, (u8 *)&master->search_id, 8) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) goto search_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) master->search_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) value = COMM_SEARCH_ACCESS | COMM_IM | COMM_RST | COMM_SM | COMM_F |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) COMM_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) search_limit = master->max_slave_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) if (search_limit > 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) search_limit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) index = search_type | (search_limit << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) if (ds_send_control(dev, value, index) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) goto search_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) schedule_timeout(jtime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) err = ds_recv_status(dev, &st, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) if (err < 0 || err < sizeof(st))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) if (st.data_in_buffer_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) /* Bulk in can receive partial ids, but when it does
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) * they fail crc and will be discarded anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) * That has only been seen when status in buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) * is 0 and bulk is read anyway, so don't read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) * bulk without first checking if status says there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * is data to read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) err = ds_recv_data(dev, (u8 *)buf, bufsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) for (i = 0; i < err/8; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) ++found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) if (found <= search_limit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) callback(master, buf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) /* can't know if there will be a discrepancy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) * value after until the next id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) if (found == search_limit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) master->search_id = buf[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) if (test_bit(W1_ABORT_SEARCH, &master->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) } while (!(st.status & (ST_IDLE | ST_HALT)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) /* only continue the search if some weren't found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (found <= search_limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) master->search_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) } else if (!test_bit(W1_WARN_MAX_COUNT, &master->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) /* Only max_slave_count will be scanned in a search,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * but it will start where it left off next search
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * until all ids are identified and then it will start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) * over. A continued search will report the previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * last id as the first id (provided it is still on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * bus).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) dev_info(&dev->udev->dev, "%s: max_slave_count %d reached, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) "will continue next search.\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) master->max_slave_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) set_bit(W1_WARN_MAX_COUNT, &master->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) search_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) mutex_unlock(&master->bus_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) * FIXME: if this disabled code is ever used in the future all ds_send_data()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) * calls must be changed to use a DMAable buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) static int ds_match_access(struct ds_device *dev, u64 init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) err = ds_send_data(dev, (unsigned char *)&init, sizeof(init));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) err = ds_send_control(dev, COMM_MATCH_ACCESS | COMM_IM | COMM_RST, 0x0055);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) static int ds_set_path(struct ds_device *dev, u64 init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) struct ds_status st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) u8 buf[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) memcpy(buf, &init, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) buf[8] = BRANCH_MAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) err = ds_send_data(dev, buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) err = ds_send_control(dev, COMM_SET_PATH | COMM_IM | COMM_RST, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) ds_wait_status(dev, &st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) #endif /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) static u8 ds9490r_touch_bit(void *data, u8 bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) if (ds_touch_bit(dev, bit, &dev->byte_buf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) return dev->byte_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) static void ds9490r_write_bit(void *data, u8 bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) ds_write_bit(dev, bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) static u8 ds9490r_read_bit(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) err = ds_touch_bit(dev, 1, &dev->byte_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) return dev->byte_buf & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static void ds9490r_write_byte(void *data, u8 byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) ds_write_byte(dev, byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) static u8 ds9490r_read_byte(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) err = ds_read_byte(dev, &dev->byte_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) return dev->byte_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) static void ds9490r_write_block(void *data, const u8 *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) u8 *tbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) if (len <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) tbuf = kmemdup(buf, len, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) if (!tbuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) ds_write_block(dev, tbuf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) kfree(tbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) static u8 ds9490r_read_block(void *data, u8 *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) u8 *tbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) if (len <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) tbuf = kmalloc(len, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) if (!tbuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) err = ds_read_block(dev, tbuf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) if (err >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) memcpy(buf, tbuf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) kfree(tbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) return err >= 0 ? len : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) static u8 ds9490r_reset(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) err = ds_reset(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static u8 ds9490r_set_pullup(void *data, int delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) struct ds_device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) if (ds_set_pullup(dev, delay))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) static int ds_w1_init(struct ds_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) memset(&dev->master, 0, sizeof(struct w1_bus_master));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) /* Reset the device as it can be in a bad state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) * This is necessary because a block write will wait for data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) * to be placed in the output buffer and block any later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) * commands which will keep accumulating and the device will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) * not be idle. Another case is removing the ds2490 module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) * while a bus search is in progress, somehow a few commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) * get through, but the input transfers fail leaving data in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) * the input buffer. This will cause the next read to fail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) * see the note in ds_recv_data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) ds_reset_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) dev->master.data = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) dev->master.touch_bit = &ds9490r_touch_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) /* read_bit and write_bit in w1_bus_master are expected to set and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) * sample the line level. For write_bit that means it is expected to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) * set it to that value and leave it there. ds2490 only supports an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) * individual time slot at the lowest level. The requirement from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) * pulling the bus state down to reading the state is 15us, something
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) * that isn't realistic on the USB bus anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) dev->master.read_bit = &ds9490r_read_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) dev->master.write_bit = &ds9490r_write_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) dev->master.read_byte = &ds9490r_read_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) dev->master.write_byte = &ds9490r_write_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) dev->master.read_block = &ds9490r_read_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) dev->master.write_block = &ds9490r_write_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) dev->master.reset_bus = &ds9490r_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) dev->master.set_pullup = &ds9490r_set_pullup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) dev->master.search = &ds9490r_search;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) return w1_add_master_device(&dev->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) static void ds_w1_fini(struct ds_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) w1_remove_master_device(&dev->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) static int ds_probe(struct usb_interface *intf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) const struct usb_device_id *udev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) struct usb_device *udev = interface_to_usbdev(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) struct usb_endpoint_descriptor *endpoint;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) struct usb_host_interface *iface_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) struct ds_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) int i, err, alt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) dev = kzalloc(sizeof(struct ds_device), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) pr_info("Failed to allocate new DS9490R structure.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) dev->udev = usb_get_dev(udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) if (!dev->udev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) goto err_out_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) memset(dev->ep, 0, sizeof(dev->ep));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) usb_set_intfdata(intf, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) err = usb_reset_configuration(dev->udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) dev_err(&dev->udev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) "Failed to reset configuration: err=%d.\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) goto err_out_clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) /* alternative 3, 1ms interrupt (greatly speeds search), 64 byte bulk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) alt = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) err = usb_set_interface(dev->udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) intf->cur_altsetting->desc.bInterfaceNumber, alt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) dev_err(&dev->udev->dev, "Failed to set alternative setting %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) "for %d interface: err=%d.\n", alt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) intf->cur_altsetting->desc.bInterfaceNumber, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) goto err_out_clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) iface_desc = intf->cur_altsetting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) if (iface_desc->desc.bNumEndpoints != NUM_EP-1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) pr_info("Num endpoints=%d. It is not DS9490R.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) iface_desc->desc.bNumEndpoints);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) goto err_out_clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) * This loop doesn'd show control 0 endpoint,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) * so we will fill only 1-3 endpoints entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) endpoint = &iface_desc->endpoint[i].desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) dev->ep[i+1] = endpoint->bEndpointAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) printk("%d: addr=%x, size=%d, dir=%s, type=%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) i, endpoint->bEndpointAddress, le16_to_cpu(endpoint->wMaxPacketSize),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) (endpoint->bEndpointAddress & USB_DIR_IN)?"IN":"OUT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) endpoint->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) err = ds_w1_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) goto err_out_clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) mutex_lock(&ds_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) list_add_tail(&dev->ds_entry, &ds_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) mutex_unlock(&ds_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) err_out_clear:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) usb_set_intfdata(intf, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) usb_put_dev(dev->udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) err_out_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) kfree(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) static void ds_disconnect(struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) struct ds_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) dev = usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) mutex_lock(&ds_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) list_del(&dev->ds_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) mutex_unlock(&ds_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) ds_w1_fini(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) usb_set_intfdata(intf, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) usb_put_dev(dev->udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) kfree(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) static const struct usb_device_id ds_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) { USB_DEVICE(0x04fa, 0x2490) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) MODULE_DEVICE_TABLE(usb, ds_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) static struct usb_driver ds_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) .name = "DS9490R",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) .probe = ds_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) .disconnect = ds_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) .id_table = ds_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) module_usb_driver(ds_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) MODULE_AUTHOR("Evgeniy Polyakov <zbr@ioremap.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) MODULE_DESCRIPTION("DS2490 USB <-> W1 bus master driver (DS9490*)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags