Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * vmivme_7805.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Support for the VMIVME-7805 board access to the Universe II bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Author: Arthur Benilov <arthur.benilov@iba-group.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright 2010 Ion Beam Application, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef _VMIVME_7805_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define _VMIVME_7805_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #ifndef PCI_VENDOR_ID_VMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PCI_VENDOR_ID_VMIC		0x114A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #ifndef PCI_DEVICE_ID_VTIMR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PCI_DEVICE_ID_VTIMR		0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define VME_CONTROL			0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define BM_VME_CONTROL_MASTER_ENDIAN	0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BM_VME_CONTROL_SLAVE_ENDIAN	0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define BM_VME_CONTROL_ABLE		0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define BM_VME_CONTROL_BERRI		0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define BM_VME_CONTROL_BERRST		0x0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define BM_VME_CONTROL_BPENA		0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define BM_VME_CONTROL_VBENA		0x0800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #endif /* _VMIVME_7805_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)