^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Support for the VMIVME-7805 board access to the Universe II bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Arthur Benilov <arthur.benilov@iba-group.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2010 Ion Beam Application, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "vme_vmivme7805.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static int vmic_probe(struct pci_dev *, const struct pci_device_id *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static void vmic_remove(struct pci_dev *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /** Base address to access FPGA register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static void __iomem *vmic_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static const char driver_name[] = "vmivme_7805";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static const struct pci_device_id vmic_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) { PCI_DEVICE(PCI_VENDOR_ID_VMIC, PCI_DEVICE_ID_VTIMR) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static struct pci_driver vmic_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .name = driver_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .id_table = vmic_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .probe = vmic_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .remove = vmic_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int vmic_probe(struct pci_dev *pdev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* Enable the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) retval = pci_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) dev_err(&pdev->dev, "Unable to enable device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Map Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) retval = pci_request_regions(pdev, driver_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) dev_err(&pdev->dev, "Unable to reserve resources\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) goto err_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* Map registers in BAR 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) vmic_base = ioremap(pci_resource_start(pdev, 0), 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (!vmic_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) dev_err(&pdev->dev, "Unable to remap CRG region\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) retval = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) goto err_remap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* Clear the FPGA VME IF contents */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) iowrite32(0, vmic_base + VME_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* Clear any initial BERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) data = ioread32(vmic_base + VME_CONTROL) & 0x00000FFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) data |= BM_VME_CONTROL_BERRST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) iowrite32(data, vmic_base + VME_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* Enable the vme interface and byte swapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) data = ioread32(vmic_base + VME_CONTROL) & 0x00000FFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) data = data | BM_VME_CONTROL_MASTER_ENDIAN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) BM_VME_CONTROL_SLAVE_ENDIAN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) BM_VME_CONTROL_ABLE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) BM_VME_CONTROL_BERRI |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) BM_VME_CONTROL_BPENA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) BM_VME_CONTROL_VBENA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) iowrite32(data, vmic_base + VME_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) err_remap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pci_release_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) err_resource:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static void vmic_remove(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) iounmap(vmic_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pci_release_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) module_pci_driver(vmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MODULE_DESCRIPTION("VMIVME-7805 board support driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MODULE_AUTHOR("Arthur Benilov <arthur.benilov@iba-group.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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