Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Support for viafb GPIO ports.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2009 Jonathan Corbet <corbet@lwn.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/via-core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/via-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * The ports we know about.  Note that the port-25 gpios are not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * mentioned in the datasheet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) struct viafb_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	char *vg_name;	/* Data sheet name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	u16 vg_io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	u8  vg_port_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	int  vg_mask_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static struct viafb_gpio viafb_all_gpios[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		.vg_name = "VGPIO0",  /* Guess - not in datasheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		.vg_io_port = VIASR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		.vg_port_index = 0x25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		.vg_mask_shift = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		.vg_name = "VGPIO1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		.vg_io_port = VIASR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		.vg_port_index = 0x25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		.vg_mask_shift = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		.vg_name = "VGPIO2",  /* aka DISPCLKI0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		.vg_io_port = VIASR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		.vg_port_index = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		.vg_mask_shift = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		.vg_name = "VGPIO3",  /* aka DISPCLKO0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		.vg_io_port = VIASR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		.vg_port_index = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		.vg_mask_shift = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		.vg_name = "VGPIO4",  /* DISPCLKI1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		.vg_io_port = VIASR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		.vg_port_index = 0x3d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.vg_mask_shift = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		.vg_name = "VGPIO5",  /* DISPCLKO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		.vg_io_port = VIASR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		.vg_port_index = 0x3d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		.vg_mask_shift = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define VIAFB_NUM_GPIOS ARRAY_SIZE(viafb_all_gpios)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * This structure controls the active GPIOs, which may be a subset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  * of those which are known.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) struct viafb_gpio_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct viafb_dev *vdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct viafb_gpio *active_gpios[VIAFB_NUM_GPIOS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	const char *gpio_names[VIAFB_NUM_GPIOS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * GPIO access functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static void via_gpio_set(struct gpio_chip *chip, unsigned int nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			 int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct viafb_gpio *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	spin_lock_irqsave(&cfg->vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	gpio = cfg->active_gpios[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	reg = via_read_reg(VIASR, gpio->vg_port_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	reg |= 0x40 << gpio->vg_mask_shift;  /* output enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		reg |= 0x10 << gpio->vg_mask_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		reg &= ~(0x10 << gpio->vg_mask_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	via_write_reg(VIASR, gpio->vg_port_index, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int via_gpio_dir_out(struct gpio_chip *chip, unsigned int nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			    int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	via_gpio_set(chip, nr, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  * Set the input direction.  I'm not sure this is right; we should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  * be able to do input without disabling output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static int via_gpio_dir_input(struct gpio_chip *chip, unsigned int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	struct viafb_gpio *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	spin_lock_irqsave(&cfg->vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	gpio = cfg->active_gpios[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	via_write_reg_mask(VIASR, gpio->vg_port_index, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			0x40 << gpio->vg_mask_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int via_gpio_get(struct gpio_chip *chip, unsigned int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct viafb_gpio *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	spin_lock_irqsave(&cfg->vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	gpio = cfg->active_gpios[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	reg = via_read_reg(VIASR, gpio->vg_port_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	return !!(reg & (0x04 << gpio->vg_mask_shift));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static struct viafb_gpio_cfg viafb_gpio_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	.gpio_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		.label = "VIAFB onboard GPIO",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		.direction_output = via_gpio_dir_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		.set = via_gpio_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		.direction_input = via_gpio_dir_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		.get = via_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		.base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		.ngpio = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		.can_sleep = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)  * Manage the software enable bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static void viafb_gpio_enable(struct viafb_gpio *gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	via_write_reg_mask(VIASR, gpio->vg_port_index, 0x02, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static void viafb_gpio_disable(struct viafb_gpio *gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	via_write_reg_mask(VIASR, gpio->vg_port_index, 0, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static int viafb_gpio_suspend(void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static int viafb_gpio_resume(void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	for (i = 0; i < viafb_gpio_config.gpio_chip.ngpio; i += 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		viafb_gpio_enable(viafb_gpio_config.active_gpios[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static struct viafb_pm_hooks viafb_gpio_pm_hooks = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.suspend = viafb_gpio_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.resume = viafb_gpio_resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #endif /* CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)  * Look up a specific gpio and return the number it was assigned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int viafb_gpio_lookup(const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	for (i = 0; i < viafb_gpio_config.gpio_chip.ngpio; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		if (!strcmp(name, viafb_gpio_config.active_gpios[i]->vg_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			return viafb_gpio_config.gpio_chip.base + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) EXPORT_SYMBOL_GPL(viafb_gpio_lookup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)  * Platform device stuff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int viafb_gpio_probe(struct platform_device *platdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	struct viafb_dev *vdev = platdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	struct via_port_cfg *port_cfg = vdev->port_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	int i, ngpio = 0, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	struct viafb_gpio *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	 * Set up entries for all GPIOs which have been configured to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	 * operate as such (as opposed to as i2c ports).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	for (i = 0; i < VIAFB_NUM_PORTS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		if (port_cfg[i].mode != VIA_MODE_GPIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		for (gpio = viafb_all_gpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		     gpio < viafb_all_gpios + VIAFB_NUM_GPIOS; gpio++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			if (gpio->vg_port_index == port_cfg[i].ioport_index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 				viafb_gpio_config.active_gpios[ngpio] = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 				viafb_gpio_config.gpio_names[ngpio] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 					gpio->vg_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				ngpio++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	viafb_gpio_config.gpio_chip.ngpio = ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	viafb_gpio_config.gpio_chip.names = viafb_gpio_config.gpio_names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	viafb_gpio_config.vdev = vdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	if (ngpio == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		printk(KERN_INFO "viafb: no GPIOs configured\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	 * Enable the ports.  They come in pairs, with a single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	 * enable bit for both.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	spin_lock_irqsave(&viafb_gpio_config.vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	for (i = 0; i < ngpio; i += 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		viafb_gpio_enable(viafb_gpio_config.active_gpios[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	spin_unlock_irqrestore(&viafb_gpio_config.vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	 * Get registered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	viafb_gpio_config.gpio_chip.base = -1;  /* Dynamic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	ret = gpiochip_add_data(&viafb_gpio_config.gpio_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 				&viafb_gpio_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		printk(KERN_ERR "viafb: failed to add gpios (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		viafb_gpio_config.gpio_chip.ngpio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	viafb_pm_register(&viafb_gpio_pm_hooks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int viafb_gpio_remove(struct platform_device *platdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	viafb_pm_unregister(&viafb_gpio_pm_hooks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	 * Get unregistered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (viafb_gpio_config.gpio_chip.ngpio > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		gpiochip_remove(&viafb_gpio_config.gpio_chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	 * Disable the ports.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	spin_lock_irqsave(&viafb_gpio_config.vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	for (i = 0; i < viafb_gpio_config.gpio_chip.ngpio; i += 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		viafb_gpio_disable(viafb_gpio_config.active_gpios[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	viafb_gpio_config.gpio_chip.ngpio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	spin_unlock_irqrestore(&viafb_gpio_config.vdev->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static struct platform_driver via_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		.name = "viafb-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	.probe = viafb_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	.remove = viafb_gpio_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) int viafb_gpio_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	return platform_driver_register(&via_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) void viafb_gpio_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	platform_driver_unregister(&via_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }