^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __IOCTL_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __IOCTL_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* VIAFB IOCTL definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define VIAFB_GET_INFO_SIZE 0x56494101 /* 'VIA\01' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define VIAFB_GET_INFO 0x56494102 /* 'VIA\02' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define VIAFB_HOTPLUG 0x56494103 /* 'VIA\03' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define VIAFB_SET_HOTPLUG_FLAG 0x56494104 /* 'VIA\04' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define VIAFB_GET_RESOLUTION 0x56494105 /* 'VIA\05' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define VIAFB_GET_SAMM_INFO 0x56494107 /* 'VIA\07' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define VIAFB_TURN_ON_OUTPUT_DEVICE 0x56494108 /* 'VIA\08' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define VIAFB_TURN_OFF_OUTPUT_DEVICE 0x56494109 /* 'VIA\09' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define VIAFB_GET_DEVICE 0x5649410B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define VIAFB_GET_DRIVER_VERSION 0x56494112 /* 'VIA\12' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define VIAFB_GET_CHIP_INFO 0x56494113 /* 'VIA\13' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define VIAFB_GET_DEVICE_INFO 0x56494115
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define VIAFB_GET_DEVICE_SUPPORT 0x56494118
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define VIAFB_GET_DEVICE_CONNECT 0x56494119
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define VIAFB_GET_PANEL_SUPPORT_EXPAND 0x5649411A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define VIAFB_GET_DRIVER_NAME 0x56494122
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define VIAFB_GET_DEVICE_SUPPORT_STATE 0x56494123
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define VIAFB_GET_GAMMA_LUT 0x56494124
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define VIAFB_SET_GAMMA_LUT 0x56494125
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define VIAFB_GET_GAMMA_SUPPORT_STATE 0x56494126
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define VIAFB_SYNC_SURFACE 0x56494130
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define VIAFB_GET_DRIVER_CAPS 0x56494131
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define VIAFB_GET_IGA_SCALING_INFO 0x56494132
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define VIAFB_GET_PANEL_MAX_SIZE 0x56494133
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define VIAFB_GET_PANEL_MAX_POSITION 0x56494134
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define VIAFB_SET_PANEL_SIZE 0x56494135
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define VIAFB_SET_PANEL_POSITION 0x56494136
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define VIAFB_GET_PANEL_POSITION 0x56494137
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define VIAFB_GET_PANEL_SIZE 0x56494138
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define None_Device 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define CRT_Device 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define LCD_Device 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define DVI_Device 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define CRT2_Device 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define LCD2_Device 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define OP_LCD_CENTERING 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define OP_LCD_PANEL_ID 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define OP_LCD_MODE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /*SAMM operation flag*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define OP_SAMM 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define LCD_PANEL_ID_MAXIMUM 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define STATE_ON 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define STATE_OFF 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define STATE_DEFAULT 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define MAX_ACTIVE_DEV_NUM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct device_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) unsigned short crt:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) unsigned short dvi:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned short lcd:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned short samm:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned short lcd_dsp_cent:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned char lcd_mode:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned short epia_dvi:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned short lcd_dual_edge:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned short lcd2:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned short primary_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned char lcd_panel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned short xres, yres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned short xres1, yres1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned short refresh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned short bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned short refresh1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned short bpp1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned short sequence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned short bus_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct viafb_ioctl_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) u32 viafb_id; /* for identifying viafb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define VIAID 0x56494146 /* Identify myself with 'VIAF' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) u16 vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u16 device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u8 revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u8 reserved[246]; /* for future use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct viafb_ioctl_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u32 xres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u32 yres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u32 refresh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u32 bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u32 xres_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u32 yres_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u32 virtual_xres_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u32 virtual_yres_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 refresh_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u32 bpp_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct viafb_ioctl_samm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u32 samm_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u32 size_prim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u32 size_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u32 mem_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u32 offset_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct viafb_driver_version {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int iMajorNum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int iKernelNum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) int iOSNum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) int iMinorNum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct viafb_ioctl_lcd_attribute {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned int panel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) unsigned int display_center;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned int lcd_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct viafb_ioctl_setting {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Enable or disable active devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) unsigned short device_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Indicate which device should be turn on or turn off. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned short device_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned int reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* Indicate which LCD's attribute can be changed. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned short lcd_operation_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* 1: SAMM ON 0: SAMM OFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) unsigned short samm_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* horizontal resolution of first device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) unsigned short first_dev_hor_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* vertical resolution of first device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) unsigned short first_dev_ver_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* horizontal resolution of second device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) unsigned short second_dev_hor_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* vertical resolution of second device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) unsigned short second_dev_ver_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* refresh rate of first device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) unsigned short first_dev_refresh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* bpp of first device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) unsigned short first_dev_bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* refresh rate of second device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) unsigned short second_dev_refresh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* bpp of second device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) unsigned short second_dev_bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* Indicate which device are primary display device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned int primary_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) unsigned int struct_reserved[35];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct viafb_ioctl_lcd_attribute lcd_attributes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct _UTFunctionCaps {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) unsigned int dw3DScalingState;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) unsigned int reserved[31];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct _POSITIONVALUE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) unsigned int dwX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) unsigned int dwY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct _panel_size_pos_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) unsigned int device_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) int x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) extern int viafb_LCD_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) extern int viafb_DVI_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) int viafb_ioctl_get_viafb_info(u_long arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int viafb_ioctl_hotplug(int hres, int vres, int bpp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #endif /* __IOCTL_H__ */