^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __DVI_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __DVI_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /*Definition TMDS Device ID register*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define VT1632_DEVICE_ID_REG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define VT1632_DEVICE_ID 0x92
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define GET_DVI_SIZE_BY_SYSTEM_BIOS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define GET_DVI_SIZE_BY_VGA_BIOS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define GET_DVI_SZIE_BY_HW_STRAPPING 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Definition DVI Panel ID*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* Resolution: 640x480, Channel: single, Dithering: Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define DVI_PANEL_ID0_640X480 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* Resolution: 800x600, Channel: single, Dithering: Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DVI_PANEL_ID1_800x600 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* Resolution: 1024x768, Channel: single, Dithering: Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DVI_PANEL_ID1_1024x768 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Resolution: 1280x768, Channel: single, Dithering: Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DVI_PANEL_ID1_1280x768 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Resolution: 1280x1024, Channel: dual, Dithering: Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DVI_PANEL_ID1_1280x1024 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* Resolution: 1400x1050, Channel: dual, Dithering: Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define DVI_PANEL_ID1_1400x1050 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Resolution: 1600x1200, Channel: dual, Dithering: Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define DVI_PANEL_ID1_1600x1200 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Define the version of EDID*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define EDID_VERSION_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define EDID_VERSION_2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define DEV_CONNECT_DVI 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define DEV_CONNECT_HDMI 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int viafb_dvi_sense(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) void viafb_dvi_disable(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) void viafb_dvi_enable(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) bool viafb_tmds_trasmitter_identify(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) void viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct tmds_setting_information *tmds_setting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void viafb_dvi_set_mode(const struct fb_var_screeninfo *var,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u16 cxres, u16 cyres, int iga);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif /* __DVI_H__ */