^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * linux/drivers/video/s3c2410fb.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2004 Arnaud Patard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * S3C2410 LCD Framebuffer Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * License. See the file COPYING in the main directory of this archive for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #ifndef __S3C2410FB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define __S3C2410FB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) enum s3c_drv_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) DRV_S3C2410,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) DRV_S3C2412,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct s3c2410fb_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct resource *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) void __iomem *io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) void __iomem *irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) enum s3c_drv_type drv_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct s3c2410fb_hw regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned long clk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int palette_ready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #ifdef CONFIG_ARM_S3C24XX_CPUFREQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct notifier_block freq_transition;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* keep these registers in case we need to re-write palette */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u32 palette_buffer[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 pseudo_pal[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PALETTE_BUFF_CLEAR (0x80000000) /* entry is clear/invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int s3c2410fb_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #endif