^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * linux/drivers/video/offb.c -- Open Firmware based frame buffer device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 1997 Geert Uytterhoeven
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This driver is partly based on the PowerMac console driver:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1996 Paul Mackerras
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * License. See the file COPYING in the main directory of this archive for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #ifdef CONFIG_PPC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/bootx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include "macmodes.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* Supported palette hacks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) cmap_unknown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) cmap_simple, /* ATI Mach64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) cmap_r128, /* ATI Rage128 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) cmap_M3A, /* ATI Rage Mobility M3 Head A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) cmap_M3B, /* ATI Rage Mobility M3 Head B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) cmap_radeon, /* ATI Radeon */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) cmap_gxt2000, /* IBM GXT2000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) cmap_avivo, /* ATI R5xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) cmap_qemu, /* qemu vga */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct offb_par {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) volatile void __iomem *cmap_adr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) volatile void __iomem *cmap_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int cmap_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int blanked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct offb_par default_par;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #ifdef CONFIG_PPC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) extern boot_infos_t *boot_infos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* Definitions used by the Avivo palette hack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define AVIVO_DC_LUT_RW_SELECT 0x6480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define AVIVO_DC_LUT_RW_MODE 0x6484
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define AVIVO_DC_LUT_RW_INDEX 0x6488
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define AVIVO_DC_LUT_SEQ_COLOR 0x648c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define AVIVO_DC_LUT_PWL_DATA 0x6490
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define AVIVO_DC_LUT_30_COLOR 0x6494
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define AVIVO_DC_LUT_AUTOFILL 0x64a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define AVIVO_DC_LUTA_CONTROL 0x64c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define AVIVO_DC_LUTB_CONTROL 0x6cc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * Set a single color register. The values supplied are already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * rounded down to the hardware's capabilities (according to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * entries in the var structure). Return != 0 for invalid regno.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u_int transp, struct fb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct offb_par *par = (struct offb_par *) info->par;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u32 *pal = info->pseudo_palette;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u32 cr = red >> (16 - info->var.red.length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u32 cg = green >> (16 - info->var.green.length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u32 cb = blue >> (16 - info->var.blue.length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (regno >= 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) value = (cr << info->var.red.offset) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) (cg << info->var.green.offset) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) (cb << info->var.blue.offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (info->var.transp.length > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u32 mask = (1 << info->var.transp.length) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) mask <<= info->var.transp.offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) value |= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) pal[regno] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (regno > 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) red >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) green >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) blue >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (!par->cmap_adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) switch (par->cmap_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) case cmap_simple:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) writeb(regno, par->cmap_adr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) writeb(red, par->cmap_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) writeb(green, par->cmap_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) writeb(blue, par->cmap_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) case cmap_M3A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) out_le32(par->cmap_adr + 0x58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) in_le32(par->cmap_adr + 0x58) & ~0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) case cmap_r128:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* Set palette index & data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) out_8(par->cmap_adr + 0xb0, regno);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) out_le32(par->cmap_adr + 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) (red << 16 | green << 8 | blue));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) case cmap_M3B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) out_le32(par->cmap_adr + 0x58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) in_le32(par->cmap_adr + 0x58) | 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* Set palette index & data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) out_8(par->cmap_adr + 0xb0, regno);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) case cmap_radeon:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* Set palette index & data (could be smarter) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) out_8(par->cmap_adr + 0xb0, regno);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) case cmap_gxt2000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) (red << 16 | green << 8 | blue));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) case cmap_avivo:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* Write to both LUTs for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * Blank the display.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int offb_blank(int blank, struct fb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct offb_par *par = (struct offb_par *) info->par;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (!par->cmap_adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (!par->blanked)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (!blank)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) par->blanked = blank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (blank)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) for (i = 0; i < 256; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) switch (par->cmap_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) case cmap_simple:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) writeb(i, par->cmap_adr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) for (j = 0; j < 3; j++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) writeb(0, par->cmap_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) case cmap_M3A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) out_le32(par->cmap_adr + 0x58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) in_le32(par->cmap_adr + 0x58) & ~0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) case cmap_r128:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* Set palette index & data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) out_8(par->cmap_adr + 0xb0, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) out_le32(par->cmap_adr + 0xb4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) case cmap_M3B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) out_le32(par->cmap_adr + 0x58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) in_le32(par->cmap_adr + 0x58) | 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* Set palette index & data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) out_8(par->cmap_adr + 0xb0, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) out_le32(par->cmap_adr + 0xb4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) case cmap_radeon:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) out_8(par->cmap_adr + 0xb0, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) out_le32(par->cmap_adr + 0xb4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) case cmap_gxt2000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) out_le32(((unsigned __iomem *) par->cmap_adr) + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) case cmap_avivo:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) fb_set_cmap(&info->cmap, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static int offb_set_par(struct fb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct offb_par *par = (struct offb_par *) info->par;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* On avivo, initialize palette control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (par->cmap_type == cmap_avivo) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static void offb_destroy(struct fb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (info->screen_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) iounmap(info->screen_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) fb_dealloc_cmap(&info->cmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) framebuffer_release(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static const struct fb_ops offb_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .fb_destroy = offb_destroy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .fb_setcolreg = offb_setcolreg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .fb_set_par = offb_set_par,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .fb_blank = offb_blank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .fb_fillrect = cfb_fillrect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .fb_copyarea = cfb_copyarea,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .fb_imageblit = cfb_imageblit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static void __iomem *offb_map_reg(struct device_node *np, int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) unsigned long offset, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) const __be32 *addrp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) u64 asize, taddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) addrp = of_get_pci_address(np, index, &asize, &flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (addrp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) addrp = of_get_address(np, index, &asize, &flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (addrp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if ((offset + size) > asize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) taddr = of_translate_address(np, addrp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (taddr == OF_BAD_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return ioremap(taddr + offset, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) unsigned long address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct offb_par *par = (struct offb_par *) info->par;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (of_node_name_prefix(dp, "ATY,Rage128")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (par->cmap_adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) par->cmap_type = cmap_r128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) } else if (of_node_name_prefix(dp, "ATY,RageM3pA") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) of_node_name_prefix(dp, "ATY,RageM3p12A")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (par->cmap_adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) par->cmap_type = cmap_M3A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) } else if (of_node_name_prefix(dp, "ATY,RageM3pB")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (par->cmap_adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) par->cmap_type = cmap_M3B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) } else if (of_node_name_prefix(dp, "ATY,Rage6")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (par->cmap_adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) par->cmap_type = cmap_radeon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) } else if (of_node_name_prefix(dp, "ATY,")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) unsigned long base = address & 0xff000000UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) par->cmap_adr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) par->cmap_data = par->cmap_adr + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) par->cmap_type = cmap_simple;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) of_device_is_compatible(dp, "pci1014,21c"))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (par->cmap_adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) par->cmap_type = cmap_gxt2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) } else if (of_node_name_prefix(dp, "vga,Display-")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* Look for AVIVO initialized by SLOF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) struct device_node *pciparent = of_get_parent(dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) const u32 *vid, *did;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) vid = of_get_property(pciparent, "vendor-id", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) did = of_get_property(pciparent, "device-id", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /* This will match most R5xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (vid && did && *vid == 0x1002 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ((*did >= 0x7100 && *did < 0x7800) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) (*did >= 0x9400))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (par->cmap_adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) par->cmap_type = cmap_avivo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) of_node_put(pciparent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) } else if (dp && of_device_is_compatible(dp, "qemu,std-vga")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) #ifdef __BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) u64 io_addr = of_translate_address(dp, io_of_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (io_addr != OF_BAD_ADDR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) par->cmap_adr = ioremap(io_addr + 0x3c8, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (par->cmap_adr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) par->cmap_type = cmap_simple;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) par->cmap_data = par->cmap_adr + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) info->fix.visual = (par->cmap_type != cmap_unknown) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) static void __init offb_init_fb(const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) int width, int height, int depth,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) int pitch, unsigned long address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) int foreign_endian, struct device_node *dp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) unsigned long res_size = pitch * height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) struct offb_par *par = &default_par;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) unsigned long res_start = address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct fb_fix_screeninfo *fix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct fb_var_screeninfo *var;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct fb_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (!request_mem_region(res_start, res_size, "offb"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) printk(KERN_INFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) width, height, name, address, depth, pitch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) printk(KERN_ERR "%pOF: can't use depth = %d\n", dp, depth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) release_mem_region(res_start, res_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) info = framebuffer_alloc(sizeof(u32) * 16, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (info == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) release_mem_region(res_start, res_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) fix = &info->fix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) var = &info->var;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) info->par = par;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) strcpy(fix->id, "OFfb ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) fix->id[sizeof(fix->id) - 1] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) snprintf(fix->id, sizeof(fix->id), "OFfb %pOFn", dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) var->xres = var->xres_virtual = width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) var->yres = var->yres_virtual = height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) fix->line_length = pitch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) fix->smem_start = address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) fix->smem_len = pitch * height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) fix->type = FB_TYPE_PACKED_PIXELS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) fix->type_aux = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) par->cmap_type = cmap_unknown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (depth == 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) offb_init_palette_hacks(info, dp, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) fix->visual = FB_VISUAL_TRUECOLOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) var->xoffset = var->yoffset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) switch (depth) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) var->bits_per_pixel = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) var->red.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) var->red.length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) var->green.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) var->green.length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) var->blue.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) var->blue.length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) var->transp.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) var->transp.length = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) case 15: /* RGB 555 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) var->bits_per_pixel = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) var->red.offset = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) var->red.length = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) var->green.offset = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) var->green.length = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) var->blue.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) var->blue.length = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) var->transp.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) var->transp.length = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) case 16: /* RGB 565 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) var->bits_per_pixel = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) var->red.offset = 11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) var->red.length = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) var->green.offset = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) var->green.length = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) var->blue.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) var->blue.length = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) var->transp.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) var->transp.length = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) case 32: /* RGB 888 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) var->bits_per_pixel = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) var->red.offset = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) var->red.length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) var->green.offset = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) var->green.length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) var->blue.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) var->blue.length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) var->transp.offset = 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) var->transp.length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) var->red.msb_right = var->green.msb_right = var->blue.msb_right =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) var->transp.msb_right = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) var->grayscale = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) var->nonstd = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) var->activate = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) var->height = var->width = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) var->pixclock = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) var->left_margin = var->right_margin = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) var->upper_margin = var->lower_margin = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) var->hsync_len = var->vsync_len = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) var->sync = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) var->vmode = FB_VMODE_NONINTERLACED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /* set offb aperture size for generic probing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) info->apertures = alloc_apertures(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (!info->apertures)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) goto out_aper;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) info->apertures->ranges[0].base = address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) info->apertures->ranges[0].size = fix->smem_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) info->fbops = &offb_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) info->screen_base = ioremap(address, fix->smem_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) info->pseudo_palette = (void *) (info + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE | foreign_endian;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) fb_alloc_cmap(&info->cmap, 256, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) if (register_framebuffer(info) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) goto out_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) fb_info(info, "Open Firmware frame buffer device on %pOF\n", dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) out_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) fb_dealloc_cmap(&info->cmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) iounmap(info->screen_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) out_aper:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) iounmap(par->cmap_adr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) par->cmap_adr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) framebuffer_release(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) release_mem_region(res_start, res_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) unsigned int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) int i, width = 640, height = 480, depth = 8, pitch = 640;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) unsigned int flags, rsize, addr_prop = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) unsigned long max_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) u64 rstart, address = OF_BAD_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) const __be32 *pp, *addrp, *up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) u64 asize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) int foreign_endian = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) #ifdef __BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (of_get_property(dp, "little-endian", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) foreign_endian = FBINFO_FOREIGN_ENDIAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (of_get_property(dp, "big-endian", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) foreign_endian = FBINFO_FOREIGN_ENDIAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) pp = of_get_property(dp, "linux,bootx-depth", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (pp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) pp = of_get_property(dp, "depth", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (pp && len == sizeof(u32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) depth = be32_to_cpup(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) pp = of_get_property(dp, "linux,bootx-width", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (pp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) pp = of_get_property(dp, "width", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (pp && len == sizeof(u32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) width = be32_to_cpup(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) pp = of_get_property(dp, "linux,bootx-height", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (pp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) pp = of_get_property(dp, "height", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (pp && len == sizeof(u32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) height = be32_to_cpup(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) pp = of_get_property(dp, "linux,bootx-linebytes", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) if (pp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) pp = of_get_property(dp, "linebytes", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) pitch = be32_to_cpup(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) pitch = width * ((depth + 7) / 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) rsize = (unsigned long)pitch * (unsigned long)height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /* Ok, now we try to figure out the address of the framebuffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) * Unfortunately, Open Firmware doesn't provide a standard way to do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) * so. All we can do is a dodgy heuristic that happens to work in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * practice. On most machines, the "address" property contains what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * we need, though not on Matrox cards found in IBM machines. What I've
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * found that appears to give good results is to go through the PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * ranges and pick one that is both big enough and if possible encloses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * the "address" property. If none match, we pick the biggest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) up = of_get_property(dp, "linux,bootx-addr", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (up == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) up = of_get_property(dp, "address", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (up && len == sizeof(u32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) addr_prop = *up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) /* Hack for when BootX is passing us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (no_real_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) goto skip_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) != NULL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) int match_addrp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (!(flags & IORESOURCE_MEM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) if (asize < rsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) rstart = of_translate_address(dp, addrp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) if (rstart == OF_BAD_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) if (addr_prop && (rstart <= addr_prop) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) ((rstart + asize) >= (addr_prop + rsize)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) match_addrp = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if (match_addrp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) address = addr_prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) if (rsize > max_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) max_size = rsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) address = OF_BAD_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) if (address == OF_BAD_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) address = rstart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) skip_addr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (address == OF_BAD_ADDR && addr_prop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) address = (u64)addr_prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (address != OF_BAD_ADDR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) const __be32 *vidp, *didp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) u32 vid, did;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) vidp = of_get_property(dp, "vendor-id", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) didp = of_get_property(dp, "device-id", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (vidp && didp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) vid = be32_to_cpup(vidp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) did = be32_to_cpup(didp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) pdev = pci_get_device(vid, did, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) if (!pdev || pci_enable_device(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) /* kludge for valkyrie */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) if (of_node_name_eq(dp, "valkyrie"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) address += 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) offb_init_fb(no_real_node ? "bootx" : NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) width, height, depth, pitch, address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) foreign_endian, no_real_node ? NULL : dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static int __init offb_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) struct device_node *dp = NULL, *boot_disp = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (fb_get_options("offb", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) /* Check if we have a MacOS display without a node spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (of_get_property(of_chosen, "linux,bootx-noscreen", NULL) != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) /* The old code tried to work out which node was the MacOS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) * display based on the address. I'm dropping that since the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * lack of a node spec only happens with old BootX versions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) * (users can update) and with this code, they'll still get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) * a display (just not the palette hacks).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) offb_init_nodriver(of_chosen, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) for_each_node_by_type(dp, "display") {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (of_get_property(dp, "linux,opened", NULL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) of_get_property(dp, "linux,boot-display", NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) boot_disp = dp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) offb_init_nodriver(dp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) for_each_node_by_type(dp, "display") {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) if (of_get_property(dp, "linux,opened", NULL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) dp != boot_disp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) offb_init_nodriver(dp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) module_init(offb_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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