^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Coral-P(A)/Lime I2C adapter driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "mb862xxfb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "mb862xx_reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static int mb862xx_i2c_wait_event(struct i2c_adapter *adap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct mb862xxfb_par *par = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) reg = inreg(i2c, GC_I2C_BCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) if (reg & (I2C_INT | I2C_BER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) } while (1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) return (reg & I2C_BER) ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static int mb862xx_i2c_do_address(struct i2c_adapter *adap, int addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct mb862xxfb_par *par = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) outreg(i2c, GC_I2C_DAR, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) outreg(i2c, GC_I2C_CCR, I2C_CLOCK_AND_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) outreg(i2c, GC_I2C_BCR, par->i2c_rs ? I2C_REPEATED_START : I2C_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (!mb862xx_i2c_wait_event(adap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) par->i2c_rs = !(inreg(i2c, GC_I2C_BSR) & I2C_LRB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return par->i2c_rs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int mb862xx_i2c_write_byte(struct i2c_adapter *adap, u8 byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct mb862xxfb_par *par = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) outreg(i2c, GC_I2C_DAR, byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) outreg(i2c, GC_I2C_BCR, I2C_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (!mb862xx_i2c_wait_event(adap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return !(inreg(i2c, GC_I2C_BSR) & I2C_LRB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static int mb862xx_i2c_read_byte(struct i2c_adapter *adap, u8 *byte, int last)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct mb862xxfb_par *par = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) outreg(i2c, GC_I2C_BCR, I2C_START | (last ? 0 : I2C_ACK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (!mb862xx_i2c_wait_event(adap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) *byte = inreg(i2c, GC_I2C_DAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static void mb862xx_i2c_stop(struct i2c_adapter *adap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct mb862xxfb_par *par = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) outreg(i2c, GC_I2C_BCR, I2C_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) outreg(i2c, GC_I2C_CCR, I2C_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) par->i2c_rs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int mb862xx_i2c_read(struct i2c_adapter *adap, struct i2c_msg *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int i, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int last = m->len - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) for (i = 0; i < m->len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (!mb862xx_i2c_read_byte(adap, &m->buf[i], i == last)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int mb862xx_i2c_write(struct i2c_adapter *adap, struct i2c_msg *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int i, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) for (i = 0; i < m->len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (!mb862xx_i2c_write_byte(adap, m->buf[i])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int mb862xx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct mb862xxfb_par *par = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct i2c_msg *m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int i = 0, err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) dev_dbg(par->dev, "%s: %d msgs\n", __func__, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) for (i = 0; i < num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) m = &msgs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (!m->len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_dbg(par->dev, "%s: null msgs\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) addr = m->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (m->flags & I2C_M_RD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) addr |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) err = mb862xx_i2c_do_address(adap, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (m->flags & I2C_M_RD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) err = mb862xx_i2c_read(adap, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) err = mb862xx_i2c_write(adap, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) mb862xx_i2c_stop(adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return (err < 0) ? err : i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static u32 mb862xx_func(struct i2c_adapter *adap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return I2C_FUNC_SMBUS_BYTE_DATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static const struct i2c_algorithm mb862xx_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .master_xfer = mb862xx_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .functionality = mb862xx_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static struct i2c_adapter mb862xx_i2c_adapter = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .name = "MB862xx I2C adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .algo = &mb862xx_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) int mb862xx_i2c_init(struct mb862xxfb_par *par)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) mb862xx_i2c_adapter.algo_data = par;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) par->adap = &mb862xx_i2c_adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return i2c_add_adapter(par->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) void mb862xx_i2c_exit(struct mb862xxfb_par *par)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (par->adap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) i2c_del_adapter(par->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) par->adap = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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