^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * linux/drivers/video/hgafb.c -- Hercules graphics adaptor frame buffer device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Created 25 Nov 1999 by Ferenc Bakonyi (fero@drama.obuda.kando.hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Based on skeletonfb.c by Geert Uytterhoeven and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * mdacon.c by Andrew Apted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * History:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * - Revision 0.1.8 (23 Oct 2002): Ported to new framebuffer api.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * - Revision 0.1.7 (23 Jan 2001): fix crash resulting from MDA only cards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * being detected as Hercules. (Paul G.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * - Revision 0.1.6 (17 Aug 2000): new style structs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * - Revision 0.1.5 (13 Mar 2000): spinlocks instead of saveflags();cli();etc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * minor fixes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * - Revision 0.1.4 (24 Jan 2000): fixed a bug in hga_card_detect() for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * HGA-only systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * - Revision 0.1.3 (22 Jan 2000): modified for the new fb_info structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * screen is cleared after rmmod
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * virtual resolutions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * module parameter 'nologo={0|1}'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * the most important: boot logo :)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * - Revision 0.1.0 (6 Dec 1999): faster scrolling and minor fixes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * - First release (25 Nov 1999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * License. See the file COPYING in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/vga.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define DPRINTK(args...) printk(KERN_DEBUG __FILE__": " ##args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define DPRINTK(args...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define CHKINFO(ret) if (info != &fb_info) { printk(KERN_DEBUG __FILE__": This should never happen, line:%d \n", __LINE__); return ret; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define CHKINFO(ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Description of the hardware layout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static void __iomem *hga_vram; /* Base of video memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static unsigned long hga_vram_len; /* Size of video memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define HGA_ROWADDR(row) ((row%4)*8192 + (row>>2)*90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define HGA_TXT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define HGA_GFX 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static inline u8 __iomem * rowaddr(struct fb_info *info, u_int row)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return info->screen_base + HGA_ROWADDR(row);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static int hga_mode = -1; /* 0 = txt, 1 = gfx mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static enum { TYPE_HERC, TYPE_HERCPLUS, TYPE_HERCCOLOR } hga_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static char *hga_type_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define HGA_INDEX_PORT 0x3b4 /* Register select port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define HGA_VALUE_PORT 0x3b5 /* Register value port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define HGA_MODE_PORT 0x3b8 /* Mode control port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define HGA_STATUS_PORT 0x3ba /* Status and Config port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define HGA_GFX_PORT 0x3bf /* Graphics control port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* HGA register values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define HGA_CURSOR_BLINKING 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define HGA_CURSOR_OFF 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define HGA_CURSOR_SLOWBLINK 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define HGA_MODE_GRAPHICS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define HGA_MODE_VIDEO_EN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define HGA_MODE_BLINK_EN 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define HGA_MODE_GFX_PAGE1 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define HGA_STATUS_HSYNC 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define HGA_STATUS_VSYNC 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define HGA_STATUS_VIDEO 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define HGA_CONFIG_COL132 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define HGA_GFX_MODE_EN 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define HGA_GFX_PAGE_EN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* Global locks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static DEFINE_SPINLOCK(hga_reg_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* Framebuffer driver structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static const struct fb_var_screeninfo hga_default_var = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .xres = 720,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .yres = 348,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .xres_virtual = 720,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .yres_virtual = 348,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .bits_per_pixel = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .red = {0, 1, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .green = {0, 1, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .blue = {0, 1, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .transp = {0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .height = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .width = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static struct fb_fix_screeninfo hga_fix = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .id = "HGA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .type = FB_TYPE_PACKED_PIXELS, /* (not sure) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .visual = FB_VISUAL_MONO10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .xpanstep = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .ypanstep = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .line_length = 90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .accel = FB_ACCEL_NONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* Don't assume that tty1 will be the initial current console. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int release_io_port = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int release_io_ports = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static bool nologo = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* -------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * Low level hardware functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * ------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static void write_hga_b(unsigned int val, unsigned char reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) outb_p(reg, HGA_INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) outb_p(val, HGA_VALUE_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static void write_hga_w(unsigned int val, unsigned char reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) outb_p(reg, HGA_INDEX_PORT); outb_p(val >> 8, HGA_VALUE_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) outb_p(reg+1, HGA_INDEX_PORT); outb_p(val & 0xff, HGA_VALUE_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int test_hga_b(unsigned char val, unsigned char reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) outb_p(reg, HGA_INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) outb (val, HGA_VALUE_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) udelay(20); val = (inb_p(HGA_VALUE_PORT) == val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static void hga_clear_screen(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) unsigned char fillchar = 0xbf; /* magic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) spin_lock_irqsave(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (hga_mode == HGA_TXT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) fillchar = ' ';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) else if (hga_mode == HGA_GFX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) fillchar = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) spin_unlock_irqrestore(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (fillchar != 0xbf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) memset_io(hga_vram, fillchar, hga_vram_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static void hga_txt_mode(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) spin_lock_irqsave(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) outb_p(HGA_MODE_VIDEO_EN | HGA_MODE_BLINK_EN, HGA_MODE_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) outb_p(0x00, HGA_GFX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) outb_p(0x00, HGA_STATUS_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) write_hga_b(0x61, 0x00); /* horizontal total */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) write_hga_b(0x50, 0x01); /* horizontal displayed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) write_hga_b(0x52, 0x02); /* horizontal sync pos */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) write_hga_b(0x0f, 0x03); /* horizontal sync width */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) write_hga_b(0x19, 0x04); /* vertical total */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) write_hga_b(0x06, 0x05); /* vertical total adjust */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) write_hga_b(0x19, 0x06); /* vertical displayed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) write_hga_b(0x19, 0x07); /* vertical sync pos */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) write_hga_b(0x02, 0x08); /* interlace mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) write_hga_b(0x0d, 0x09); /* maximum scanline */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) write_hga_b(0x0c, 0x0a); /* cursor start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) write_hga_b(0x0d, 0x0b); /* cursor end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) write_hga_w(0x0000, 0x0c); /* start address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) write_hga_w(0x0000, 0x0e); /* cursor location */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) hga_mode = HGA_TXT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) spin_unlock_irqrestore(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static void hga_gfx_mode(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) spin_lock_irqsave(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) outb_p(0x00, HGA_STATUS_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) outb_p(HGA_GFX_MODE_EN, HGA_GFX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) outb_p(HGA_MODE_VIDEO_EN | HGA_MODE_GRAPHICS, HGA_MODE_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) write_hga_b(0x35, 0x00); /* horizontal total */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) write_hga_b(0x2d, 0x01); /* horizontal displayed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) write_hga_b(0x2e, 0x02); /* horizontal sync pos */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) write_hga_b(0x07, 0x03); /* horizontal sync width */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) write_hga_b(0x5b, 0x04); /* vertical total */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) write_hga_b(0x02, 0x05); /* vertical total adjust */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) write_hga_b(0x57, 0x06); /* vertical displayed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) write_hga_b(0x57, 0x07); /* vertical sync pos */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) write_hga_b(0x02, 0x08); /* interlace mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) write_hga_b(0x03, 0x09); /* maximum scanline */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) write_hga_b(0x00, 0x0a); /* cursor start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) write_hga_b(0x00, 0x0b); /* cursor end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) write_hga_w(0x0000, 0x0c); /* start address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) write_hga_w(0x0000, 0x0e); /* cursor location */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) hga_mode = HGA_GFX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) spin_unlock_irqrestore(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static void hga_show_logo(struct fb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) void __iomem *dest = hga_vram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) char *logo = linux_logo_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) int x, y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) for (y = 134; y < 134 + 80 ; y++) * this needs some cleanup *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) for (x = 0; x < 10 ; x++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) writeb(~*(logo++),(dest + HGA_ROWADDR(y) + x + 40));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static void hga_pan(unsigned int xoffset, unsigned int yoffset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) unsigned int base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) base = (yoffset / 8) * 90 + xoffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) spin_lock_irqsave(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) write_hga_w(base, 0x0c); /* start address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) spin_unlock_irqrestore(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) DPRINTK("hga_pan: base:%d\n", base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static void hga_blank(int blank_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) spin_lock_irqsave(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (blank_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) outb_p(0x00, HGA_MODE_PORT); /* disable video */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) outb_p(HGA_MODE_VIDEO_EN | HGA_MODE_GRAPHICS, HGA_MODE_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) spin_unlock_irqrestore(&hga_reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static int hga_card_detect(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) int count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) void __iomem *p, *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) unsigned short p_save, q_save;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) hga_vram_len = 0x08000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) hga_vram = ioremap(0xb0000, hga_vram_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (!hga_vram)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (request_region(0x3b0, 12, "hgafb"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) release_io_ports = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (request_region(0x3bf, 1, "hgafb"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) release_io_port = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /* do a memory check */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) p = hga_vram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) q = hga_vram + 0x01000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) p_save = readw(p); q_save = readw(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) writew(0xaa55, p); if (readw(p) == 0xaa55) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) writew(0x55aa, p); if (readw(p) == 0x55aa) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) writew(p_save, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (count != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* Ok, there is definitely a card registering at the correct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * memory location, so now we do an I/O port test.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (!test_hga_b(0x66, 0x0f)) /* cursor low register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (!test_hga_b(0x99, 0x0f)) /* cursor low register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /* See if the card is a Hercules, by checking whether the vsync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * bit of the status register is changing. This test lasts for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * approximately 1/10th of a second.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) p_save = q_save = inb_p(HGA_STATUS_PORT) & HGA_STATUS_VSYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) for (count=0; count < 50000 && p_save == q_save; count++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) q_save = inb(HGA_STATUS_PORT) & HGA_STATUS_VSYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) udelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (p_save == q_save)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) switch (inb_p(HGA_STATUS_PORT) & 0x70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) case 0x10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) hga_type = TYPE_HERCPLUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) hga_type_name = "HerculesPlus";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) case 0x50:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) hga_type = TYPE_HERCCOLOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) hga_type_name = "HerculesColor";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) hga_type = TYPE_HERC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) hga_type_name = "Hercules";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (release_io_ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) release_region(0x3b0, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (release_io_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) release_region(0x3bf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) iounmap(hga_vram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) pr_err("hgafb: HGA card not detected.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) * hgafb_open - open the framebuffer device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * @info:pointer to fb_info object containing info for current hga board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * @int:open by console system or userland.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static int hgafb_open(struct fb_info *info, int init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) hga_gfx_mode();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) hga_clear_screen();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (!nologo) hga_show_logo(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * hgafb_open - open the framebuffer device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * @info:pointer to fb_info object containing info for current hga board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * @int:open by console system or userland.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static int hgafb_release(struct fb_info *info, int init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) hga_txt_mode();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) hga_clear_screen();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * hgafb_setcolreg - set color registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * @regno:register index to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * @red:red value, unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * @green:green value, unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * @blue:blue value, unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) * @transp:transparency value, unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * @info:unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) * This callback function is used to set the color registers of a HGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * board. Since we have only two fixed colors only @regno is checked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * A zero is returned on success and 1 for failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static int hgafb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) u_int transp, struct fb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (regno > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * hga_pan_display - pan or wrap the display
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * @var:contains new xoffset, yoffset and vmode values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * @info:pointer to fb_info object containing info for current hga board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * This function looks only at xoffset, yoffset and the %FB_VMODE_YWRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * flag in @var. If input parameters are correct it calls hga_pan() to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) * program the hardware. @info->var is updated to the new values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) * A zero is returned on success and %-EINVAL for failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static int hgafb_pan_display(struct fb_var_screeninfo *var,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct fb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (var->vmode & FB_VMODE_YWRAP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (var->yoffset >= info->var.yres_virtual ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) var->xoffset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) if (var->xoffset + info->var.xres > info->var.xres_virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) || var->yoffset + info->var.yres > info->var.yres_virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) || var->yoffset % 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) hga_pan(var->xoffset, var->yoffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) * hgafb_blank - (un)blank the screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) * @blank_mode:blanking method to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * @info:unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * Blank the screen if blank_mode != 0, else unblank.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * Implements VESA suspend and powerdown modes on hardware that supports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * disabling hsync/vsync:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * @blank_mode == 2 means suspend vsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * @blank_mode == 3 means suspend hsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * @blank_mode == 4 means powerdown.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static int hgafb_blank(int blank_mode, struct fb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) hga_blank(blank_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) * Accel functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static void hgafb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) u_int rows, y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) u8 __iomem *dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) y = rect->dy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) for (rows = rect->height; rows--; y++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) dest = rowaddr(info, y) + (rect->dx >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) switch (rect->rop) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) case ROP_COPY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) memset_io(dest, rect->color, (rect->width >> 3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) case ROP_XOR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) fb_writeb(~(fb_readb(dest)), dest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static void hgafb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) u_int rows, y1, y2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) u8 __iomem *src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) u8 __iomem *dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (area->dy <= area->sy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) y1 = area->sy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) y2 = area->dy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) for (rows = area->height; rows--; ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) src = rowaddr(info, y1) + (area->sx >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) dest = rowaddr(info, y2) + (area->dx >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) memmove(dest, src, (area->width >> 3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) y1++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) y2++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) y1 = area->sy + area->height - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) y2 = area->dy + area->height - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) for (rows = area->height; rows--;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) src = rowaddr(info, y1) + (area->sx >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) dest = rowaddr(info, y2) + (area->dx >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) memmove(dest, src, (area->width >> 3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) y1--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) y2--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static void hgafb_imageblit(struct fb_info *info, const struct fb_image *image)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) u8 __iomem *dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) u8 *cdat = (u8 *) image->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) u_int rows, y = image->dy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) u_int x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) u8 d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) for (rows = image->height; rows--; y++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) for (x = 0; x < image->width; x+= 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) d = *cdat++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) dest = rowaddr(info, y) + ((image->dx + x)>> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) fb_writeb(d, dest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static const struct fb_ops hgafb_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .fb_open = hgafb_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) .fb_release = hgafb_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) .fb_setcolreg = hgafb_setcolreg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) .fb_pan_display = hgafb_pan_display,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .fb_blank = hgafb_blank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .fb_fillrect = hgafb_fillrect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) .fb_copyarea = hgafb_copyarea,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .fb_imageblit = hgafb_imageblit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /* ------------------------------------------------------------------------- *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * Functions in fb_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * ------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) /* ------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) * Initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static int hgafb_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) struct fb_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) ret = hga_card_detect();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) printk(KERN_INFO "hgafb: %s with %ldK of memory detected.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) hga_type_name, hga_vram_len/1024);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) info = framebuffer_alloc(0, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (!info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) iounmap(hga_vram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) hga_fix.smem_start = (unsigned long)hga_vram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) hga_fix.smem_len = hga_vram_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) info->var = hga_default_var;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) info->fix = hga_fix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) info->monspecs.hfmin = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) info->monspecs.hfmax = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) info->monspecs.vfmin = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) info->monspecs.vfmax = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) info->monspecs.dpms = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) info->fbops = &hgafb_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) info->screen_base = hga_vram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (register_framebuffer(info) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) framebuffer_release(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) iounmap(hga_vram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) fb_info(info, "%s frame buffer device\n", info->fix.id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) platform_set_drvdata(pdev, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static int hgafb_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) struct fb_info *info = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) hga_txt_mode();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) hga_clear_screen();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) unregister_framebuffer(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) framebuffer_release(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) iounmap(hga_vram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (release_io_ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) release_region(0x3b0, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) if (release_io_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) release_region(0x3bf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) static struct platform_driver hgafb_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .probe = hgafb_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) .remove = hgafb_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .name = "hgafb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) static struct platform_device *hgafb_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static int __init hgafb_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (fb_get_options("hgafb", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) ret = platform_driver_register(&hgafb_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) hgafb_device = platform_device_register_simple("hgafb", 0, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (IS_ERR(hgafb_device)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) platform_driver_unregister(&hgafb_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) ret = PTR_ERR(hgafb_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) static void __exit hgafb_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) platform_device_unregister(hgafb_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) platform_driver_unregister(&hgafb_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /* -------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) * Modularization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) * ------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) MODULE_AUTHOR("Ferenc Bakonyi (fero@drama.obuda.kando.hu)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) MODULE_DESCRIPTION("FBDev driver for Hercules Graphics Adaptor");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) module_param(nologo, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) MODULE_PARM_DESC(nologo, "Disables startup logo if != 0 (default=0)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) module_init(hgafb_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) module_exit(hgafb_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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