^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * controlfb_hw.h: Constants of all sorts for controlfb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1998 Daniel Jacobowitz <dan@debian.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on an awful lot of code, including:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * control.c: Console support for PowerMac "control" display adaptor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 1996 Paul Mackerras.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * The so far unpublished platinumfb.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Copyright (C) 1998 Jon Howell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Structure of the registers for the RADACAL colormap device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct cmap_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) unsigned char addr; /* index for both cmap and misc registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) char pad1[15];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned char crsr; /* cursor palette */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) char pad2[15];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned char dat; /* RADACAL misc register data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) char pad3[15];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned char lut; /* cmap data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) char pad4[15];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Structure of the registers for the "control" display adaptor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PAD(x) char x[12]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct preg { /* padded register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) char pad[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct control_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct preg vcount; /* vertical counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* Vertical parameters are in units of 1/2 scan line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct preg vswin; /* between vsblank and vssync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct preg vsblank; /* vert start blank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct preg veblank; /* vert end blank (display start) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct preg vewin; /* between vesync and veblank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct preg vesync; /* vert end sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct preg vssync; /* vert start sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct preg vperiod; /* vert period */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct preg piped; /* pipe delay hardware cursor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Horizontal params are in units of 2 pixels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct preg hperiod; /* horiz period - 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct preg hsblank; /* horiz start blank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct preg heblank; /* horiz end blank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct preg hesync; /* horiz end sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct preg hssync; /* horiz start sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct preg heq; /* half horiz sync len */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct preg hlfln; /* half horiz period */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct preg hserr; /* horiz period - horiz sync len */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct preg cnttst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct preg ctrl; /* display control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct preg start_addr; /* start address: 5 lsbs zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct preg pitch; /* addrs diff between scan lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct preg mon_sense; /* monitor sense bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct preg vram_attr; /* enable vram banks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct preg mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct preg rfrcnt; /* refresh count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct preg intr_ena; /* interrupt enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct preg intr_stat; /* interrupt status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct preg res[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct control_regints {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Vertical parameters are in units of 1/2 scan line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned vswin; /* between vsblank and vssync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned vsblank; /* vert start blank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned veblank; /* vert end blank (display start) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned vewin; /* between vesync and veblank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned vesync; /* vert end sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned vssync; /* vert start sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned vperiod; /* vert period */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned piped; /* pipe delay hardware cursor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* Horizontal params are in units of 2 pixels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* Except, apparently, for hres > 1024 (or == 1280?) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned hperiod; /* horiz period - 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned hsblank; /* horiz start blank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned heblank; /* horiz end blank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned hesync; /* horiz end sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned hssync; /* horiz start sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned heq; /* half horiz sync len */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned hlfln; /* half horiz period */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) unsigned hserr; /* horiz period - horiz sync len */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * Dot clock rate is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * 3.9064MHz * 2**clock_params[2] * clock_params[1] / clock_params[0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct control_regvals {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned regs[16]; /* for vswin .. hserr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned char mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned char radacal_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned char clock_params[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define CTRLFB_OFF 16 /* position of pixel 0 in frame buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * Best cmode supported by control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct max_cmodes {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int m[2]; /* 0: 2MB vram, 1: 4MB vram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * Video modes supported by macmodes.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static struct max_cmodes control_mac_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {{-1,-1}}, /* 512x384, 60Hz interlaced (NTSC) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {{-1,-1}}, /* 512x384, 60Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {{-1,-1}}, /* 640x480, 50Hz interlaced (PAL) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {{-1,-1}}, /* 640x480, 60Hz interlaced (NTSC) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {{ 2, 2}}, /* 640x480, 60Hz (VGA) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {{ 2, 2}}, /* 640x480, 67Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {{-1,-1}}, /* 640x870, 75Hz (portrait) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {{-1,-1}}, /* 768x576, 50Hz (PAL full frame) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {{ 2, 2}}, /* 800x600, 56Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {{ 2, 2}}, /* 800x600, 60Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {{ 2, 2}}, /* 800x600, 72Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {{ 2, 2}}, /* 800x600, 75Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {{ 1, 2}}, /* 832x624, 75Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {{ 1, 2}}, /* 1024x768, 60Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {{ 1, 2}}, /* 1024x768, 70Hz (or 72Hz?) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {{ 1, 2}}, /* 1024x768, 75Hz (VESA) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {{ 1, 2}}, /* 1024x768, 75Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {{ 1, 2}}, /* 1152x870, 75Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {{ 0, 1}}, /* 1280x960, 75Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {{ 0, 1}}, /* 1280x1024, 75Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {{ 1, 2}}, /* 1152x768, 60Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {{ 0, 1}}, /* 1600x1024, 60Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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