^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * l4f00242t03.c -- support for Epson L4F00242T03 LCD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Inspired by Marek Vasut work in l4f00242t03.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/lcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct l4f00242t03_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct spi_device *spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct lcd_device *ld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) int lcd_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct regulator *io_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct regulator *core_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct gpio_desc *reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct gpio_desc *enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static void l4f00242t03_reset(struct gpio_desc *gpiod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) pr_debug("l4f00242t03_reset.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) gpiod_set_value(gpiod, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) mdelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) gpiod_set_value(gpiod, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) mdelay(10); /* tRES >= 100us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) gpiod_set_value(gpiod, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) mdelay(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define param(x) ((x) | 0x100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static void l4f00242t03_lcd_init(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct l4f00242t03_priv *priv = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) const u16 cmd[] = { 0x36, param(0), 0x3A, param(0x60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) dev_dbg(&spi->dev, "initializing LCD\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ret = regulator_set_voltage(priv->io_reg, 1800000, 1800000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) dev_err(&spi->dev, "failed to set the IO regulator voltage.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ret = regulator_enable(priv->io_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) dev_err(&spi->dev, "failed to enable the IO regulator.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ret = regulator_set_voltage(priv->core_reg, 2800000, 2800000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) dev_err(&spi->dev, "failed to set the core regulator voltage.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) regulator_disable(priv->io_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ret = regulator_enable(priv->core_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) dev_err(&spi->dev, "failed to enable the core regulator.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) regulator_disable(priv->io_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) l4f00242t03_reset(priv->reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) gpiod_set_value(priv->enable, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) msleep(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) spi_write(spi, (const u8 *)cmd, ARRAY_SIZE(cmd) * sizeof(u16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static void l4f00242t03_lcd_powerdown(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct l4f00242t03_priv *priv = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) dev_dbg(&spi->dev, "Powering down LCD\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) gpiod_set_value(priv->enable, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) regulator_disable(priv->io_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) regulator_disable(priv->core_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static int l4f00242t03_lcd_power_get(struct lcd_device *ld)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct l4f00242t03_priv *priv = lcd_get_data(ld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return priv->lcd_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int l4f00242t03_lcd_power_set(struct lcd_device *ld, int power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct l4f00242t03_priv *priv = lcd_get_data(ld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct spi_device *spi = priv->spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) const u16 slpout = 0x11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) const u16 dison = 0x29;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) const u16 slpin = 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) const u16 disoff = 0x28;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (power <= FB_BLANK_NORMAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (priv->lcd_state <= FB_BLANK_NORMAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* Do nothing, the LCD is running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) } else if (priv->lcd_state < FB_BLANK_POWERDOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) dev_dbg(&spi->dev, "Resuming LCD\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) spi_write(spi, (const u8 *)&slpout, sizeof(u16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) msleep(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) spi_write(spi, (const u8 *)&dison, sizeof(u16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* priv->lcd_state == FB_BLANK_POWERDOWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) l4f00242t03_lcd_init(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) priv->lcd_state = FB_BLANK_VSYNC_SUSPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) l4f00242t03_lcd_power_set(priv->ld, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) } else if (power < FB_BLANK_POWERDOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (priv->lcd_state <= FB_BLANK_NORMAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* Send the display in standby */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) dev_dbg(&spi->dev, "Standby the LCD\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) spi_write(spi, (const u8 *)&disoff, sizeof(u16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) msleep(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) spi_write(spi, (const u8 *)&slpin, sizeof(u16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) } else if (priv->lcd_state < FB_BLANK_POWERDOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* Do nothing, the LCD is already in standby */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* priv->lcd_state == FB_BLANK_POWERDOWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) l4f00242t03_lcd_init(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) priv->lcd_state = FB_BLANK_UNBLANK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) l4f00242t03_lcd_power_set(ld, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* power == FB_BLANK_POWERDOWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (priv->lcd_state != FB_BLANK_POWERDOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* Clear the screen before shutting down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) spi_write(spi, (const u8 *)&disoff, sizeof(u16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) msleep(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) l4f00242t03_lcd_powerdown(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) priv->lcd_state = power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static struct lcd_ops l4f_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .set_power = l4f00242t03_lcd_power_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .get_power = l4f00242t03_lcd_power_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static int l4f00242t03_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct l4f00242t03_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) priv = devm_kzalloc(&spi->dev, sizeof(struct l4f00242t03_priv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (priv == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) spi_set_drvdata(spi, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) spi->bits_per_word = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) spi_setup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) priv->spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) priv->reset = devm_gpiod_get(&spi->dev, "reset", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (IS_ERR(priv->reset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) dev_err(&spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) "Unable to get the lcd l4f00242t03 reset gpio.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return PTR_ERR(priv->reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) gpiod_set_consumer_name(priv->reset, "lcd l4f00242t03 reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) priv->enable = devm_gpiod_get(&spi->dev, "enable", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (IS_ERR(priv->enable)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) dev_err(&spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) "Unable to get the lcd l4f00242t03 data en gpio.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return PTR_ERR(priv->enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) gpiod_set_consumer_name(priv->enable, "lcd l4f00242t03 data enable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) priv->io_reg = devm_regulator_get(&spi->dev, "vdd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (IS_ERR(priv->io_reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) dev_err(&spi->dev, "%s: Unable to get the IO regulator\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return PTR_ERR(priv->io_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) priv->core_reg = devm_regulator_get(&spi->dev, "vcore");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (IS_ERR(priv->core_reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) dev_err(&spi->dev, "%s: Unable to get the core regulator\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return PTR_ERR(priv->core_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) priv->ld = devm_lcd_device_register(&spi->dev, "l4f00242t03", &spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) priv, &l4f_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (IS_ERR(priv->ld))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return PTR_ERR(priv->ld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* Init the LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) l4f00242t03_lcd_init(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) priv->lcd_state = FB_BLANK_VSYNC_SUSPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) l4f00242t03_lcd_power_set(priv->ld, FB_BLANK_UNBLANK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) dev_info(&spi->dev, "Epson l4f00242t03 lcd probed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int l4f00242t03_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct l4f00242t03_priv *priv = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) l4f00242t03_lcd_power_set(priv->ld, FB_BLANK_POWERDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static void l4f00242t03_shutdown(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct l4f00242t03_priv *priv = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) l4f00242t03_lcd_power_set(priv->ld, FB_BLANK_POWERDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static struct spi_driver l4f00242t03_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .name = "l4f00242t03",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .probe = l4f00242t03_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .remove = l4f00242t03_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .shutdown = l4f00242t03_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) module_spi_driver(l4f00242t03_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) MODULE_AUTHOR("Alberto Panizzo <maramaopercheseimorto@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) MODULE_DESCRIPTION("EPSON L4F00242T03 LCD");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) MODULE_LICENSE("GPL v2");