^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* drivers/video/backlight/ili9320.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * ILI9320 LCD controller driver core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2007 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/lcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <video/ili9320.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "ili9320.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static inline int ili9320_write_spi(struct ili9320 *ili,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct ili9320_spi *spi = &ili->access.spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned char *addr = spi->buffer_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned char *data = spi->buffer_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* spi message consits of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * first byte: ID and operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) addr[0] = spi->id | ILI9320_SPI_INDEX | ILI9320_SPI_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) addr[1] = reg >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) addr[2] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* second message is the data to transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) data[0] = spi->id | ILI9320_SPI_DATA | ILI9320_SPI_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) data[1] = value >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) data[2] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return spi_sync(spi->dev, &spi->message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int ili9320_write(struct ili9320 *ili, unsigned int reg, unsigned int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) dev_dbg(ili->dev, "write: reg=%02x, val=%04x\n", reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return ili->write(ili, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) EXPORT_SYMBOL_GPL(ili9320_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int ili9320_write_regs(struct ili9320 *ili,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) const struct ili9320_reg *values,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int nr_values)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) for (index = 0; index < nr_values; index++, values++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ret = ili9320_write(ili, values->address, values->value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) EXPORT_SYMBOL_GPL(ili9320_write_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static void ili9320_reset(struct ili9320 *lcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct ili9320_platdata *cfg = lcd->platdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) cfg->reset(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) mdelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) cfg->reset(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) mdelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) cfg->reset(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) mdelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static inline int ili9320_init_chip(struct ili9320 *lcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ili9320_reset(lcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ret = lcd->client->init(lcd, lcd->platdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) dev_err(lcd->dev, "failed to initialise display\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) lcd->initialised = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static inline int ili9320_power_on(struct ili9320 *lcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (!lcd->initialised)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ili9320_init_chip(lcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) lcd->display1 |= (ILI9320_DISPLAY1_D(3) | ILI9320_DISPLAY1_BASEE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ili9320_write(lcd, ILI9320_DISPLAY1, lcd->display1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static inline int ili9320_power_off(struct ili9320 *lcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) lcd->display1 &= ~(ILI9320_DISPLAY1_D(3) | ILI9320_DISPLAY1_BASEE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ili9320_write(lcd, ILI9320_DISPLAY1, lcd->display1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int ili9320_power(struct ili9320 *lcd, int power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) dev_dbg(lcd->dev, "power %d => %d\n", lcd->power, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ret = ili9320_power_on(lcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ret = ili9320_power_off(lcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) lcd->power = power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) dev_warn(lcd->dev, "failed to set power mode %d\n", power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static inline struct ili9320 *to_our_lcd(struct lcd_device *lcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return lcd_get_data(lcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static int ili9320_set_power(struct lcd_device *ld, int power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct ili9320 *lcd = to_our_lcd(ld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return ili9320_power(lcd, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int ili9320_get_power(struct lcd_device *ld)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct ili9320 *lcd = to_our_lcd(ld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return lcd->power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static struct lcd_ops ili9320_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .get_power = ili9320_get_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .set_power = ili9320_set_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static void ili9320_setup_spi(struct ili9320 *ili,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct spi_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct ili9320_spi *spi = &ili->access.spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) ili->write = ili9320_write_spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) spi->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* fill the two messages we are going to use to send the data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * with, the first the address followed by the data. The datasheet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * says they should be done as two distinct cycles of the SPI CS line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) spi->xfer[0].tx_buf = spi->buffer_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) spi->xfer[1].tx_buf = spi->buffer_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) spi->xfer[0].len = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) spi->xfer[1].len = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) spi->xfer[0].bits_per_word = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) spi->xfer[1].bits_per_word = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) spi->xfer[0].cs_change = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) spi_message_init(&spi->message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) spi_message_add_tail(&spi->xfer[0], &spi->message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) spi_message_add_tail(&spi->xfer[1], &spi->message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int ili9320_probe_spi(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct ili9320_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct ili9320_platdata *cfg = dev_get_platdata(&spi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct device *dev = &spi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct ili9320 *ili;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct lcd_device *lcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* verify we where given some information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (cfg == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dev_err(dev, "no platform data supplied\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (cfg->hsize <= 0 || cfg->vsize <= 0 || cfg->reset == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) dev_err(dev, "invalid platform data supplied\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* allocate and initialse our state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ili = devm_kzalloc(&spi->dev, sizeof(struct ili9320), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (ili == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ili->access.spi.id = ILI9320_SPI_IDCODE | ILI9320_SPI_ID(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ili->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ili->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ili->power = FB_BLANK_POWERDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ili->platdata = cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) spi_set_drvdata(spi, ili);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) ili9320_setup_spi(ili, spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) lcd = devm_lcd_device_register(&spi->dev, "ili9320", dev, ili,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) &ili9320_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (IS_ERR(lcd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) dev_err(dev, "failed to register lcd device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return PTR_ERR(lcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ili->lcd = lcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) dev_info(dev, "initialising %s\n", client->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ret = ili9320_power(ili, FB_BLANK_UNBLANK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) dev_err(dev, "failed to set lcd power state\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) EXPORT_SYMBOL_GPL(ili9320_probe_spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) int ili9320_remove(struct ili9320 *ili)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ili9320_power(ili, FB_BLANK_POWERDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) EXPORT_SYMBOL_GPL(ili9320_remove);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) int ili9320_suspend(struct ili9320 *lcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ret = ili9320_power(lcd, FB_BLANK_POWERDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (lcd->platdata->suspend == ILI9320_SUSPEND_DEEP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) ili9320_write(lcd, ILI9320_POWER1, lcd->power1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ILI9320_POWER1_SLP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ILI9320_POWER1_DSTB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) lcd->initialised = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) EXPORT_SYMBOL_GPL(ili9320_suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) int ili9320_resume(struct ili9320 *lcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) dev_info(lcd->dev, "resuming from power state %d\n", lcd->power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (lcd->platdata->suspend == ILI9320_SUSPEND_DEEP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ili9320_write(lcd, ILI9320_POWER1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return ili9320_power(lcd, FB_BLANK_UNBLANK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) EXPORT_SYMBOL_GPL(ili9320_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* Power down all displays on reboot, poweroff or halt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) void ili9320_shutdown(struct ili9320 *lcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ili9320_power(lcd, FB_BLANK_POWERDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) EXPORT_SYMBOL_GPL(ili9320_shutdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) MODULE_AUTHOR("Ben Dooks <ben-linux@fluff.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) MODULE_DESCRIPTION("ILI9320 LCD Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) MODULE_LICENSE("GPL v2");