^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for the Himax HX-8357 LCD Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2012 Free Electrons
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/lcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define HX8357_NUM_IM_PINS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define HX8357_SWRESET 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define HX8357_GET_RED_CHANNEL 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define HX8357_GET_GREEN_CHANNEL 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define HX8357_GET_BLUE_CHANNEL 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define HX8357_GET_POWER_MODE 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define HX8357_GET_MADCTL 0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define HX8357_GET_PIXEL_FORMAT 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define HX8357_GET_DISPLAY_MODE 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define HX8357_GET_SIGNAL_MODE 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define HX8357_GET_DIAGNOSTIC_RESULT 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define HX8357_ENTER_SLEEP_MODE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define HX8357_EXIT_SLEEP_MODE 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define HX8357_ENTER_PARTIAL_MODE 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define HX8357_ENTER_NORMAL_MODE 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define HX8357_EXIT_INVERSION_MODE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define HX8357_ENTER_INVERSION_MODE 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define HX8357_SET_DISPLAY_OFF 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define HX8357_SET_DISPLAY_ON 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define HX8357_SET_COLUMN_ADDRESS 0x2a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define HX8357_SET_PAGE_ADDRESS 0x2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define HX8357_WRITE_MEMORY_START 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define HX8357_READ_MEMORY_START 0x2e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define HX8357_SET_PARTIAL_AREA 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define HX8357_SET_SCROLL_AREA 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define HX8357_SET_TEAR_OFF 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define HX8357_SET_TEAR_ON 0x35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define HX8357_SET_ADDRESS_MODE 0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define HX8357_SET_SCROLL_START 0x37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define HX8357_EXIT_IDLE_MODE 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define HX8357_ENTER_IDLE_MODE 0x39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define HX8357_SET_PIXEL_FORMAT 0x3a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define HX8357_SET_PIXEL_FORMAT_DBI_3BIT (0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define HX8357_SET_PIXEL_FORMAT_DBI_16BIT (0x5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define HX8357_SET_PIXEL_FORMAT_DBI_18BIT (0x6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define HX8357_SET_PIXEL_FORMAT_DPI_3BIT (0x1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define HX8357_SET_PIXEL_FORMAT_DPI_16BIT (0x5 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define HX8357_SET_PIXEL_FORMAT_DPI_18BIT (0x6 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define HX8357_WRITE_MEMORY_CONTINUE 0x3c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define HX8357_READ_MEMORY_CONTINUE 0x3e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define HX8357_SET_TEAR_SCAN_LINES 0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define HX8357_GET_SCAN_LINES 0x45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define HX8357_READ_DDB_START 0xa1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define HX8357_SET_DISPLAY_MODE 0xb4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define HX8357_SET_DISPLAY_MODE_RGB_THROUGH (0x3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define HX8357_SET_DISPLAY_MODE_RGB_INTERFACE (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define HX8357_SET_PANEL_DRIVING 0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define HX8357_SET_DISPLAY_FRAME 0xc5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define HX8357_SET_RGB 0xc6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define HX8357_SET_RGB_ENABLE_HIGH (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define HX8357_SET_GAMMA 0xc8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define HX8357_SET_POWER 0xd0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define HX8357_SET_VCOM 0xd1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define HX8357_SET_POWER_NORMAL 0xd2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define HX8357_SET_PANEL_RELATED 0xe9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define HX8369_SET_DISPLAY_BRIGHTNESS 0x51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define HX8369_WRITE_CABC_DISPLAY_VALUE 0x53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define HX8369_WRITE_CABC_BRIGHT_CTRL 0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define HX8369_WRITE_CABC_MIN_BRIGHTNESS 0x5e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define HX8369_SET_POWER 0xb1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define HX8369_SET_DISPLAY_MODE 0xb2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define HX8369_SET_DISPLAY_WAVEFORM_CYC 0xb4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define HX8369_SET_VCOM 0xb6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define HX8369_SET_EXTENSION_COMMAND 0xb9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define HX8369_SET_GIP 0xd5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define HX8369_SET_GAMMA_CURVE_RELATED 0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct hx8357_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned im_pins[HX8357_NUM_IM_PINS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct spi_device *spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) bool use_im_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static u8 hx8357_seq_power[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) HX8357_SET_POWER, 0x44, 0x41, 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static u8 hx8357_seq_vcom[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) HX8357_SET_VCOM, 0x40, 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static u8 hx8357_seq_power_normal[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) HX8357_SET_POWER_NORMAL, 0x05, 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static u8 hx8357_seq_panel_driving[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) HX8357_SET_PANEL_DRIVING, 0x14, 0x3b, 0x00, 0x02, 0x11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static u8 hx8357_seq_display_frame[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) HX8357_SET_DISPLAY_FRAME, 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static u8 hx8357_seq_panel_related[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) HX8357_SET_PANEL_RELATED, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static u8 hx8357_seq_undefined1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 0xea, 0x03, 0x00, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static u8 hx8357_seq_undefined2[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 0xeb, 0x40, 0x54, 0x26, 0xdb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static u8 hx8357_seq_gamma[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) HX8357_SET_GAMMA, 0x00, 0x15, 0x00, 0x22, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 0x08, 0x77, 0x26, 0x77, 0x22, 0x04, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static u8 hx8357_seq_address_mode[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) HX8357_SET_ADDRESS_MODE, 0xc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static u8 hx8357_seq_pixel_format[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) HX8357_SET_PIXEL_FORMAT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) HX8357_SET_PIXEL_FORMAT_DPI_18BIT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) HX8357_SET_PIXEL_FORMAT_DBI_18BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static u8 hx8357_seq_column_address[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) HX8357_SET_COLUMN_ADDRESS, 0x00, 0x00, 0x01, 0x3f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static u8 hx8357_seq_page_address[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) HX8357_SET_PAGE_ADDRESS, 0x00, 0x00, 0x01, 0xdf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static u8 hx8357_seq_rgb[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) HX8357_SET_RGB, 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static u8 hx8357_seq_display_mode[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) HX8357_SET_DISPLAY_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) HX8357_SET_DISPLAY_MODE_RGB_THROUGH |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) HX8357_SET_DISPLAY_MODE_RGB_INTERFACE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static u8 hx8369_seq_write_CABC_min_brightness[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) HX8369_WRITE_CABC_MIN_BRIGHTNESS, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static u8 hx8369_seq_write_CABC_control[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) HX8369_WRITE_CABC_DISPLAY_VALUE, 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static u8 hx8369_seq_set_display_brightness[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) HX8369_SET_DISPLAY_BRIGHTNESS, 0xFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static u8 hx8369_seq_write_CABC_control_setting[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) HX8369_WRITE_CABC_BRIGHT_CTRL, 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static u8 hx8369_seq_extension_command[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) HX8369_SET_EXTENSION_COMMAND, 0xff, 0x83, 0x69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static u8 hx8369_seq_display_related[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) HX8369_SET_DISPLAY_MODE, 0x00, 0x2b, 0x03, 0x03, 0x70, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static u8 hx8369_seq_panel_waveform_cycle[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) HX8369_SET_DISPLAY_WAVEFORM_CYC, 0x0a, 0x1d, 0x80, 0x06, 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static u8 hx8369_seq_set_address_mode[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) HX8357_SET_ADDRESS_MODE, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static u8 hx8369_seq_vcom[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) HX8369_SET_VCOM, 0x3e, 0x3e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static u8 hx8369_seq_gip[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) HX8369_SET_GIP, 0x00, 0x01, 0x03, 0x25, 0x01, 0x02, 0x28, 0x70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 0x11, 0x13, 0x00, 0x00, 0x40, 0x26, 0x51, 0x37, 0x00, 0x00, 0x71,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 0x35, 0x60, 0x24, 0x07, 0x0f, 0x04, 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static u8 hx8369_seq_power[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) HX8369_SET_POWER, 0x01, 0x00, 0x34, 0x03, 0x00, 0x11, 0x11, 0x32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 0x2f, 0x3f, 0x3f, 0x01, 0x3a, 0x01, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static u8 hx8369_seq_gamma_curve_related[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) HX8369_SET_GAMMA_CURVE_RELATED, 0x00, 0x0d, 0x19, 0x2f, 0x3b, 0x3d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 0x2e, 0x4a, 0x08, 0x0e, 0x0f, 0x14, 0x16, 0x14, 0x14, 0x14, 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 0x00, 0x0d, 0x19, 0x2f, 0x3b, 0x3d, 0x2e, 0x4a, 0x08, 0x0e, 0x0f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 0x14, 0x16, 0x14, 0x14, 0x14, 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static int hx8357_spi_write_then_read(struct lcd_device *lcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) u8 *txbuf, u16 txlen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) u8 *rxbuf, u16 rxlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct hx8357_data *lcd = lcd_get_data(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct spi_message msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct spi_transfer xfer[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u16 *local_txbuf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) memset(xfer, 0, sizeof(xfer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) spi_message_init(&msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (txlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) local_txbuf = kcalloc(txlen, sizeof(*local_txbuf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (!local_txbuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) for (i = 0; i < txlen; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) local_txbuf[i] = txbuf[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (i > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) local_txbuf[i] |= 1 << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) xfer[0].len = 2 * txlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) xfer[0].bits_per_word = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) xfer[0].tx_buf = local_txbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) spi_message_add_tail(&xfer[0], &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (rxlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) xfer[1].len = rxlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) xfer[1].bits_per_word = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) xfer[1].rx_buf = rxbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) spi_message_add_tail(&xfer[1], &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ret = spi_sync(lcd->spi, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) dev_err(&lcdev->dev, "Couldn't send SPI data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (txlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) kfree(local_txbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static inline int hx8357_spi_write_array(struct lcd_device *lcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) u8 *value, u8 len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return hx8357_spi_write_then_read(lcdev, value, len, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static inline int hx8357_spi_write_byte(struct lcd_device *lcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return hx8357_spi_write_then_read(lcdev, &value, 1, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static int hx8357_enter_standby(struct lcd_device *lcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) usleep_range(10000, 12000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ret = hx8357_spi_write_byte(lcdev, HX8357_ENTER_SLEEP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * The controller needs 120ms when entering in sleep mode before we can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * send the command to go off sleep mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) msleep(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static int hx8357_exit_standby(struct lcd_device *lcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ret = hx8357_spi_write_byte(lcdev, HX8357_EXIT_SLEEP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * The controller needs 120ms when exiting from sleep mode before we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * can send the command to enter in sleep mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) msleep(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static void hx8357_lcd_reset(struct lcd_device *lcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) struct hx8357_data *lcd = lcd_get_data(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* Reset the screen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) gpio_set_value(lcd->reset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) usleep_range(10000, 12000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) gpio_set_value(lcd->reset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) usleep_range(10000, 12000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) gpio_set_value(lcd->reset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* The controller needs 120ms to recover from reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) msleep(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static int hx8357_lcd_init(struct lcd_device *lcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) struct hx8357_data *lcd = lcd_get_data(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * Set the interface selection pins to SPI mode, with three
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * wires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (lcd->use_im_pins) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) gpio_set_value_cansleep(lcd->im_pins[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) gpio_set_value_cansleep(lcd->im_pins[1], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) gpio_set_value_cansleep(lcd->im_pins[2], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) ret = hx8357_spi_write_array(lcdev, hx8357_seq_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) ARRAY_SIZE(hx8357_seq_power));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ret = hx8357_spi_write_array(lcdev, hx8357_seq_vcom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) ARRAY_SIZE(hx8357_seq_vcom));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ret = hx8357_spi_write_array(lcdev, hx8357_seq_power_normal,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) ARRAY_SIZE(hx8357_seq_power_normal));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) ret = hx8357_spi_write_array(lcdev, hx8357_seq_panel_driving,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ARRAY_SIZE(hx8357_seq_panel_driving));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) ret = hx8357_spi_write_array(lcdev, hx8357_seq_display_frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ARRAY_SIZE(hx8357_seq_display_frame));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) ret = hx8357_spi_write_array(lcdev, hx8357_seq_panel_related,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) ARRAY_SIZE(hx8357_seq_panel_related));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) ret = hx8357_spi_write_array(lcdev, hx8357_seq_undefined1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ARRAY_SIZE(hx8357_seq_undefined1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) ret = hx8357_spi_write_array(lcdev, hx8357_seq_undefined2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) ARRAY_SIZE(hx8357_seq_undefined2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ret = hx8357_spi_write_array(lcdev, hx8357_seq_gamma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ARRAY_SIZE(hx8357_seq_gamma));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) ret = hx8357_spi_write_array(lcdev, hx8357_seq_address_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) ARRAY_SIZE(hx8357_seq_address_mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) ret = hx8357_spi_write_array(lcdev, hx8357_seq_pixel_format,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) ARRAY_SIZE(hx8357_seq_pixel_format));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ret = hx8357_spi_write_array(lcdev, hx8357_seq_column_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) ARRAY_SIZE(hx8357_seq_column_address));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) ret = hx8357_spi_write_array(lcdev, hx8357_seq_page_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) ARRAY_SIZE(hx8357_seq_page_address));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ret = hx8357_spi_write_array(lcdev, hx8357_seq_rgb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) ARRAY_SIZE(hx8357_seq_rgb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) ret = hx8357_spi_write_array(lcdev, hx8357_seq_display_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) ARRAY_SIZE(hx8357_seq_display_mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) ret = hx8357_spi_write_byte(lcdev, HX8357_EXIT_SLEEP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) * The controller needs 120ms to fully recover from exiting sleep mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) msleep(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) usleep_range(5000, 7000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) ret = hx8357_spi_write_byte(lcdev, HX8357_WRITE_MEMORY_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int hx8369_lcd_init(struct lcd_device *lcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) ret = hx8357_spi_write_array(lcdev, hx8369_seq_extension_command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) ARRAY_SIZE(hx8369_seq_extension_command));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) usleep_range(10000, 12000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) ret = hx8357_spi_write_array(lcdev, hx8369_seq_display_related,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) ARRAY_SIZE(hx8369_seq_display_related));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) ret = hx8357_spi_write_array(lcdev, hx8369_seq_panel_waveform_cycle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) ARRAY_SIZE(hx8369_seq_panel_waveform_cycle));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) ret = hx8357_spi_write_array(lcdev, hx8369_seq_set_address_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ARRAY_SIZE(hx8369_seq_set_address_mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) ret = hx8357_spi_write_array(lcdev, hx8369_seq_vcom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) ARRAY_SIZE(hx8369_seq_vcom));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) ret = hx8357_spi_write_array(lcdev, hx8369_seq_gip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) ARRAY_SIZE(hx8369_seq_gip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) ret = hx8357_spi_write_array(lcdev, hx8369_seq_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) ARRAY_SIZE(hx8369_seq_power));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) ret = hx8357_spi_write_byte(lcdev, HX8357_EXIT_SLEEP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) * The controller needs 120ms to fully recover from exiting sleep mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) msleep(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) ret = hx8357_spi_write_array(lcdev, hx8369_seq_gamma_curve_related,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) ARRAY_SIZE(hx8369_seq_gamma_curve_related));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) ret = hx8357_spi_write_byte(lcdev, HX8357_EXIT_SLEEP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) ret = hx8357_spi_write_array(lcdev, hx8369_seq_write_CABC_control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ARRAY_SIZE(hx8369_seq_write_CABC_control));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) usleep_range(10000, 12000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) ret = hx8357_spi_write_array(lcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) hx8369_seq_write_CABC_control_setting,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) ARRAY_SIZE(hx8369_seq_write_CABC_control_setting));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) ret = hx8357_spi_write_array(lcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) hx8369_seq_write_CABC_min_brightness,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ARRAY_SIZE(hx8369_seq_write_CABC_min_brightness));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) usleep_range(10000, 12000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) ret = hx8357_spi_write_array(lcdev, hx8369_seq_set_display_brightness,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) ARRAY_SIZE(hx8369_seq_set_display_brightness));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) #define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static int hx8357_set_power(struct lcd_device *lcdev, int power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) struct hx8357_data *lcd = lcd_get_data(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) ret = hx8357_exit_standby(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) ret = hx8357_enter_standby(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) lcd->state = power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) dev_warn(&lcdev->dev, "failed to set power mode %d\n", power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) static int hx8357_get_power(struct lcd_device *lcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) struct hx8357_data *lcd = lcd_get_data(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) return lcd->state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static struct lcd_ops hx8357_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) .set_power = hx8357_set_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) .get_power = hx8357_get_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) static const struct of_device_id hx8357_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .compatible = "himax,hx8357",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .data = hx8357_lcd_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .compatible = "himax,hx8369",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .data = hx8369_lcd_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) MODULE_DEVICE_TABLE(of, hx8357_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static int hx8357_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct lcd_device *lcdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct hx8357_data *lcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) lcd = devm_kzalloc(&spi->dev, sizeof(*lcd), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) if (!lcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) ret = spi_setup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) dev_err(&spi->dev, "SPI setup failed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) lcd->spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) match = of_match_device(hx8357_dt_ids, &spi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) if (!match || !match->data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) lcd->reset = of_get_named_gpio(spi->dev.of_node, "gpios-reset", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (!gpio_is_valid(lcd->reset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) dev_err(&spi->dev, "Missing dt property: gpios-reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) ret = devm_gpio_request_one(&spi->dev, lcd->reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) GPIOF_OUT_INIT_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) "hx8357-reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) dev_err(&spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) "failed to request gpio %d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) lcd->reset, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (of_find_property(spi->dev.of_node, "im-gpios", NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) lcd->use_im_pins = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) for (i = 0; i < HX8357_NUM_IM_PINS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) lcd->im_pins[i] = of_get_named_gpio(spi->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) "im-gpios", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) if (lcd->im_pins[i] == -EPROBE_DEFER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) dev_info(&spi->dev, "GPIO requested is not here yet, deferring the probe\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) if (!gpio_is_valid(lcd->im_pins[i])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) dev_err(&spi->dev, "Missing dt property: im-gpios\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) ret = devm_gpio_request_one(&spi->dev, lcd->im_pins[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) GPIOF_OUT_INIT_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) "im_pins");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) dev_err(&spi->dev, "failed to request gpio %d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) lcd->im_pins[i], ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) lcd->use_im_pins = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) lcdev = devm_lcd_device_register(&spi->dev, "mxsfb", &spi->dev, lcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) &hx8357_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) if (IS_ERR(lcdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) ret = PTR_ERR(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) spi_set_drvdata(spi, lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) hx8357_lcd_reset(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) ret = ((int (*)(struct lcd_device *))match->data)(lcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) dev_err(&spi->dev, "Couldn't initialize panel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) dev_info(&spi->dev, "Panel probed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static struct spi_driver hx8357_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .probe = hx8357_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) .name = "hx8357",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) .of_match_table = hx8357_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) module_spi_driver(hx8357_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) MODULE_DESCRIPTION("Himax HX-8357 LCD Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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