^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Renesas Electronics uPD78F0730 USB to serial converter driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2014,2016 Maksim Salau <maksim.salau@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Protocol of the adaptor is described in the application note U19660EJ1V0AN00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * μPD78F0730 8-bit Single-Chip Microcontroller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * USB-to-Serial Conversion Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * <https://www.renesas.com/en-eu/doc/DocumentServer/026/U19660EJ1V0AN00.pdf>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * The adaptor functionality is limited to the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * - data bits: 7 or 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * - stop bits: 1 or 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * - parity: even, odd or none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * - flow control: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * - baud rates: 0, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 153600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * - signals: DTR, RTS and BREAK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/usb/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DRIVER_DESC "Renesas uPD78F0730 USB to serial converter driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DRIVER_AUTHOR "Maksim Salau <maksim.salau@gmail.com>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static const struct usb_device_id id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { USB_DEVICE(0x0409, 0x0063) }, /* V850ESJX3-STICK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) { USB_DEVICE(0x045B, 0x0212) }, /* YRPBRL78G13, YRPBRL78G14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) { USB_DEVICE(0x064B, 0x7825) }, /* Analog Devices EVAL-ADXL362Z-DB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MODULE_DEVICE_TABLE(usb, id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * Each adaptor is associated with a private structure, that holds the current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * state of control signals (DTR, RTS and BREAK).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct upd78f0730_port_private {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct mutex lock; /* mutex to protect line_signals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u8 line_signals;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* Op-codes of control commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define UPD78F0730_CMD_LINE_CONTROL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define UPD78F0730_CMD_SET_DTR_RTS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define UPD78F0730_CMD_SET_XON_XOFF_CHR 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define UPD78F0730_CMD_OPEN_CLOSE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define UPD78F0730_CMD_SET_ERR_CHR 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Data sizes in UPD78F0730_CMD_LINE_CONTROL command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define UPD78F0730_DATA_SIZE_7_BITS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define UPD78F0730_DATA_SIZE_8_BITS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define UPD78F0730_DATA_SIZE_MASK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* Stop-bit modes in UPD78F0730_CMD_LINE_CONTROL command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define UPD78F0730_STOP_BIT_1_BIT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define UPD78F0730_STOP_BIT_2_BIT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define UPD78F0730_STOP_BIT_MASK 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Parity modes in UPD78F0730_CMD_LINE_CONTROL command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define UPD78F0730_PARITY_NONE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define UPD78F0730_PARITY_EVEN 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define UPD78F0730_PARITY_ODD 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define UPD78F0730_PARITY_MASK 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Flow control modes in UPD78F0730_CMD_LINE_CONTROL command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define UPD78F0730_FLOW_CONTROL_NONE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define UPD78F0730_FLOW_CONTROL_HW 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define UPD78F0730_FLOW_CONTROL_SW 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define UPD78F0730_FLOW_CONTROL_MASK 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* Control signal bits in UPD78F0730_CMD_SET_DTR_RTS command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define UPD78F0730_RTS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define UPD78F0730_DTR 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define UPD78F0730_BREAK 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* Port modes in UPD78F0730_CMD_OPEN_CLOSE command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define UPD78F0730_PORT_CLOSE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define UPD78F0730_PORT_OPEN 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Error character substitution modes in UPD78F0730_CMD_SET_ERR_CHR command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define UPD78F0730_ERR_CHR_DISABLED 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define UPD78F0730_ERR_CHR_ENABLED 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * Declaration of command structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* UPD78F0730_CMD_LINE_CONTROL command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct upd78f0730_line_control {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u8 opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) __le32 baud_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u8 params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* UPD78F0730_CMD_SET_DTR_RTS command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct upd78f0730_set_dtr_rts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u8 opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u8 params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* UPD78F0730_CMD_SET_XON_OFF_CHR command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct upd78f0730_set_xon_xoff_chr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u8 opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u8 xon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u8 xoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* UPD78F0730_CMD_OPEN_CLOSE command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct upd78f0730_open_close {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u8 opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u8 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* UPD78F0730_CMD_SET_ERR_CHR command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct upd78f0730_set_err_chr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u8 opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u8 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u8 err_char;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int upd78f0730_send_ctl(struct usb_serial_port *port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) const void *data, int size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct usb_device *usbdev = port->serial->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) void *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (size <= 0 || !data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) buf = kmemdup(data, size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) res = usb_control_msg(usbdev, usb_sndctrlpipe(usbdev, 0), 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 0x0000, 0x0000, buf, size, USB_CTRL_SET_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (res != size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct device *dev = &port->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) dev_err(dev, "failed to send control request %02x: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) *(u8 *)data, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* The maximum expected length of a transfer is 6 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (res >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) res = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static int upd78f0730_port_probe(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct upd78f0730_port_private *private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) private = kzalloc(sizeof(*private), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (!private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) mutex_init(&private->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) usb_set_serial_port_data(port, private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static int upd78f0730_port_remove(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct upd78f0730_port_private *private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) private = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) mutex_destroy(&private->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) kfree(private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int upd78f0730_tiocmget(struct tty_struct *tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct device *dev = tty->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct upd78f0730_port_private *private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int signals;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) private = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) mutex_lock(&private->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) signals = private->line_signals;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) mutex_unlock(&private->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) res = ((signals & UPD78F0730_DTR) ? TIOCM_DTR : 0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ((signals & UPD78F0730_RTS) ? TIOCM_RTS : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) dev_dbg(dev, "%s - res = %x\n", __func__, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static int upd78f0730_tiocmset(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) unsigned int set, unsigned int clear)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct device *dev = tty->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct upd78f0730_port_private *private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct upd78f0730_set_dtr_rts request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) private = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) mutex_lock(&private->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (set & TIOCM_DTR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) private->line_signals |= UPD78F0730_DTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) dev_dbg(dev, "%s - set DTR\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (set & TIOCM_RTS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) private->line_signals |= UPD78F0730_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) dev_dbg(dev, "%s - set RTS\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (clear & TIOCM_DTR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) private->line_signals &= ~UPD78F0730_DTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) dev_dbg(dev, "%s - clear DTR\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (clear & TIOCM_RTS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) private->line_signals &= ~UPD78F0730_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) dev_dbg(dev, "%s - clear RTS\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) request.opcode = UPD78F0730_CMD_SET_DTR_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) request.params = private->line_signals;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) res = upd78f0730_send_ctl(port, &request, sizeof(request));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) mutex_unlock(&private->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static void upd78f0730_break_ctl(struct tty_struct *tty, int break_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct device *dev = tty->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct upd78f0730_port_private *private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct upd78f0730_set_dtr_rts request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) private = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) mutex_lock(&private->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (break_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) private->line_signals |= UPD78F0730_BREAK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) dev_dbg(dev, "%s - set BREAK\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) private->line_signals &= ~UPD78F0730_BREAK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) dev_dbg(dev, "%s - clear BREAK\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) request.opcode = UPD78F0730_CMD_SET_DTR_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) request.params = private->line_signals;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) upd78f0730_send_ctl(port, &request, sizeof(request));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) mutex_unlock(&private->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static void upd78f0730_dtr_rts(struct usb_serial_port *port, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct tty_struct *tty = port->port.tty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) unsigned int set = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) unsigned int clear = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) set = TIOCM_DTR | TIOCM_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) clear = TIOCM_DTR | TIOCM_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) upd78f0730_tiocmset(tty, set, clear);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static speed_t upd78f0730_get_baud_rate(struct tty_struct *tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) const speed_t baud_rate = tty_get_baud_rate(tty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static const speed_t supported[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 0, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 153600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) for (i = ARRAY_SIZE(supported) - 1; i >= 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (baud_rate == supported[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return baud_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* If the baud rate is not supported, switch to the default one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) tty_encode_baud_rate(tty, 9600, 9600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return tty_get_baud_rate(tty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static void upd78f0730_set_termios(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct usb_serial_port *port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct ktermios *old_termios)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) struct device *dev = &port->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct upd78f0730_line_control request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) speed_t baud_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (old_termios && !tty_termios_hw_change(&tty->termios, old_termios))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (C_BAUD(tty) == B0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) upd78f0730_dtr_rts(port, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) upd78f0730_dtr_rts(port, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) baud_rate = upd78f0730_get_baud_rate(tty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) request.opcode = UPD78F0730_CMD_LINE_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) request.baud_rate = cpu_to_le32(baud_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) request.params = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) dev_dbg(dev, "%s - baud rate = %d\n", __func__, baud_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) switch (C_CSIZE(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) case CS7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) request.params |= UPD78F0730_DATA_SIZE_7_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) dev_dbg(dev, "%s - 7 data bits\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) tty->termios.c_cflag &= ~CSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) tty->termios.c_cflag |= CS8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) dev_warn(dev, "data size is not supported, using 8 bits\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) case CS8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) request.params |= UPD78F0730_DATA_SIZE_8_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) dev_dbg(dev, "%s - 8 data bits\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (C_PARENB(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (C_PARODD(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) request.params |= UPD78F0730_PARITY_ODD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) dev_dbg(dev, "%s - odd parity\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) request.params |= UPD78F0730_PARITY_EVEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) dev_dbg(dev, "%s - even parity\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (C_CMSPAR(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) tty->termios.c_cflag &= ~CMSPAR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) dev_warn(dev, "MARK/SPACE parity is not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) request.params |= UPD78F0730_PARITY_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) dev_dbg(dev, "%s - no parity\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (C_CSTOPB(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) request.params |= UPD78F0730_STOP_BIT_2_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) dev_dbg(dev, "%s - 2 stop bits\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) request.params |= UPD78F0730_STOP_BIT_1_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) dev_dbg(dev, "%s - 1 stop bit\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (C_CRTSCTS(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) tty->termios.c_cflag &= ~CRTSCTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) dev_warn(dev, "RTSCTS flow control is not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (I_IXOFF(tty) || I_IXON(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) tty->termios.c_iflag &= ~(IXOFF | IXON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) dev_warn(dev, "XON/XOFF flow control is not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) request.params |= UPD78F0730_FLOW_CONTROL_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) dev_dbg(dev, "%s - no flow control\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) upd78f0730_send_ctl(port, &request, sizeof(request));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static int upd78f0730_open(struct tty_struct *tty, struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static const struct upd78f0730_open_close request = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .opcode = UPD78F0730_CMD_OPEN_CLOSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .state = UPD78F0730_PORT_OPEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) res = upd78f0730_send_ctl(port, &request, sizeof(request));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) upd78f0730_set_termios(tty, port, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return usb_serial_generic_open(tty, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static void upd78f0730_close(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static const struct upd78f0730_open_close request = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .opcode = UPD78F0730_CMD_OPEN_CLOSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .state = UPD78F0730_PORT_CLOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) usb_serial_generic_close(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) upd78f0730_send_ctl(port, &request, sizeof(request));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static struct usb_serial_driver upd78f0730_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .name = "upd78f0730",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .id_table = id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .num_ports = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .port_probe = upd78f0730_port_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .port_remove = upd78f0730_port_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .open = upd78f0730_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .close = upd78f0730_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .set_termios = upd78f0730_set_termios,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .tiocmget = upd78f0730_tiocmget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .tiocmset = upd78f0730_tiocmset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .dtr_rts = upd78f0730_dtr_rts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .break_ctl = upd78f0730_break_ctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static struct usb_serial_driver * const serial_drivers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) &upd78f0730_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) module_usb_serial_driver(serial_drivers, id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) MODULE_AUTHOR(DRIVER_AUTHOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) MODULE_LICENSE("GPL v2");