Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    3)  * Clean ups from Moschip version and a few ioctl implementations by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    4)  *	Paul B Schroeder <pschroeder "at" uplogix "dot" com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    6)  * Originally based on drivers/usb/serial/io_edgeport.c which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    7)  *      Copyright (C) 2000 Inside Out Networks, All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    8)  *      Copyright (C) 2001-2002 Greg Kroah-Hartman <greg@kroah.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   13) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   15) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   16) #include <linux/tty_driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   17) #include <linux/tty_flip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   19) #include <linux/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   20) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   21) #include <linux/usb/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   22) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   24) #define DRIVER_DESC "Moschip 7840/7820 USB Serial Driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   27)  * 16C50 UART register defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   30) #define LCR_BITS_5             0x00	/* 5 bits/char */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   31) #define LCR_BITS_6             0x01	/* 6 bits/char */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   32) #define LCR_BITS_7             0x02	/* 7 bits/char */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   33) #define LCR_BITS_8             0x03	/* 8 bits/char */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   34) #define LCR_BITS_MASK          0x03	/* Mask for bits/char field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   36) #define LCR_STOP_1             0x00	/* 1 stop bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   37) #define LCR_STOP_1_5           0x04	/* 1.5 stop bits (if 5   bits/char) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   38) #define LCR_STOP_2             0x04	/* 2 stop bits   (if 6-8 bits/char) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   39) #define LCR_STOP_MASK          0x04	/* Mask for stop bits field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   41) #define LCR_PAR_NONE           0x00	/* No parity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   42) #define LCR_PAR_ODD            0x08	/* Odd parity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   43) #define LCR_PAR_EVEN           0x18	/* Even parity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   44) #define LCR_PAR_MARK           0x28	/* Force parity bit to 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   45) #define LCR_PAR_SPACE          0x38	/* Force parity bit to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   46) #define LCR_PAR_MASK           0x38	/* Mask for parity field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   48) #define LCR_SET_BREAK          0x40	/* Set Break condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   49) #define LCR_DL_ENABLE          0x80	/* Enable access to divisor latch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   51) #define MCR_DTR                0x01	/* Assert DTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   52) #define MCR_RTS                0x02	/* Assert RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   53) #define MCR_OUT1               0x04	/* Loopback only: Sets state of RI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   54) #define MCR_MASTER_IE          0x08	/* Enable interrupt outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   55) #define MCR_LOOPBACK           0x10	/* Set internal (digital) loopback mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   56) #define MCR_XON_ANY            0x20	/* Enable any char to exit XOFF mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   58) #define MOS7840_MSR_CTS        0x10	/* Current state of CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   59) #define MOS7840_MSR_DSR        0x20	/* Current state of DSR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   60) #define MOS7840_MSR_RI         0x40	/* Current state of RI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   61) #define MOS7840_MSR_CD         0x80	/* Current state of CD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   63) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   64)  * Defines used for sending commands to port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   65)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   67) #define MOS_WDR_TIMEOUT		5000	/* default urb timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   69) #define MOS_PORT1       0x0200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   70) #define MOS_PORT2       0x0300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   71) #define MOS_VENREG      0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   72) #define MOS_MAX_PORT	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   73) #define MOS_WRITE       0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   74) #define MOS_READ        0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   76) /* Requests */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   77) #define MCS_RD_RTYPE    0xC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   78) #define MCS_WR_RTYPE    0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   79) #define MCS_RDREQ       0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   80) #define MCS_WRREQ       0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   81) #define MCS_CTRL_TIMEOUT        500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   82) #define VENDOR_READ_LENGTH      (0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   84) #define MAX_NAME_LEN    64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   86) #define ZLP_REG1  0x3A		/* Zero_Flag_Reg1    58 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   87) #define ZLP_REG5  0x3E		/* Zero_Flag_Reg5    62 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   89) /* For higher baud Rates use TIOCEXBAUD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   90) #define TIOCEXBAUD     0x5462
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   92) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   93)  * Vendor id and device id defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   94)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   95)  * NOTE: Do not add new defines, add entries directly to the id_table instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   96)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   97) #define USB_VENDOR_ID_BANDB              0x0856
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   98) #define BANDB_DEVICE_ID_USO9ML2_2        0xAC22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   99) #define BANDB_DEVICE_ID_USO9ML2_2P       0xBC00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  100) #define BANDB_DEVICE_ID_USO9ML2_4        0xAC24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  101) #define BANDB_DEVICE_ID_USO9ML2_4P       0xBC01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  102) #define BANDB_DEVICE_ID_US9ML2_2         0xAC29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  103) #define BANDB_DEVICE_ID_US9ML2_4         0xAC30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  104) #define BANDB_DEVICE_ID_USPTL4_2         0xAC31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  105) #define BANDB_DEVICE_ID_USPTL4_4         0xAC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  106) #define BANDB_DEVICE_ID_USOPTL4_2        0xAC42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  107) #define BANDB_DEVICE_ID_USOPTL4_2P       0xBC02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  108) #define BANDB_DEVICE_ID_USOPTL4_4        0xAC44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  109) #define BANDB_DEVICE_ID_USOPTL4_4P       0xBC03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  111) /* Interrupt Routine Defines    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  113) #define SERIAL_IIR_RLS      0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  114) #define SERIAL_IIR_MS       0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  117)  *  Emulation of the bit mask on the LINE STATUS REGISTER.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  118)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  119) #define SERIAL_LSR_DR       0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  120) #define SERIAL_LSR_OE       0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  121) #define SERIAL_LSR_PE       0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  122) #define SERIAL_LSR_FE       0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  123) #define SERIAL_LSR_BI       0x0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  125) #define MOS_MSR_DELTA_CTS   0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  126) #define MOS_MSR_DELTA_DSR   0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  127) #define MOS_MSR_DELTA_RI    0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  128) #define MOS_MSR_DELTA_CD    0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  130) /* Serial Port register Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  131) #define INTERRUPT_ENABLE_REGISTER  ((__u16)(0x01))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  132) #define FIFO_CONTROL_REGISTER      ((__u16)(0x02))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  133) #define LINE_CONTROL_REGISTER      ((__u16)(0x03))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  134) #define MODEM_CONTROL_REGISTER     ((__u16)(0x04))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  135) #define LINE_STATUS_REGISTER       ((__u16)(0x05))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  136) #define MODEM_STATUS_REGISTER      ((__u16)(0x06))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  137) #define SCRATCH_PAD_REGISTER       ((__u16)(0x07))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  138) #define DIVISOR_LATCH_LSB          ((__u16)(0x00))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  139) #define DIVISOR_LATCH_MSB          ((__u16)(0x01))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  141) #define CLK_MULTI_REGISTER         ((__u16)(0x02))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  142) #define CLK_START_VALUE_REGISTER   ((__u16)(0x03))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  143) #define GPIO_REGISTER              ((__u16)(0x07))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  145) #define SERIAL_LCR_DLAB            ((__u16)(0x0080))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  147) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  148)  * URB POOL related defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  149)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  150) #define NUM_URBS                        16	/* URB Count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  151) #define URB_TRANSFER_BUFFER_SIZE        32	/* URB Size  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  153) /* LED on/off milliseconds*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  154) #define LED_ON_MS	500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  155) #define LED_OFF_MS	500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  157) enum mos7840_flag {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  158) 	MOS7840_FLAG_LED_BUSY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  161) #define MCS_PORT_MASK	GENMASK(2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  162) #define MCS_PORTS(nr)	((nr) & MCS_PORT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  163) #define MCS_LED		BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  165) #define MCS_DEVICE(vid, pid, flags) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  166) 		USB_DEVICE((vid), (pid)), .driver_info = (flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  168) static const struct usb_device_id id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  169) 	{ MCS_DEVICE(0x0557, 0x2011, MCS_PORTS(4)) },	/* ATEN UC2324 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  170) 	{ MCS_DEVICE(0x0557, 0x7820, MCS_PORTS(2)) },	/* ATEN UC2322 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  171) 	{ MCS_DEVICE(0x110a, 0x2210, MCS_PORTS(2)) },	/* Moxa UPort 2210 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  172) 	{ MCS_DEVICE(0x9710, 0x7810, MCS_PORTS(1) | MCS_LED) }, /* ASIX MCS7810 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  173) 	{ MCS_DEVICE(0x9710, 0x7820, MCS_PORTS(2)) },	/* MosChip MCS7820 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  174) 	{ MCS_DEVICE(0x9710, 0x7840, MCS_PORTS(4)) },	/* MosChip MCS7840 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  175) 	{ MCS_DEVICE(0x9710, 0x7843, MCS_PORTS(3)) },	/* ASIX MCS7840 3 port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  176) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_2) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  177) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_2P) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  178) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_4) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  179) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_4P) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  180) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_US9ML2_2) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  181) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_US9ML2_4) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  182) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_2) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  183) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_4) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  184) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  185) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2P) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  186) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  187) 	{ USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4P) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  188) 	{}			/* terminating entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  190) MODULE_DEVICE_TABLE(usb, id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  192) /* This structure holds all of the local port information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  194) struct moschip_port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  195) 	int port_num;		/*Actual port number in the device(1,2,etc) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  196) 	struct urb *read_urb;	/* read URB for this port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  197) 	__u8 shadowLCR;		/* last LCR value received */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  198) 	__u8 shadowMCR;		/* last MCR value received */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  199) 	struct usb_serial_port *port;	/* loop back to the owner of this object */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  201) 	/* Offsets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  202) 	__u8 SpRegOffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  203) 	__u8 ControlRegOffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  204) 	__u8 DcrRegOffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  206) 	spinlock_t pool_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  207) 	struct urb *write_urb_pool[NUM_URBS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  208) 	char busy[NUM_URBS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  209) 	bool read_urb_busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  211) 	/* For device(s) with LED indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  212) 	bool has_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  213) 	struct timer_list led_timer1;	/* Timer for LED on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  214) 	struct timer_list led_timer2;	/* Timer for LED off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  215) 	struct urb *led_urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  216) 	struct usb_ctrlrequest *led_dr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  218) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  221) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  222)  * mos7840_set_reg_sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  223)  * 	To set the Control register by calling usb_fill_control_urb function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  224)  *	by passing usb_sndctrlpipe function as parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  225)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  227) static int mos7840_set_reg_sync(struct usb_serial_port *port, __u16 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  228) 				__u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  230) 	struct usb_device *dev = port->serial->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  231) 	val = val & 0x00ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  232) 	dev_dbg(&port->dev, "mos7840_set_reg_sync offset is %x, value %x\n", reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  234) 	return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), MCS_WRREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  235) 			       MCS_WR_RTYPE, val, reg, NULL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  236) 			       MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  239) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  240)  * mos7840_get_reg_sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  241)  * 	To set the Uart register by calling usb_fill_control_urb function by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  242)  *	passing usb_rcvctrlpipe function as parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  243)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  245) static int mos7840_get_reg_sync(struct usb_serial_port *port, __u16 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  246) 				__u16 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  248) 	struct usb_device *dev = port->serial->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  249) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  250) 	u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  252) 	buf = kmalloc(VENDOR_READ_LENGTH, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  253) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  254) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  256) 	ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), MCS_RDREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  257) 			      MCS_RD_RTYPE, 0, reg, buf, VENDOR_READ_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  258) 			      MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  259) 	if (ret < VENDOR_READ_LENGTH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  260) 		if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  261) 			ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  262) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  263) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  265) 	*val = buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  266) 	dev_dbg(&port->dev, "%s offset is %x, return val %x\n", __func__, reg, *val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  267) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  268) 	kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  269) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  272) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  273)  * mos7840_set_uart_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  274)  *	To set the Uart register by calling usb_fill_control_urb function by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  275)  *	passing usb_sndctrlpipe function as parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  276)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  278) static int mos7840_set_uart_reg(struct usb_serial_port *port, __u16 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  279) 				__u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  282) 	struct usb_device *dev = port->serial->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  283) 	val = val & 0x00ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  284) 	/* For the UART control registers, the application number need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  285) 	   to be Or'ed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  286) 	if (port->serial->num_ports == 2 && port->port_number != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  287) 		val |= ((__u16)port->port_number + 2) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  288) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  289) 		val |= ((__u16)port->port_number + 1) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  290) 	dev_dbg(&port->dev, "%s application number is %x\n", __func__, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  291) 	return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), MCS_WRREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  292) 			       MCS_WR_RTYPE, val, reg, NULL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  293) 			       MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  297) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  298)  * mos7840_get_uart_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  299)  *	To set the Control register by calling usb_fill_control_urb function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  300)  *	by passing usb_rcvctrlpipe function as parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  301)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  302) static int mos7840_get_uart_reg(struct usb_serial_port *port, __u16 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  303) 				__u16 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  305) 	struct usb_device *dev = port->serial->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  306) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  307) 	__u16 Wval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  308) 	u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  310) 	buf = kmalloc(VENDOR_READ_LENGTH, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  311) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  312) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  314) 	/* Wval  is same as application number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  315) 	if (port->serial->num_ports == 2 && port->port_number != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  316) 		Wval = ((__u16)port->port_number + 2) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  317) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  318) 		Wval = ((__u16)port->port_number + 1) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  319) 	dev_dbg(&port->dev, "%s application number is %x\n", __func__, Wval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  320) 	ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), MCS_RDREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  321) 			      MCS_RD_RTYPE, Wval, reg, buf, VENDOR_READ_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  322) 			      MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  323) 	if (ret < VENDOR_READ_LENGTH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  324) 		if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  325) 			ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  326) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  327) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  328) 	*val = buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  329) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  330) 	kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  331) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  334) static void mos7840_dump_serial_port(struct usb_serial_port *port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  335) 				     struct moschip_port *mos7840_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  336) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  338) 	dev_dbg(&port->dev, "SpRegOffset is %2x\n", mos7840_port->SpRegOffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  339) 	dev_dbg(&port->dev, "ControlRegOffset is %2x\n", mos7840_port->ControlRegOffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  340) 	dev_dbg(&port->dev, "DCRRegOffset is %2x\n", mos7840_port->DcrRegOffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  344) /************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  345) /************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  346) /*            U S B  C A L L B A C K   F U N C T I O N S                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  347) /*            U S B  C A L L B A C K   F U N C T I O N S                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  348) /************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  349) /************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  351) static void mos7840_set_led_callback(struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  353) 	switch (urb->status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  354) 	case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  355) 		/* Success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  356) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  357) 	case -ECONNRESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  358) 	case -ENOENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  359) 	case -ESHUTDOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  360) 		/* This urb is terminated, clean up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  361) 		dev_dbg(&urb->dev->dev, "%s - urb shutting down: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  362) 			__func__, urb->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  363) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  364) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  365) 		dev_dbg(&urb->dev->dev, "%s - nonzero urb status: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  366) 			__func__, urb->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  367) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  370) static void mos7840_set_led_async(struct moschip_port *mcs, __u16 wval,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  371) 				__u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  373) 	struct usb_device *dev = mcs->port->serial->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  374) 	struct usb_ctrlrequest *dr = mcs->led_dr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  376) 	dr->bRequestType = MCS_WR_RTYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  377) 	dr->bRequest = MCS_WRREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  378) 	dr->wValue = cpu_to_le16(wval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  379) 	dr->wIndex = cpu_to_le16(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  380) 	dr->wLength = cpu_to_le16(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  382) 	usb_fill_control_urb(mcs->led_urb, dev, usb_sndctrlpipe(dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  383) 		(unsigned char *)dr, NULL, 0, mos7840_set_led_callback, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  385) 	usb_submit_urb(mcs->led_urb, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  386) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  387) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  388) static void mos7840_set_led_sync(struct usb_serial_port *port, __u16 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  389) 				__u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  390) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  391) 	struct usb_device *dev = port->serial->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  393) 	usb_control_msg(dev, usb_sndctrlpipe(dev, 0), MCS_WRREQ, MCS_WR_RTYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  394) 			val, reg, NULL, 0, MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  397) static void mos7840_led_off(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  399) 	struct moschip_port *mcs = from_timer(mcs, t, led_timer1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  401) 	/* Turn off LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  402) 	mos7840_set_led_async(mcs, 0x0300, MODEM_CONTROL_REGISTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  403) 	mod_timer(&mcs->led_timer2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  404) 				jiffies + msecs_to_jiffies(LED_OFF_MS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  407) static void mos7840_led_flag_off(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  409) 	struct moschip_port *mcs = from_timer(mcs, t, led_timer2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  411) 	clear_bit_unlock(MOS7840_FLAG_LED_BUSY, &mcs->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  414) static void mos7840_led_activity(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  416) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  417) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  418) 	if (test_and_set_bit_lock(MOS7840_FLAG_LED_BUSY, &mos7840_port->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  419) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  421) 	mos7840_set_led_async(mos7840_port, 0x0301, MODEM_CONTROL_REGISTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  422) 	mod_timer(&mos7840_port->led_timer1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  423) 				jiffies + msecs_to_jiffies(LED_ON_MS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  426) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  427)  * mos7840_bulk_in_callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  428)  *	this is the callback function for when we have received data on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  429)  *	bulk in endpoint.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  430)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  431) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  432) static void mos7840_bulk_in_callback(struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  434) 	struct moschip_port *mos7840_port = urb->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  435) 	struct usb_serial_port *port = mos7840_port->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  436) 	int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  437) 	unsigned char *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  438) 	int status = urb->status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  440) 	if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  441) 		dev_dbg(&urb->dev->dev, "nonzero read bulk status received: %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  442) 		mos7840_port->read_urb_busy = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  443) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  444) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  445) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  446) 	data = urb->transfer_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  447) 	usb_serial_debug_data(&port->dev, __func__, urb->actual_length, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  449) 	if (urb->actual_length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  450) 		struct tty_port *tport = &mos7840_port->port->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  451) 		tty_insert_flip_string(tport, data, urb->actual_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  452) 		tty_flip_buffer_push(tport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  453) 		port->icount.rx += urb->actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  454) 		dev_dbg(&port->dev, "icount.rx is %d:\n", port->icount.rx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  455) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  457) 	if (mos7840_port->has_led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  458) 		mos7840_led_activity(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  459) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  460) 	mos7840_port->read_urb_busy = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  461) 	retval = usb_submit_urb(mos7840_port->read_urb, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  463) 	if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  464) 		dev_dbg(&port->dev, "usb_submit_urb(read bulk) failed, retval = %d\n", retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  465) 		mos7840_port->read_urb_busy = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  466) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  469) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  470)  * mos7840_bulk_out_data_callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  471)  *	this is the callback function for when we have finished sending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  472)  *	serial data on the bulk out endpoint.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  473)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  474) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  475) static void mos7840_bulk_out_data_callback(struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  477) 	struct moschip_port *mos7840_port = urb->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  478) 	struct usb_serial_port *port = mos7840_port->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  479) 	int status = urb->status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  480) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  481) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  482) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  483) 	spin_lock_irqsave(&mos7840_port->pool_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  484) 	for (i = 0; i < NUM_URBS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  485) 		if (urb == mos7840_port->write_urb_pool[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  486) 			mos7840_port->busy[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  487) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  488) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  489) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  490) 	spin_unlock_irqrestore(&mos7840_port->pool_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  491) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  492) 	if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  493) 		dev_dbg(&port->dev, "nonzero write bulk status received:%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  494) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  495) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  496) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  497) 	tty_port_tty_wakeup(&port->port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  498) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  500) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  501) /************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  502) /*       D R I V E R  T T Y  I N T E R F A C E  F U N C T I O N S       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  503) /************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  504) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  505) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  506)  * mos7840_open
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  507)  *	this function is called by the tty driver when a port is opened
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  508)  *	If successful, we return 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  509)  *	Otherwise we return a negative error number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  510)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  511) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  512) static int mos7840_open(struct tty_struct *tty, struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  514) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  515) 	struct usb_serial *serial = port->serial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  516) 	int response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  517) 	int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  518) 	struct urb *urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  519) 	__u16 Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  520) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  521) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  522) 	usb_clear_halt(serial->dev, port->write_urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  523) 	usb_clear_halt(serial->dev, port->read_urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  524) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  525) 	/* Initialising the write urb pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  526) 	for (j = 0; j < NUM_URBS; ++j) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  527) 		urb = usb_alloc_urb(0, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  528) 		mos7840_port->write_urb_pool[j] = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  529) 		if (!urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  530) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  531) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  532) 		urb->transfer_buffer = kmalloc(URB_TRANSFER_BUFFER_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  533) 								GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  534) 		if (!urb->transfer_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  535) 			usb_free_urb(urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  536) 			mos7840_port->write_urb_pool[j] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  537) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  538) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  539) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  540) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  541) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  542)  * Initialize MCS7840 -- Write Init values to corresponding Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  543)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  544)  * Register Index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  545)  * 1 : IER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  546)  * 2 : FCR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  547)  * 3 : LCR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  548)  * 4 : MCR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  549)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  550)  * 0x08 : SP1/2 Control Reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  551)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  552) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  553) 	/* NEED to check the following Block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  554) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  555) 	Data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  556) 	status = mos7840_get_reg_sync(port, mos7840_port->SpRegOffset, &Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  557) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  558) 		dev_dbg(&port->dev, "Reading Spreg failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  559) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  560) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  561) 	Data |= 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  562) 	status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  563) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  564) 		dev_dbg(&port->dev, "writing Spreg failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  565) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  566) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  567) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  568) 	Data &= ~0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  569) 	status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  570) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  571) 		dev_dbg(&port->dev, "writing Spreg failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  572) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  573) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  574) 	/* End of block to be checked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  575) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  576) 	Data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  577) 	status = mos7840_get_reg_sync(port, mos7840_port->ControlRegOffset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  578) 									&Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  579) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  580) 		dev_dbg(&port->dev, "Reading Controlreg failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  581) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  582) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  583) 	Data |= 0x08;		/* Driver done bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  584) 	Data |= 0x20;		/* rx_disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  585) 	status = mos7840_set_reg_sync(port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  586) 				mos7840_port->ControlRegOffset, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  587) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  588) 		dev_dbg(&port->dev, "writing Controlreg failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  589) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  590) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  591) 	/* do register settings here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  592) 	/* Set all regs to the device default values. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  593) 	/***********************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  594) 	 * First Disable all interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  595) 	 ***********************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  596) 	Data = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  597) 	status = mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  598) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  599) 		dev_dbg(&port->dev, "disabling interrupts failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  600) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  601) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  602) 	/* Set FIFO_CONTROL_REGISTER to the default value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  603) 	Data = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  604) 	status = mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  605) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  606) 		dev_dbg(&port->dev, "Writing FIFO_CONTROL_REGISTER  failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  607) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  608) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  609) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  610) 	Data = 0xcf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  611) 	status = mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  612) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  613) 		dev_dbg(&port->dev, "Writing FIFO_CONTROL_REGISTER  failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  614) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  615) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  616) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  617) 	Data = 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  618) 	status = mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  619) 	mos7840_port->shadowLCR = Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  620) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  621) 	Data = 0x0b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  622) 	status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  623) 	mos7840_port->shadowMCR = Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  624) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  625) 	Data = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  626) 	status = mos7840_get_uart_reg(port, LINE_CONTROL_REGISTER, &Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  627) 	mos7840_port->shadowLCR = Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  628) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  629) 	Data |= SERIAL_LCR_DLAB;	/* data latch enable in LCR 0x80 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  630) 	status = mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  631) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  632) 	Data = 0x0c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  633) 	status = mos7840_set_uart_reg(port, DIVISOR_LATCH_LSB, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  634) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  635) 	Data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  636) 	status = mos7840_set_uart_reg(port, DIVISOR_LATCH_MSB, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  637) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  638) 	Data = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  639) 	status = mos7840_get_uart_reg(port, LINE_CONTROL_REGISTER, &Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  640) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  641) 	Data = Data & ~SERIAL_LCR_DLAB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  642) 	status = mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  643) 	mos7840_port->shadowLCR = Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  644) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  645) 	/* clearing Bulkin and Bulkout Fifo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  646) 	Data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  647) 	status = mos7840_get_reg_sync(port, mos7840_port->SpRegOffset, &Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  648) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  649) 	Data = Data | 0x0c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  650) 	status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  651) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  652) 	Data = Data & ~0x0c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  653) 	status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  654) 	/* Finally enable all interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  655) 	Data = 0x0c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  656) 	status = mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  657) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  658) 	/* clearing rx_disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  659) 	Data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  660) 	status = mos7840_get_reg_sync(port, mos7840_port->ControlRegOffset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  661) 									&Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  662) 	Data = Data & ~0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  663) 	status = mos7840_set_reg_sync(port, mos7840_port->ControlRegOffset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  664) 									Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  665) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  666) 	/* rx_negate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  667) 	Data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  668) 	status = mos7840_get_reg_sync(port, mos7840_port->ControlRegOffset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  669) 									&Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  670) 	Data = Data | 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  671) 	status = mos7840_set_reg_sync(port, mos7840_port->ControlRegOffset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  672) 									Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  673) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  674) 	dev_dbg(&port->dev, "port number is %d\n", port->port_number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  675) 	dev_dbg(&port->dev, "minor number is %d\n", port->minor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  676) 	dev_dbg(&port->dev, "Bulkin endpoint is %d\n", port->bulk_in_endpointAddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  677) 	dev_dbg(&port->dev, "BulkOut endpoint is %d\n", port->bulk_out_endpointAddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  678) 	dev_dbg(&port->dev, "Interrupt endpoint is %d\n", port->interrupt_in_endpointAddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  679) 	dev_dbg(&port->dev, "port's number in the device is %d\n", mos7840_port->port_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  680) 	mos7840_port->read_urb = port->read_urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  681) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  682) 	/* set up our bulk in urb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  683) 	if ((serial->num_ports == 2) && (((__u16)port->port_number % 2) != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  684) 		usb_fill_bulk_urb(mos7840_port->read_urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  685) 			serial->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  686) 			usb_rcvbulkpipe(serial->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  687) 				(port->bulk_in_endpointAddress) + 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  688) 			port->bulk_in_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  689) 			mos7840_port->read_urb->transfer_buffer_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  690) 			mos7840_bulk_in_callback, mos7840_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  691) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  692) 		usb_fill_bulk_urb(mos7840_port->read_urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  693) 			serial->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  694) 			usb_rcvbulkpipe(serial->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  695) 				port->bulk_in_endpointAddress),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  696) 			port->bulk_in_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  697) 			mos7840_port->read_urb->transfer_buffer_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  698) 			mos7840_bulk_in_callback, mos7840_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  699) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  700) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  701) 	dev_dbg(&port->dev, "%s: bulkin endpoint is %d\n", __func__, port->bulk_in_endpointAddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  702) 	mos7840_port->read_urb_busy = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  703) 	response = usb_submit_urb(mos7840_port->read_urb, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  704) 	if (response) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  705) 		dev_err(&port->dev, "%s - Error %d submitting control urb\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  706) 			__func__, response);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  707) 		mos7840_port->read_urb_busy = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  708) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  709) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  710) 	/* initialize our port settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  711) 	/* Must set to enable ints! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  712) 	mos7840_port->shadowMCR = MCR_MASTER_IE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  713) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  714) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  715) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  716) 	for (j = 0; j < NUM_URBS; ++j) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  717) 		urb = mos7840_port->write_urb_pool[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  718) 		if (!urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  719) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  720) 		kfree(urb->transfer_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  721) 		usb_free_urb(urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  722) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  723) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  725) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  726) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  727)  * mos7840_chars_in_buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  728)  *	this function is called by the tty driver when it wants to know how many
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  729)  *	bytes of data we currently have outstanding in the port (data that has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  730)  *	been written, but hasn't made it out the port yet)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  731)  *	If successful, we return the number of bytes left to be written in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  732)  *	system,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  733)  *	Otherwise we return zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  734)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  735) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  736) static int mos7840_chars_in_buffer(struct tty_struct *tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  737) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  738) 	struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  739) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  740) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  741) 	int chars = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  742) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  743) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  744) 	spin_lock_irqsave(&mos7840_port->pool_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  745) 	for (i = 0; i < NUM_URBS; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  746) 		if (mos7840_port->busy[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  747) 			struct urb *urb = mos7840_port->write_urb_pool[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  748) 			chars += urb->transfer_buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  749) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  750) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  751) 	spin_unlock_irqrestore(&mos7840_port->pool_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  752) 	dev_dbg(&port->dev, "%s - returns %d\n", __func__, chars);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  753) 	return chars;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  754) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  756) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  757) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  758)  * mos7840_close
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  759)  *	this function is called by the tty driver when a port is closed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  760)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  761) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  762) static void mos7840_close(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  764) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  765) 	int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  766) 	__u16 Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  767) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  768) 	for (j = 0; j < NUM_URBS; ++j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  769) 		usb_kill_urb(mos7840_port->write_urb_pool[j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  770) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  771) 	/* Freeing Write URBs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  772) 	for (j = 0; j < NUM_URBS; ++j) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  773) 		if (mos7840_port->write_urb_pool[j]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  774) 			kfree(mos7840_port->write_urb_pool[j]->transfer_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  775) 			usb_free_urb(mos7840_port->write_urb_pool[j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  776) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  777) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  778) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  779) 	usb_kill_urb(mos7840_port->read_urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  780) 	mos7840_port->read_urb_busy = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  781) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  782) 	Data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  783) 	mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  784) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  785) 	Data = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  786) 	mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  788) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  789) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  790)  * mos7840_break
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  791)  *	this function sends a break to the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  792)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  793) static void mos7840_break(struct tty_struct *tty, int break_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  795) 	struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  796) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  797) 	unsigned char data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  798) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  799) 	if (break_state == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  800) 		data = mos7840_port->shadowLCR | LCR_SET_BREAK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  801) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  802) 		data = mos7840_port->shadowLCR & ~LCR_SET_BREAK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  803) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  804) 	/* FIXME: no locking on shadowLCR anywhere in driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  805) 	mos7840_port->shadowLCR = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  806) 	dev_dbg(&port->dev, "%s mos7840_port->shadowLCR is %x\n", __func__, mos7840_port->shadowLCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  807) 	mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  808) 			     mos7840_port->shadowLCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  809) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  810) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  811) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  812)  * mos7840_write_room
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  813)  *	this function is called by the tty driver when it wants to know how many
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  814)  *	bytes of data we can accept for a specific port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  815)  *	If successful, we return the amount of room that we have for this port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  816)  *	Otherwise we return a negative error number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  817)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  818) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  819) static int mos7840_write_room(struct tty_struct *tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  820) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  821) 	struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  822) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  823) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  824) 	int room = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  825) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  826) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  827) 	spin_lock_irqsave(&mos7840_port->pool_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  828) 	for (i = 0; i < NUM_URBS; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  829) 		if (!mos7840_port->busy[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  830) 			room += URB_TRANSFER_BUFFER_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  831) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  832) 	spin_unlock_irqrestore(&mos7840_port->pool_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  833) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  834) 	room = (room == 0) ? 0 : room - URB_TRANSFER_BUFFER_SIZE + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  835) 	dev_dbg(&mos7840_port->port->dev, "%s - returns %d\n", __func__, room);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  836) 	return room;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  837) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  839) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  840) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  841)  * mos7840_write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  842)  *	this function is called by the tty driver when data should be written to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  843)  *	the port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  844)  *	If successful, we return the number of bytes written, otherwise we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  845)  *      return a negative error number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  846)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  847) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  848) static int mos7840_write(struct tty_struct *tty, struct usb_serial_port *port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  849) 			 const unsigned char *data, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  851) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  852) 	struct usb_serial *serial = port->serial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  853) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  854) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  855) 	int bytes_sent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  856) 	int transfer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  857) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  858) 	struct urb *urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  859) 	/* __u16 Data; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  860) 	const unsigned char *current_position = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  861) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  862) 	/* try to find a free urb in the list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  863) 	urb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  864) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  865) 	spin_lock_irqsave(&mos7840_port->pool_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  866) 	for (i = 0; i < NUM_URBS; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  867) 		if (!mos7840_port->busy[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  868) 			mos7840_port->busy[i] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  869) 			urb = mos7840_port->write_urb_pool[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  870) 			dev_dbg(&port->dev, "URB:%d\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  871) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  872) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  873) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  874) 	spin_unlock_irqrestore(&mos7840_port->pool_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  875) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  876) 	if (urb == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  877) 		dev_dbg(&port->dev, "%s - no more free urbs\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  878) 		goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  879) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  880) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  881) 	if (urb->transfer_buffer == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  882) 		urb->transfer_buffer = kmalloc(URB_TRANSFER_BUFFER_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  883) 					       GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  884) 		if (!urb->transfer_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  885) 			bytes_sent = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  886) 			goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  887) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  888) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  889) 	transfer_size = min(count, URB_TRANSFER_BUFFER_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  890) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  891) 	memcpy(urb->transfer_buffer, current_position, transfer_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  892) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  893) 	/* fill urb with data and submit  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  894) 	if ((serial->num_ports == 2) && (((__u16)port->port_number % 2) != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  895) 		usb_fill_bulk_urb(urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  896) 			serial->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  897) 			usb_sndbulkpipe(serial->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  898) 				(port->bulk_out_endpointAddress) + 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  899) 			urb->transfer_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  900) 			transfer_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  901) 			mos7840_bulk_out_data_callback, mos7840_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  902) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  903) 		usb_fill_bulk_urb(urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  904) 			serial->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  905) 			usb_sndbulkpipe(serial->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  906) 				port->bulk_out_endpointAddress),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  907) 			urb->transfer_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  908) 			transfer_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  909) 			mos7840_bulk_out_data_callback, mos7840_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  910) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  911) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  912) 	dev_dbg(&port->dev, "bulkout endpoint is %d\n", port->bulk_out_endpointAddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  913) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  914) 	if (mos7840_port->has_led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  915) 		mos7840_led_activity(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  916) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  917) 	/* send it down the pipe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  918) 	status = usb_submit_urb(urb, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  919) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  920) 	if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  921) 		mos7840_port->busy[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  922) 		dev_err_console(port, "%s - usb_submit_urb(write bulk) failed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  923) 			"with status = %d\n", __func__, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  924) 		bytes_sent = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  925) 		goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  926) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  927) 	bytes_sent = transfer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  928) 	port->icount.tx += transfer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  929) 	dev_dbg(&port->dev, "icount.tx is %d:\n", port->icount.tx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  930) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  931) 	return bytes_sent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  932) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  934) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  935) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  936)  * mos7840_throttle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  937)  *	this function is called by the tty driver when it wants to stop the data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  938)  *	being read from the port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  939)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  940) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  941) static void mos7840_throttle(struct tty_struct *tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  942) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  943) 	struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  944) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  945) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  946) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  947) 	/* if we are implementing XON/XOFF, send the stop character */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  948) 	if (I_IXOFF(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  949) 		unsigned char stop_char = STOP_CHAR(tty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  950) 		status = mos7840_write(tty, port, &stop_char, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  951) 		if (status <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  952) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  953) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  954) 	/* if we are implementing RTS/CTS, toggle that line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  955) 	if (C_CRTSCTS(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  956) 		mos7840_port->shadowMCR &= ~MCR_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  957) 		status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  958) 					 mos7840_port->shadowMCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  959) 		if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  960) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  961) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  962) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  963) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  964) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  965)  * mos7840_unthrottle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  966)  *	this function is called by the tty driver when it wants to resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  967)  *	the data being read from the port (called after mos7840_throttle is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  968)  *	called)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  969)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  970) static void mos7840_unthrottle(struct tty_struct *tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  971) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  972) 	struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  973) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  974) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  975) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  976) 	/* if we are implementing XON/XOFF, send the start character */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  977) 	if (I_IXOFF(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  978) 		unsigned char start_char = START_CHAR(tty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  979) 		status = mos7840_write(tty, port, &start_char, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  980) 		if (status <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  981) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  982) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  983) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  984) 	/* if we are implementing RTS/CTS, toggle that line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  985) 	if (C_CRTSCTS(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  986) 		mos7840_port->shadowMCR |= MCR_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  987) 		status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  988) 					 mos7840_port->shadowMCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  989) 		if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  990) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  991) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  992) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  993) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  994) static int mos7840_tiocmget(struct tty_struct *tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  995) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  996) 	struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  997) 	unsigned int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  998) 	__u16 msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  999) 	__u16 mcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) 	status = mos7840_get_uart_reg(port, MODEM_STATUS_REGISTER, &msr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) 	if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) 	status = mos7840_get_uart_reg(port, MODEM_CONTROL_REGISTER, &mcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) 	if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) 	result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) 	    | ((mcr & MCR_RTS) ? TIOCM_RTS : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) 	    | ((mcr & MCR_LOOPBACK) ? TIOCM_LOOP : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) 	    | ((msr & MOS7840_MSR_CTS) ? TIOCM_CTS : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) 	    | ((msr & MOS7840_MSR_CD) ? TIOCM_CAR : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) 	    | ((msr & MOS7840_MSR_RI) ? TIOCM_RI : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) 	    | ((msr & MOS7840_MSR_DSR) ? TIOCM_DSR : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) 	dev_dbg(&port->dev, "%s - 0x%04X\n", __func__, result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) 	return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) static int mos7840_tiocmset(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) 			    unsigned int set, unsigned int clear)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) 	struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) 	unsigned int mcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) 	/* FIXME: What locks the port registers ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) 	mcr = mos7840_port->shadowMCR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) 	if (clear & TIOCM_RTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) 		mcr &= ~MCR_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) 	if (clear & TIOCM_DTR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) 		mcr &= ~MCR_DTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) 	if (clear & TIOCM_LOOP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) 		mcr &= ~MCR_LOOPBACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) 	if (set & TIOCM_RTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) 		mcr |= MCR_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) 	if (set & TIOCM_DTR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) 		mcr |= MCR_DTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) 	if (set & TIOCM_LOOP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) 		mcr |= MCR_LOOPBACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) 	mos7840_port->shadowMCR = mcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) 	status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, mcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) 		dev_dbg(&port->dev, "setting MODEM_CONTROL_REGISTER Failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) 		return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)  * mos7840_calc_baud_rate_divisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)  *	this function calculates the proper baud rate divisor for the specified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)  *	baud rate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) static int mos7840_calc_baud_rate_divisor(struct usb_serial_port *port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) 					  int baudRate, int *divisor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) 					  __u16 *clk_sel_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) 	dev_dbg(&port->dev, "%s - %d\n", __func__, baudRate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) 	if (baudRate <= 115200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) 		*divisor = 115200 / baudRate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) 		*clk_sel_val = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) 	if ((baudRate > 115200) && (baudRate <= 230400)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) 		*divisor = 230400 / baudRate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) 		*clk_sel_val = 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) 	} else if ((baudRate > 230400) && (baudRate <= 403200)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) 		*divisor = 403200 / baudRate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) 		*clk_sel_val = 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) 	} else if ((baudRate > 403200) && (baudRate <= 460800)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) 		*divisor = 460800 / baudRate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) 		*clk_sel_val = 0x30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) 	} else if ((baudRate > 460800) && (baudRate <= 806400)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) 		*divisor = 806400 / baudRate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) 		*clk_sel_val = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) 	} else if ((baudRate > 806400) && (baudRate <= 921600)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) 		*divisor = 921600 / baudRate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) 		*clk_sel_val = 0x50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) 	} else if ((baudRate > 921600) && (baudRate <= 1572864)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) 		*divisor = 1572864 / baudRate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) 		*clk_sel_val = 0x60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) 	} else if ((baudRate > 1572864) && (baudRate <= 3145728)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) 		*divisor = 3145728 / baudRate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) 		*clk_sel_val = 0x70;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)  * mos7840_send_cmd_write_baud_rate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)  *	this function sends the proper command to change the baud rate of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)  *	specified port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) static int mos7840_send_cmd_write_baud_rate(struct moschip_port *mos7840_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) 					    int baudRate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) 	struct usb_serial_port *port = mos7840_port->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) 	int divisor = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) 	__u16 Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) 	__u16 clk_sel_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) 	dev_dbg(&port->dev, "%s - baud = %d\n", __func__, baudRate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) 	/* reset clk_uart_sel in spregOffset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) 	if (baudRate > 115200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) #ifdef HW_flow_control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) 		/* NOTE: need to see the pther register to modify */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) 		/* setting h/w flow control bit to 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) 		Data = 0x2b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) 		mos7840_port->shadowMCR = Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) 		status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) 									Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) 		if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) 			dev_dbg(&port->dev, "Writing spreg failed in set_serial_baud\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) 			return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) #ifdef HW_flow_control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) 		/* setting h/w flow control bit to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) 		Data = 0xb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) 		mos7840_port->shadowMCR = Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) 		status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) 									Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) 		if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) 			dev_dbg(&port->dev, "Writing spreg failed in set_serial_baud\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) 			return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) 	if (1) {		/* baudRate <= 115200) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) 		clk_sel_val = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) 		Data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) 		status = mos7840_calc_baud_rate_divisor(port, baudRate, &divisor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) 						   &clk_sel_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) 		status = mos7840_get_reg_sync(port, mos7840_port->SpRegOffset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) 								 &Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) 		if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) 			dev_dbg(&port->dev, "reading spreg failed in set_serial_baud\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) 			return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) 		Data = (Data & 0x8f) | clk_sel_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) 		status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) 								Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) 		if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) 			dev_dbg(&port->dev, "Writing spreg failed in set_serial_baud\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) 			return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) 		/* Calculate the Divisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) 		if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) 			dev_err(&port->dev, "%s - bad baud rate\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) 			return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) 		/* Enable access to divisor latch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) 		Data = mos7840_port->shadowLCR | SERIAL_LCR_DLAB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) 		mos7840_port->shadowLCR = Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) 		mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) 		/* Write the divisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) 		Data = (unsigned char)(divisor & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) 		dev_dbg(&port->dev, "set_serial_baud Value to write DLL is %x\n", Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) 		mos7840_set_uart_reg(port, DIVISOR_LATCH_LSB, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) 		Data = (unsigned char)((divisor & 0xff00) >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) 		dev_dbg(&port->dev, "set_serial_baud Value to write DLM is %x\n", Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) 		mos7840_set_uart_reg(port, DIVISOR_LATCH_MSB, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) 		/* Disable access to divisor latch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) 		Data = mos7840_port->shadowLCR & ~SERIAL_LCR_DLAB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) 		mos7840_port->shadowLCR = Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) 		mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)  * mos7840_change_port_settings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)  *	This routine is called to set the UART on the device to match
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)  *      the specified new settings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) static void mos7840_change_port_settings(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) 	struct moschip_port *mos7840_port, struct ktermios *old_termios)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) 	struct usb_serial_port *port = mos7840_port->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) 	int baud;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) 	unsigned cflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) 	__u8 lData;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) 	__u8 lParity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) 	__u8 lStop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) 	__u16 Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) 	lData = LCR_BITS_8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) 	lStop = LCR_STOP_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) 	lParity = LCR_PAR_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) 	cflag = tty->termios.c_cflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) 	/* Change the number of bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) 	switch (cflag & CSIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) 	case CS5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) 		lData = LCR_BITS_5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) 	case CS6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) 		lData = LCR_BITS_6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) 	case CS7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) 		lData = LCR_BITS_7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) 	case CS8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) 		lData = LCR_BITS_8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) 	/* Change the Parity bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) 	if (cflag & PARENB) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) 		if (cflag & PARODD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) 			lParity = LCR_PAR_ODD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) 			dev_dbg(&port->dev, "%s - parity = odd\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) 			lParity = LCR_PAR_EVEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) 			dev_dbg(&port->dev, "%s - parity = even\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) 		dev_dbg(&port->dev, "%s - parity = none\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) 	if (cflag & CMSPAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) 		lParity = lParity | 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) 	/* Change the Stop bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) 	if (cflag & CSTOPB) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) 		lStop = LCR_STOP_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) 		dev_dbg(&port->dev, "%s - stop bits = 2\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) 		lStop = LCR_STOP_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) 		dev_dbg(&port->dev, "%s - stop bits = 1\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) 	/* Update the LCR with the correct value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) 	mos7840_port->shadowLCR &=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) 	    ~(LCR_BITS_MASK | LCR_STOP_MASK | LCR_PAR_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) 	mos7840_port->shadowLCR |= (lData | lParity | lStop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) 	dev_dbg(&port->dev, "%s - mos7840_port->shadowLCR is %x\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) 		mos7840_port->shadowLCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) 	/* Disable Interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) 	Data = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) 	mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) 	Data = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) 	mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) 	Data = 0xcf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) 	mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) 	/* Send the updated LCR value to the mos7840 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) 	Data = mos7840_port->shadowLCR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) 	mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) 	Data = 0x00b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) 	mos7840_port->shadowMCR = Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) 	mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) 	Data = 0x00b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) 	mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) 	/* set up the MCR register and send it to the mos7840 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) 	mos7840_port->shadowMCR = MCR_MASTER_IE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) 	if (cflag & CBAUD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) 		mos7840_port->shadowMCR |= (MCR_DTR | MCR_RTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) 	if (cflag & CRTSCTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) 		mos7840_port->shadowMCR |= (MCR_XON_ANY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) 		mos7840_port->shadowMCR &= ~(MCR_XON_ANY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) 	Data = mos7840_port->shadowMCR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) 	mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) 	/* Determine divisor based on baud rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) 	baud = tty_get_baud_rate(tty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) 	if (!baud) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) 		/* pick a default, any default... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) 		dev_dbg(&port->dev, "%s", "Picked default baud...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) 		baud = 9600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) 	dev_dbg(&port->dev, "%s - baud rate = %d\n", __func__, baud);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) 	status = mos7840_send_cmd_write_baud_rate(mos7840_port, baud);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) 	/* Enable Interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) 	Data = 0x0c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) 	mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) 	if (!mos7840_port->read_urb_busy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) 		mos7840_port->read_urb_busy = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) 		status = usb_submit_urb(mos7840_port->read_urb, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) 		if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) 			dev_dbg(&port->dev, "usb_submit_urb(read bulk) failed, status = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) 			    status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) 			mos7840_port->read_urb_busy = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) 	dev_dbg(&port->dev, "%s - mos7840_port->shadowLCR is End %x\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) 		mos7840_port->shadowLCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331)  * mos7840_set_termios
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332)  *	this function is called by the tty driver when it wants to change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333)  *	the termios structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) static void mos7840_set_termios(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) 				struct usb_serial_port *port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) 				struct ktermios *old_termios)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) 	/* change the port settings to the new ones specified */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) 	mos7840_change_port_settings(tty, mos7840_port, old_termios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) 	if (!mos7840_port->read_urb_busy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) 		mos7840_port->read_urb_busy = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) 		status = usb_submit_urb(mos7840_port->read_urb, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) 		if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) 			dev_dbg(&port->dev, "usb_submit_urb(read bulk) failed, status = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) 			    status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) 			mos7840_port->read_urb_busy = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)  * mos7840_get_lsr_info - get line status register info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361)  * Purpose: Let user call ioctl() to get info when the UART physically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362)  * 	    is emptied.  On bus types like RS485, the transmitter must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363)  * 	    release the bus after transmitting. This must be done when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)  * 	    the transmit shift register is empty, not be done when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)  * 	    transmit holding register is empty.  This functionality
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)  * 	    allows an RS485 driver to be written in user space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) static int mos7840_get_lsr_info(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) 				unsigned int __user *value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) 	int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) 	unsigned int result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) 	count = mos7840_chars_in_buffer(tty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) 	if (count == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) 		result = TIOCSER_TEMT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) 	if (copy_to_user(value, &result, sizeof(int)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) 		return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)  * mos7840_get_serial_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386)  *      function to get information about serial port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) static int mos7840_get_serial_info(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) 				   struct serial_struct *ss)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) 	struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) 	ss->type = PORT_16550A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) 	ss->line = mos7840_port->port->minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) 	ss->port = mos7840_port->port->port_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) 	ss->irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) 	ss->xmit_fifo_size = NUM_URBS * URB_TRANSFER_BUFFER_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) 	ss->baud_base = 9600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) 	ss->close_delay = 5 * HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) 	ss->closing_wait = 30 * HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407)  * SerialIoctl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)  *	this function handles any ioctl calls to the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409)  *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) static int mos7840_ioctl(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) 			 unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) 	struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) 	void __user *argp = (void __user *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) 		/* return number of bytes available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) 	case TIOCSERGETLSR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) 		dev_dbg(&port->dev, "%s TIOCSERGETLSR\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) 		return mos7840_get_lsr_info(tty, argp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) 	return -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431)  * Check if GPO (pin 42) is connected to GPI (pin 33) as recommended by ASIX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432)  * for MCS7810 by bit-banging a 16-bit word.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434)  * Note that GPO is really RTS of the third port so this will toggle RTS of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435)  * port two or three on two- and four-port devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) static int mos7810_check(struct usb_serial *serial)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) 	int i, pass_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) 	u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) 	__u16 data = 0, mcr_data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) 	__u16 test_pattern = 0x55AA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) 	int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) 	buf = kmalloc(VENDOR_READ_LENGTH, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) 		return 0;	/* failed to identify 7810 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) 	/* Store MCR setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) 	res = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) 		MCS_RDREQ, MCS_RD_RTYPE, 0x0300, MODEM_CONTROL_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) 		buf, VENDOR_READ_LENGTH, MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) 	if (res == VENDOR_READ_LENGTH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) 		mcr_data = *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) 	for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) 		/* Send the 1-bit test pattern out to MCS7810 test pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) 		usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) 			MCS_WRREQ, MCS_WR_RTYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) 			(0x0300 | (((test_pattern >> i) & 0x0001) << 1)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) 			MODEM_CONTROL_REGISTER, NULL, 0, MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) 		/* Read the test pattern back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) 		res = usb_control_msg(serial->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) 				usb_rcvctrlpipe(serial->dev, 0), MCS_RDREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) 				MCS_RD_RTYPE, 0, GPIO_REGISTER, buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) 				VENDOR_READ_LENGTH, MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) 		if (res == VENDOR_READ_LENGTH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) 			data = *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) 		/* If this is a MCS7810 device, both test patterns must match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) 		if (((test_pattern >> i) ^ (~data >> 1)) & 0x0001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) 		pass_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) 	/* Restore MCR setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) 	usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0), MCS_WRREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) 		MCS_WR_RTYPE, 0x0300 | mcr_data, MODEM_CONTROL_REGISTER, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) 		0, MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) 	kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) 	if (pass_count == 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) static int mos7840_probe(struct usb_serial *serial,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) 				const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) 	unsigned long device_flags = id->driver_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) 	u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) 	/* Skip device-type detection if we already have device flags. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) 	if (device_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) 	buf = kzalloc(VENDOR_READ_LENGTH, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) 	usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) 			MCS_RDREQ, MCS_RD_RTYPE, 0, GPIO_REGISTER, buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) 			VENDOR_READ_LENGTH, MOS_WDR_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) 	/* For a MCS7840 device GPIO0 must be set to 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) 	if (buf[0] & 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) 		device_flags = MCS_PORTS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) 	else if (mos7810_check(serial))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) 		device_flags = MCS_PORTS(1) | MCS_LED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) 		device_flags = MCS_PORTS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) 	kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) 	usb_set_serial_data(serial, (void *)device_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) static int mos7840_calc_num_ports(struct usb_serial *serial,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) 					struct usb_serial_endpoints *epds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) 	unsigned long device_flags = (unsigned long)usb_get_serial_data(serial);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) 	int num_ports = MCS_PORTS(device_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) 	if (num_ports == 0 || num_ports > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) 	if (epds->num_bulk_in < num_ports || epds->num_bulk_out < num_ports) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) 		dev_err(&serial->interface->dev, "missing endpoints\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) 	return num_ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) static int mos7840_attach(struct usb_serial *serial)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) 	struct device *dev = &serial->interface->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) 	u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) 	/* Zero Length flag enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) 	val = 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) 	status = mos7840_set_reg_sync(serial->port[0], ZLP_REG5, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) 	if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) 		dev_dbg(dev, "Writing ZLP_REG5 failed status-0x%x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) 		dev_dbg(dev, "ZLP_REG5 Writing success status%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) static int mos7840_port_probe(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) 	struct usb_serial *serial = port->serial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) 	unsigned long device_flags = (unsigned long)usb_get_serial_data(serial);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) 	struct moschip_port *mos7840_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) 	int pnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) 	__u16 Data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) 	/* we set up the pointers to the endpoints in the mos7840_open *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) 	 * function, as the structures aren't created yet.             */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) 	pnum = port->port_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) 	dev_dbg(&port->dev, "mos7840_startup: configuring port %d\n", pnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) 	mos7840_port = kzalloc(sizeof(struct moschip_port), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) 	if (!mos7840_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) 	/* Initialize all port interrupt end point to port 0 int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) 	 * endpoint. Our device has only one interrupt end point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) 	 * common to all port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) 	mos7840_port->port = port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) 	spin_lock_init(&mos7840_port->pool_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) 	/* minor is not initialised until later by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) 	 * usb-serial.c:get_free_serial() and cannot therefore be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) 	 * to index device instances */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) 	mos7840_port->port_num = pnum + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) 	dev_dbg(&port->dev, "port->minor = %d\n", port->minor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) 	dev_dbg(&port->dev, "mos7840_port->port_num = %d\n", mos7840_port->port_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) 	if (mos7840_port->port_num == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) 		mos7840_port->SpRegOffset = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) 		mos7840_port->ControlRegOffset = 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) 		mos7840_port->DcrRegOffset = 0x4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) 		u8 phy_num = mos7840_port->port_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) 		/* Port 2 in the 2-port case uses registers of port 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) 		if (serial->num_ports == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) 			phy_num = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) 		mos7840_port->SpRegOffset = 0x8 + 2 * (phy_num - 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) 		mos7840_port->ControlRegOffset = 0x9 + 2 * (phy_num - 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) 		mos7840_port->DcrRegOffset = 0x16 + 3 * (phy_num - 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) 	mos7840_dump_serial_port(port, mos7840_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) 	usb_set_serial_port_data(port, mos7840_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) 	/* enable rx_disable bit in control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) 	status = mos7840_get_reg_sync(port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) 			mos7840_port->ControlRegOffset, &Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) 		dev_dbg(&port->dev, "Reading ControlReg failed status-0x%x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) 		dev_dbg(&port->dev, "ControlReg Reading success val is %x, status%d\n", Data, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) 	Data |= 0x08;	/* setting driver done bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) 	Data |= 0x04;	/* sp1_bit to have cts change reflect in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) 			   modem status reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) 	/* Data |= 0x20; //rx_disable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) 	status = mos7840_set_reg_sync(port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) 			mos7840_port->ControlRegOffset, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) 		dev_dbg(&port->dev, "Writing ControlReg failed(rx_disable) status-0x%x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) 		dev_dbg(&port->dev, "ControlReg Writing success(rx_disable) status%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) 	/* Write default values in DCR (i.e 0x01 in DCR0, 0x05 in DCR2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) 	   and 0x24 in DCR3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) 	Data = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) 	status = mos7840_set_reg_sync(port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) 			(__u16) (mos7840_port->DcrRegOffset + 0), Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) 		dev_dbg(&port->dev, "Writing DCR0 failed status-0x%x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) 		dev_dbg(&port->dev, "DCR0 Writing success status%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) 	Data = 0x05;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) 	status = mos7840_set_reg_sync(port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) 			(__u16) (mos7840_port->DcrRegOffset + 1), Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) 		dev_dbg(&port->dev, "Writing DCR1 failed status-0x%x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) 		dev_dbg(&port->dev, "DCR1 Writing success status%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) 	Data = 0x24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) 	status = mos7840_set_reg_sync(port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) 			(__u16) (mos7840_port->DcrRegOffset + 2), Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) 		dev_dbg(&port->dev, "Writing DCR2 failed status-0x%x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) 		dev_dbg(&port->dev, "DCR2 Writing success status%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) 	/* write values in clkstart0x0 and clkmulti 0x20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) 	Data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) 	status = mos7840_set_reg_sync(port, CLK_START_VALUE_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) 		dev_dbg(&port->dev, "Writing CLK_START_VALUE_REGISTER failed status-0x%x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) 		dev_dbg(&port->dev, "CLK_START_VALUE_REGISTER Writing success status%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) 	Data = 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) 	status = mos7840_set_reg_sync(port, CLK_MULTI_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) 		dev_dbg(&port->dev, "Writing CLK_MULTI_REGISTER failed status-0x%x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) 		dev_dbg(&port->dev, "CLK_MULTI_REGISTER Writing success status%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) 	/* write value 0x0 to scratchpad register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) 	Data = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) 	status = mos7840_set_uart_reg(port, SCRATCH_PAD_REGISTER, Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) 	if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) 		dev_dbg(&port->dev, "Writing SCRATCH_PAD_REGISTER failed status-0x%x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) 		dev_dbg(&port->dev, "SCRATCH_PAD_REGISTER Writing success status%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) 	/* Zero Length flag register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) 	if ((mos7840_port->port_num != 1) && (serial->num_ports == 2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) 		Data = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) 		status = mos7840_set_reg_sync(port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) 				(__u16) (ZLP_REG1 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) 					((__u16)mos7840_port->port_num)), Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) 		dev_dbg(&port->dev, "ZLIP offset %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) 				(__u16)(ZLP_REG1 + ((__u16) mos7840_port->port_num)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) 		if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) 			dev_dbg(&port->dev, "Writing ZLP_REG%d failed status-0x%x\n", pnum + 2, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) 			goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) 		} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) 			dev_dbg(&port->dev, "ZLP_REG%d Writing success status%d\n", pnum + 2, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) 		Data = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) 		status = mos7840_set_reg_sync(port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) 				(__u16) (ZLP_REG1 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) 					((__u16)mos7840_port->port_num) - 0x1), Data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) 		dev_dbg(&port->dev, "ZLIP offset %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) 				(__u16)(ZLP_REG1 + ((__u16) mos7840_port->port_num) - 0x1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) 		if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) 			dev_dbg(&port->dev, "Writing ZLP_REG%d failed status-0x%x\n", pnum + 1, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) 			goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) 		} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) 			dev_dbg(&port->dev, "ZLP_REG%d Writing success status%d\n", pnum + 1, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) 	mos7840_port->has_led = device_flags & MCS_LED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) 	/* Initialize LED timers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) 	if (mos7840_port->has_led) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) 		mos7840_port->led_urb = usb_alloc_urb(0, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) 		mos7840_port->led_dr = kmalloc(sizeof(*mos7840_port->led_dr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) 								GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) 		if (!mos7840_port->led_urb || !mos7840_port->led_dr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) 			status = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) 			goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) 		timer_setup(&mos7840_port->led_timer1, mos7840_led_off, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) 		mos7840_port->led_timer1.expires =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) 			jiffies + msecs_to_jiffies(LED_ON_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) 		timer_setup(&mos7840_port->led_timer2, mos7840_led_flag_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) 			    0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) 		mos7840_port->led_timer2.expires =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) 			jiffies + msecs_to_jiffies(LED_OFF_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) 		/* Turn off LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) 		mos7840_set_led_sync(port, MODEM_CONTROL_REGISTER, 0x0300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) 	kfree(mos7840_port->led_dr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) 	usb_free_urb(mos7840_port->led_urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) 	kfree(mos7840_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) static int mos7840_port_remove(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) 	struct moschip_port *mos7840_port = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) 	if (mos7840_port->has_led) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) 		/* Turn off LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) 		mos7840_set_led_sync(port, MODEM_CONTROL_REGISTER, 0x0300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) 		del_timer_sync(&mos7840_port->led_timer1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) 		del_timer_sync(&mos7840_port->led_timer2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) 		usb_kill_urb(mos7840_port->led_urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) 		usb_free_urb(mos7840_port->led_urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) 		kfree(mos7840_port->led_dr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) 	kfree(mos7840_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) static struct usb_serial_driver moschip7840_4port_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) 		   .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) 		   .name = "mos7840",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) 		   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) 	.description = DRIVER_DESC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) 	.id_table = id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) 	.num_interrupt_in = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) 	.open = mos7840_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) 	.close = mos7840_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) 	.write = mos7840_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) 	.write_room = mos7840_write_room,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) 	.chars_in_buffer = mos7840_chars_in_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) 	.throttle = mos7840_throttle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) 	.unthrottle = mos7840_unthrottle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) 	.calc_num_ports = mos7840_calc_num_ports,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) 	.probe = mos7840_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) 	.attach = mos7840_attach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) 	.ioctl = mos7840_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) 	.get_serial = mos7840_get_serial_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) 	.set_termios = mos7840_set_termios,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) 	.break_ctl = mos7840_break,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) 	.tiocmget = mos7840_tiocmget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) 	.tiocmset = mos7840_tiocmset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) 	.get_icount = usb_serial_generic_get_icount,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) 	.port_probe = mos7840_port_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) 	.port_remove = mos7840_port_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) 	.read_bulk_callback = mos7840_bulk_in_callback,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) static struct usb_serial_driver * const serial_drivers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) 	&moschip7840_4port_device, NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) module_usb_serial_driver(serial_drivers, id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) MODULE_LICENSE("GPL");