Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Definitions for the KLSI KL5KUSB105 serial port adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) /* vendor/product pairs that are known to contain this chipset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define PALMCONNECT_VID		0x0830
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define PALMCONNECT_PID		0x0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* Vendor commands: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* port table -- the chip supports up to 4 channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* baud rates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	kl5kusb105a_sio_b115200 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	kl5kusb105a_sio_b57600  = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	kl5kusb105a_sio_b38400  = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	kl5kusb105a_sio_b19200  = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	kl5kusb105a_sio_b14400  = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	kl5kusb105a_sio_b9600   = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	kl5kusb105a_sio_b4800   = 8,	/* unchecked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	kl5kusb105a_sio_b2400   = 9,	/* unchecked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	kl5kusb105a_sio_b1200   = 0xa,	/* unchecked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	kl5kusb105a_sio_b600    = 0xb	/* unchecked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* data bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define kl5kusb105a_dtb_7   7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define kl5kusb105a_dtb_8   8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* requests: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define KL5KUSB105A_SIO_SET_DATA  1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define KL5KUSB105A_SIO_POLL      2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define KL5KUSB105A_SIO_CONFIGURE      3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* values used for request KL5KUSB105A_SIO_CONFIGURE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define KL5KUSB105A_SIO_CONFIGURE_READ_ON      3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define KL5KUSB105A_SIO_CONFIGURE_READ_OFF     2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* Interpretation of modem status lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* These need sorting out by individually connecting pins and checking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)  * results. FIXME!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)  * When data is being sent we see 0x30 in the lower byte; this must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)  * contain DSR and CTS ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define KL5KUSB105A_DSR			((1<<4) | (1<<5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define KL5KUSB105A_CTS			((1<<5) | (1<<4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define KL5KUSB105A_WANTS_TO_SEND	0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define KL5KUSB105A_DTR			/* Data Terminal Ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define KL5KUSB105A_CTS			/* Clear To Send */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define KL5KUSB105A_CD			/* Carrier Detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define KL5KUSB105A_DSR			/* Data Set Ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define KL5KUSB105A_RxD			/* Receive pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define KL5KUSB105A_LE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define KL5KUSB105A_RTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define KL5KUSB105A_ST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define KL5KUSB105A_SR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define KL5KUSB105A_RI			/* Ring Indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #endif