Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: BSD-3-Clause */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 	usa67msg.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 	Copyright (c) 1998-2007 InnoSys Incorporated.  All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 	This file is available under a BSD-style copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 	Keyspan USB Async Firmware to run on Anchor FX1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 	Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 	modification, are permitted provided that the following conditions are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 	met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	1. Redistributions of source code must retain this licence text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)    	without modification, this list of conditions, and the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)    	disclaimer.  The following copyright notice must appear immediately at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)    	the beginning of all source files:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)         	Copyright (c) 1998-2007 InnoSys Incorporated.  All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)         	This file is available under a BSD-style copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	2. Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)    	notice, this list of conditions and the following disclaimer in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)    	documentation and/or other materials provided with the distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	3. The name of InnoSys Incorprated may not be used to endorse or promote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)    	products derived from this software without specific prior written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)    	permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	THIS SOFTWARE IS PROVIDED BY INNOSYS CORP. ``AS IS'' AND ANY EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	Fourth revision: This message format supports the USA28XG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	Buffer formats for RX/TX data messages are not defined by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	a structure, but are described here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	USB OUT (host -> USAxx, transmit) messages contain a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	REQUEST_ACK indicator (set to 0xff to request an ACK at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	completion of transmit; 0x00 otherwise), followed by data:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		RQSTACK DAT DAT DAT ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	with a total data length of up to 63.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	USB IN (USAxx -> host, receive) messages begin with a status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	byte in which the 0x80 bit is either:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		(a)	0x80 bit clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 			indicates that the bytes following it are all data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 			bytes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 				STAT DATA DATA DATA DATA DATA ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			for a total of up to 63 DATA bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	or:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		(b)	0x80 bit set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 			indiates that the bytes following alternate data and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 			status bytes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 				STAT DATA STAT DATA STAT DATA STAT DATA ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			for a total of up to 32 DATA bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	The valid bits in the STAT bytes are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		OVERRUN	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		PARITY	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		FRAMING	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		BREAK	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	Notes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	(1) The OVERRUN bit can appear in either (a) or (b) format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		messages, but the but the PARITY/FRAMING/BREAK bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		only appear in (b) format messages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	(2) For the host to determine the exact point at which the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		overrun occurred (to identify the point in the data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		stream at which the data was lost), it needs to count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		128 characters, starting at the first character of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		message in which OVERRUN was reported; the lost character(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		would have been received between the 128th and 129th
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		characters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	(3)	An RX data message in which the first byte has 0x80 clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		serves as a "break off" indicator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	revision history:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	1999feb10	add reportHskiaChanges to allow us to ignore them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	1999feb10	add txAckThreshold for fast+loose throughput enhancement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	1999mar30	beef up support for RX error reporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	1999apr14	add resetDataToggle to control message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	2000jan04	merge with usa17msg.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	2000jun01	add extended BSD-style copyright text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	2001jul05	change message format to improve OVERRUN case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	2002jun05	update copyright date, improve comments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	2006feb06	modify for FX1 chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifndef	__USA67MSG__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define	__USA67MSG__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) // all things called "ControlMessage" are sent on the 'control' endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) typedef struct keyspan_usa67_portControlMessage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	u8	port;		// 0 or 1 (selects port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		there are three types of "commands" sent in the control message:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		1.	configuration changes which must be requested by setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			the corresponding "set" flag (and should only be requested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 			when necessary, to reduce overhead on the device):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	u8	setClocking,	// host requests baud rate be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		baudLo,			// host does baud divisor calculation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		baudHi,			// baudHi is only used for first port (gives lower rates)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		externalClock_txClocking,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 						// 0=internal, other=external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		setLcr,			// host requests lcr be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		lcr,			// use PARITY, STOPBITS, DATABITS below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		setFlowControl,	// host requests flow control be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		ctsFlowControl,	// 1=use CTS flow control, 0=don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		xonFlowControl,	// 1=use XON/XOFF flow control, 0=don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		xonChar,		// specified in current character format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		xoffChar,		// specified in current character format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		setTxTriState_setRts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 						// host requests TX tri-state be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		txTriState_rts,	// 1=active (normal), 0=tristate (off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		setHskoa_setDtr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 						// host requests HSKOA output be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		hskoa_dtr,		// 1=on, 0=off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		setPrescaler,	// host requests prescalar be set (default: 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		prescaler;		// specified as N/8; values 8-ff are valid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 						// must be set any time internal baud rate is set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 						// must not be set when external clocking is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		3.	configuration data which is simply used as is (no overhead,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			but must be specified correctly in every host message).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	u8	forwardingLength,  // forward when this number of chars available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		reportHskiaChanges_dsrFlowControl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 						// 1=normal; 0=ignore external clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 						// 1=use DSR flow control, 0=don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		txAckThreshold,	// 0=not allowed, 1=normal, 2-255 deliver ACK faster
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		loopbackMode;	// 0=no loopback, 1=loopback enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		4.	commands which are flags only; these are processed in order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			(so that, e.g., if both _txOn and _txOff flags are set, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			port ends in a TX_OFF state); any non-zero value is respected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	u8	_txOn,			// enable transmitting (and continue if there's data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		_txOff,			// stop transmitting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		txFlush,		// toss outbound data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		txBreak,		// turn on break (cleared by _txOn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		rxOn,			// turn on receiver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		rxOff,			// turn off receiver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		rxFlush,		// toss inbound data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		rxForward,		// forward all inbound data, NOW (as if fwdLen==1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		returnStatus,	// return current status (even if it hasn't changed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		resetDataToggle;// reset data toggle state to DATA0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) } keyspan_usa67_portControlMessage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) // defines for bits in lcr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define	USA_DATABITS_5		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define	USA_DATABITS_6		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define	USA_DATABITS_7		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define	USA_DATABITS_8		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define	STOPBITS_5678_1		0x00	// 1 stop bit for all byte sizes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define	STOPBITS_5_1p5		0x04	// 1.5 stop bits for 5-bit byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define	STOPBITS_678_2		0x04	// 2 stop bits for 6/7/8-bit byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define	USA_PARITY_NONE		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define	USA_PARITY_ODD		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define	USA_PARITY_EVEN		0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define	PARITY_1			0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define	PARITY_0			0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) // all things called "StatusMessage" are sent on the status endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) typedef struct keyspan_usa67_portStatusMessage	// one for each port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	u8	port,			// 0=first, 1=second, other=see below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		hskia_cts,		// reports HSKIA pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		gpia_dcd,		// reports GPIA pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		_txOff,			// port has been disabled (by host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		_txXoff,		// port is in XOFF state (either host or RX XOFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		txAck,			// indicates a TX message acknowledgement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		rxEnabled,		// as configured by rxOn/rxOff 1=on, 0=off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		controlResponse;// 1=a control message has been processed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) } keyspan_usa67_portStatusMessage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) // bits in RX data message when STAT byte is included
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define	RXERROR_OVERRUN	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define	RXERROR_PARITY	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define	RXERROR_FRAMING	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define	RXERROR_BREAK	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) typedef struct keyspan_usa67_globalControlMessage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	u8	port,	 			// 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		sendGlobalStatus,	// 2=request for two status responses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		resetStatusToggle,	// 1=reset global status toggle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		resetStatusCount;	// a cycling value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) } keyspan_usa67_globalControlMessage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) typedef struct keyspan_usa67_globalStatusMessage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	u8	port,				// 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		sendGlobalStatus,	// from request, decremented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		resetStatusCount;	// as in request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) } keyspan_usa67_globalStatusMessage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) typedef struct keyspan_usa67_globalDebugMessage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	u8	port,				// 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) } keyspan_usa67_globalDebugMessage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) // ie: the maximum length of an FX1 endpoint buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define	MAX_DATA_LEN			64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) // update status approx. 60 times a second (16.6666 ms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define	STATUS_UPDATE_INTERVAL	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) // status rationing tuning value (each port gets checked each n ms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define	STATUS_RATION	10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)