^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * USBVEND.H Vendor-specific USB definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * NOTE: This must be kept in sync with the Edgeport firmware and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * must be kept backward-compatible with older firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) ************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Copyright (C) 1998 Inside Out Networks, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) ************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #if !defined(_USBVEND_H)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define _USBVEND_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * D e f i n e s / T y p e d e f s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) // Definitions of USB product IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define USB_VENDOR_ID_ION 0x1608 // Our VID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define USB_VENDOR_ID_TI 0x0451 // TI VID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define USB_VENDOR_ID_AXIOHM 0x05D9 /* Axiohm VID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) // Definitions of USB product IDs (PID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) // We break the USB-defined PID into an OEM Id field (upper 6 bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) // and a Device Id (bottom 10 bits). The Device Id defines what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) // device this actually is regardless of what the OEM wants to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) // call it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) // ION-device OEM IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define ION_OEM_ID_ION 0 // 00h Inside Out Networks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define ION_OEM_ID_NLYNX 1 // 01h NLynx Systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define ION_OEM_ID_GENERIC 2 // 02h Generic OEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define ION_OEM_ID_MAC 3 // 03h Mac Version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define ION_OEM_ID_MEGAWOLF 4 // 04h Lupusb OEM Mac version (MegaWolf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define ION_OEM_ID_MULTITECH 5 // 05h Multitech Rapidports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define ION_OEM_ID_AGILENT 6 // 06h AGILENT board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) // ION-device Device IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) // Product IDs - assigned to match middle digit of serial number (No longer true)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define ION_DEVICE_ID_80251_NETCHIP 0x020 // This bit is set in the PID if this edgeport hardware$
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) // is based on the 80251+Netchip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define ION_DEVICE_ID_GENERATION_1 0x00 // Value for 930 based edgeports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define ION_DEVICE_ID_GENERATION_2 0x01 // Value for 80251+Netchip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define ION_DEVICE_ID_GENERATION_3 0x02 // Value for Texas Instruments TUSB5052 chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define ION_DEVICE_ID_GENERATION_4 0x03 // Watchport Family of products
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define ION_GENERATION_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define ION_DEVICE_ID_HUB_MASK 0x0080 // This bit in the PID designates a HUB device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) // for example 8C would be a 421 4 port hub
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) // and 8D would be a 2 port embedded hub
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define EDGEPORT_DEVICE_ID_MASK 0x0ff // Not including OEM or GENERATION fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define ION_DEVICE_ID_UNCONFIGURED_EDGE_DEVICE 0x000 // In manufacturing only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define ION_DEVICE_ID_EDGEPORT_4 0x001 // Edgeport/4 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define ION_DEVICE_ID_EDGEPORT_8R 0x002 // Edgeport with RJ45 no Ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define ION_DEVICE_ID_RAPIDPORT_4 0x003 // Rapidport/4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define ION_DEVICE_ID_EDGEPORT_4T 0x004 // Edgeport/4 RS232 for Telxon (aka "Fleetport")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define ION_DEVICE_ID_EDGEPORT_2 0x005 // Edgeport/2 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define ION_DEVICE_ID_EDGEPORT_4I 0x006 // Edgeport/4 RS422
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define ION_DEVICE_ID_EDGEPORT_2I 0x007 // Edgeport/2 RS422/RS485
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define ION_DEVICE_ID_EDGEPORT_8RR 0x008 // Edgeport with RJ45 with Data and RTS/CTS only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) // ION_DEVICE_ID_EDGEPORT_8_HANDBUILT 0x009 // Hand-built Edgeport/8 (Placeholder, used in middle digit of serial number only!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) // ION_DEVICE_ID_MULTIMODEM_4X56 0x00A // MultiTech version of RP/4 (Placeholder, used in middle digit of serial number only!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define ION_DEVICE_ID_EDGEPORT_PARALLEL_PORT 0x00B // Edgeport/(4)21 Parallel port (USS720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define ION_DEVICE_ID_EDGEPORT_421 0x00C // Edgeport/421 Hub+RS232+Parallel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define ION_DEVICE_ID_EDGEPORT_21 0x00D // Edgeport/21 RS232+Parallel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define ION_DEVICE_ID_EDGEPORT_8_DUAL_CPU 0x00E // Half of an Edgeport/8 (the kind with 2 EP/4s on 1 PCB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define ION_DEVICE_ID_EDGEPORT_8 0x00F // Edgeport/8 (single-CPU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define ION_DEVICE_ID_EDGEPORT_2_DIN 0x010 // Edgeport/2 RS232 with Apple DIN connector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define ION_DEVICE_ID_EDGEPORT_4_DIN 0x011 // Edgeport/4 RS232 with Apple DIN connector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define ION_DEVICE_ID_EDGEPORT_16_DUAL_CPU 0x012 // Half of an Edgeport/16 (the kind with 2 EP/8s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define ION_DEVICE_ID_EDGEPORT_COMPATIBLE 0x013 // Edgeport Compatible, for NCR, Axiohm etc. testing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define ION_DEVICE_ID_EDGEPORT_8I 0x014 // Edgeport/8 RS422 (single-CPU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define ION_DEVICE_ID_EDGEPORT_1 0x015 // Edgeport/1 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define ION_DEVICE_ID_EPOS44 0x016 // Half of an EPOS/44 (TIUMP BASED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define ION_DEVICE_ID_EDGEPORT_42 0x017 // Edgeport/42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define ION_DEVICE_ID_EDGEPORT_412_8 0x018 // Edgeport/412 8 port part
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define ION_DEVICE_ID_EDGEPORT_412_4 0x019 // Edgeport/412 4 port part
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define ION_DEVICE_ID_EDGEPORT_22I 0x01A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) // Compact Form factor TI based devices 2c, 21c, 22c, 221c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define ION_DEVICE_ID_EDGEPORT_2C 0x01B // Edgeport/2c is a TI based Edgeport/2 - Small I2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define ION_DEVICE_ID_EDGEPORT_221C 0x01C // Edgeport/221c is a TI based Edgeport/2 with lucent chip and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) // 2 external hub ports - Large I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define ION_DEVICE_ID_EDGEPORT_22C 0x01D // Edgeport/22c is a TI based Edgeport/2 with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) // 2 external hub ports - Large I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define ION_DEVICE_ID_EDGEPORT_21C 0x01E // Edgeport/21c is a TI based Edgeport/2 with lucent chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) // Small I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * DANGER DANGER The 0x20 bit was used to indicate a 8251/netchip GEN 2 device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * Since the MAC, Linux, and Optimal drivers still used the old code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * I suggest that you skip the 0x20 bit when creating new PIDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) // Generation 3 devices -- 3410 based edgport/1 (256 byte I2C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define ION_DEVICE_ID_TI3410_EDGEPORT_1 0x040 // Edgeport/1 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define ION_DEVICE_ID_TI3410_EDGEPORT_1I 0x041 // Edgeport/1i- RS422 model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) // Ti based software switchable RS232/RS422/RS485 devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define ION_DEVICE_ID_EDGEPORT_4S 0x042 // Edgeport/4s - software switchable model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define ION_DEVICE_ID_EDGEPORT_8S 0x043 // Edgeport/8s - software switchable model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) // Usb to Ethernet dongle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define ION_DEVICE_ID_EDGEPORT_E 0x0E0 // Edgeport/E Usb to Ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) // Edgeport TI based devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define ION_DEVICE_ID_TI_EDGEPORT_4 0x0201 // Edgeport/4 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define ION_DEVICE_ID_TI_EDGEPORT_2 0x0205 // Edgeport/2 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define ION_DEVICE_ID_TI_EDGEPORT_4I 0x0206 // Edgeport/4i RS422
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define ION_DEVICE_ID_TI_EDGEPORT_2I 0x0207 // Edgeport/2i RS422/RS485
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define ION_DEVICE_ID_TI_EDGEPORT_421 0x020C // Edgeport/421 4 hub 2 RS232 + Parallel (lucent on a different hub port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define ION_DEVICE_ID_TI_EDGEPORT_21 0x020D // Edgeport/21 2 RS232 + Parallel (lucent on a different hub port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define ION_DEVICE_ID_TI_EDGEPORT_416 0x0212 // Edgeport/416
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define ION_DEVICE_ID_TI_EDGEPORT_1 0x0215 // Edgeport/1 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define ION_DEVICE_ID_TI_EDGEPORT_42 0x0217 // Edgeport/42 4 hub 2 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define ION_DEVICE_ID_TI_EDGEPORT_22I 0x021A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define ION_DEVICE_ID_TI_EDGEPORT_2C 0x021B // Edgeport/2c RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define ION_DEVICE_ID_TI_EDGEPORT_221C 0x021C // Edgeport/221c is a TI based Edgeport/2 with lucent chip and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) // 2 external hub ports - Large I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define ION_DEVICE_ID_TI_EDGEPORT_22C 0x021D // Edgeport/22c is a TI based Edgeport/2 with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) // 2 external hub ports - Large I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define ION_DEVICE_ID_TI_EDGEPORT_21C 0x021E // Edgeport/21c is a TI based Edgeport/2 with lucent chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) // Generation 3 devices -- 3410 based edgport/1 (256 byte I2C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1 0x0240 // Edgeport/1 RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1I 0x0241 // Edgeport/1i- RS422 model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) // Ti based software switchable RS232/RS422/RS485 devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define ION_DEVICE_ID_TI_EDGEPORT_4S 0x0242 // Edgeport/4s - software switchable model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define ION_DEVICE_ID_TI_EDGEPORT_8S 0x0243 // Edgeport/8s - software switchable model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define ION_DEVICE_ID_TI_EDGEPORT_8 0x0244 // Edgeport/8 (single-CPU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define ION_DEVICE_ID_TI_EDGEPORT_416B 0x0247 // Edgeport/416
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * Generation 4 devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) // Watchport based on 3410 both 1-wire and binary products (16K I2C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define ION_DEVICE_ID_WP_UNSERIALIZED 0x300 // Watchport based on 3410 both 1-wire and binary products
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define ION_DEVICE_ID_WP_PROXIMITY 0x301 // Watchport/P Discontinued
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define ION_DEVICE_ID_WP_MOTION 0x302 // Watchport/M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define ION_DEVICE_ID_WP_MOISTURE 0x303 // Watchport/W
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define ION_DEVICE_ID_WP_TEMPERATURE 0x304 // Watchport/T
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define ION_DEVICE_ID_WP_HUMIDITY 0x305 // Watchport/H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define ION_DEVICE_ID_WP_POWER 0x306 // Watchport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define ION_DEVICE_ID_WP_LIGHT 0x307 // Watchport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define ION_DEVICE_ID_WP_RADIATION 0x308 // Watchport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define ION_DEVICE_ID_WP_ACCELERATION 0x309 // Watchport/A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define ION_DEVICE_ID_WP_DISTANCE 0x30A // Watchport/D Discontinued
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define ION_DEVICE_ID_WP_PROX_DIST 0x30B // Watchport/D uses distance sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) // Default to /P function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define ION_DEVICE_ID_PLUS_PWR_HP4CD 0x30C // 5052 Plus Power HubPort/4CD+ (for Dell)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define ION_DEVICE_ID_PLUS_PWR_HP4C 0x30D // 5052 Plus Power HubPort/4C+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define ION_DEVICE_ID_PLUS_PWR_PCI 0x30E // 3410 Plus Power PCI Host Controller 4 port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) // Definitions for AXIOHM USB product IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define USB_VENDOR_ID_AXIOHM 0x05D9 // Axiohm VID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define AXIOHM_DEVICE_ID_MASK 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define AXIOHM_DEVICE_ID_EPIC_A758 0xA758
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define AXIOHM_DEVICE_ID_EPIC_A794 0xA794
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define AXIOHM_DEVICE_ID_EPIC_A225 0xA225
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) // Definitions for NCR USB product IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define USB_VENDOR_ID_NCR 0x0404 // NCR VID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define NCR_DEVICE_ID_MASK 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define NCR_DEVICE_ID_EPIC_0202 0x0202
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define NCR_DEVICE_ID_EPIC_0203 0x0203
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define NCR_DEVICE_ID_EPIC_0310 0x0310
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define NCR_DEVICE_ID_EPIC_0311 0x0311
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define NCR_DEVICE_ID_EPIC_0312 0x0312
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) // Definitions for SYMBOL USB product IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define USB_VENDOR_ID_SYMBOL 0x05E0 // Symbol VID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define SYMBOL_DEVICE_ID_MASK 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define SYMBOL_DEVICE_ID_KEYFOB 0x0700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) // Definitions for other product IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define ION_DEVICE_ID_MT4X56USB 0x1403 // OEM device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define GENERATION_ID_FROM_USB_PRODUCT_ID(ProductId) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ((__u16) ((ProductId >> 8) & (ION_GENERATION_MASK)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define MAKE_USB_PRODUCT_ID(OemId, DeviceId) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ((__u16) (((OemId) << 10) || (DeviceId)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define DEVICE_ID_FROM_USB_PRODUCT_ID(ProductId) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ((__u16) ((ProductId) & (EDGEPORT_DEVICE_ID_MASK)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define OEM_ID_FROM_USB_PRODUCT_ID(ProductId) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ((__u16) (((ProductId) >> 10) & 0x3F))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) // Definitions of parameters for download code. Note that these are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) // specific to a given version of download code and must change if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) // corresponding download code changes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) // TxCredits value below which driver won't bother sending (to prevent too many small writes).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) // Send only if above 25%
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define EDGE_FW_GET_TX_CREDITS_SEND_THRESHOLD(InitialCredit, MaxPacketSize) (max(((InitialCredit) / 4), (MaxPacketSize)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define EDGE_FW_BULK_MAX_PACKET_SIZE 64 // Max Packet Size for Bulk In Endpoint (EP1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define EDGE_FW_BULK_READ_BUFFER_SIZE 1024 // Size to use for Bulk reads
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define EDGE_FW_INT_MAX_PACKET_SIZE 32 // Max Packet Size for Interrupt In Endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) // Note that many units were shipped with MPS=16, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) // force an upgrade to this value).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define EDGE_FW_INT_INTERVAL 2 // 2ms polling on IntPipe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) // Definitions of I/O Networks vendor-specific requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) // for default endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) // bmRequestType = 01000000 Set vendor-specific, to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) // bmRequestType = 11000000 Get vendor-specific, to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) // These are the definitions for the bRequest field for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) // above bmRequestTypes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) // For the read/write Edgeport memory commands, the parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) // are as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) // wValue = 16-bit address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) // wIndex = unused (though we could put segment 00: or FF: here)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) // wLength = # bytes to read/write (max 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define USB_REQUEST_ION_RESET_DEVICE 0 // Warm reboot Edgeport, retaining USB address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define USB_REQUEST_ION_GET_EPIC_DESC 1 // Get Edgeport Compatibility Descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) // unused 2 // Unused, available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define USB_REQUEST_ION_READ_RAM 3 // Read EdgePort RAM at specified addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define USB_REQUEST_ION_WRITE_RAM 4 // Write EdgePort RAM at specified addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define USB_REQUEST_ION_READ_ROM 5 // Read EdgePort ROM at specified addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define USB_REQUEST_ION_WRITE_ROM 6 // Write EdgePort ROM at specified addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define USB_REQUEST_ION_EXEC_DL_CODE 7 // Begin execution of RAM-based download
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) // code by jumping to address in wIndex:wValue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) // 8 // Unused, available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define USB_REQUEST_ION_ENABLE_SUSPEND 9 // Enable/Disable suspend feature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) // (wValue != 0: Enable; wValue = 0: Disable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define USB_REQUEST_ION_SEND_IOSP 10 // Send an IOSP command to the edgeport over the control pipe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #define USB_REQUEST_ION_RECV_IOSP 11 // Receive an IOSP command from the edgeport over the control pipe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define USB_REQUEST_ION_DIS_INT_TIMER 0x80 // Sent to Axiohm to enable/ disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) // interrupt token timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) // wValue = 1, enable (default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) // wValue = 0, disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) // Define parameter values for our vendor-specific commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) // Edgeport Compatibility Descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) // This descriptor is only returned by Edgeport-compatible devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) // supporting the EPiC spec. True ION devices do not return this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) // descriptor, but instead return STALL on receipt of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) // GET_EPIC_DESC command. The driver interprets a STALL to mean that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) // this is a "real" Edgeport.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) struct edge_compatibility_bits {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) // This __u32 defines which Vendor-specific commands/functionality
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) // the device supports on the default EP0 pipe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) __u32 VendEnableSuspend : 1; // 0001 Set if device supports ION_ENABLE_SUSPEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) __u32 VendUnused : 31; // Available for future expansion, must be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) // This __u32 defines which IOSP commands are supported over the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) // bulk pipe EP1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) // xxxx Set if device supports:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) __u32 IOSPOpen : 1; // 0001 OPEN / OPEN_RSP (Currently must be 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) __u32 IOSPClose : 1; // 0002 CLOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) __u32 IOSPChase : 1; // 0004 CHASE / CHASE_RSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) __u32 IOSPSetRxFlow : 1; // 0008 SET_RX_FLOW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) __u32 IOSPSetTxFlow : 1; // 0010 SET_TX_FLOW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) __u32 IOSPSetXChar : 1; // 0020 SET_XON_CHAR/SET_XOFF_CHAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) __u32 IOSPRxCheck : 1; // 0040 RX_CHECK_REQ/RX_CHECK_RSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) __u32 IOSPSetClrBreak : 1; // 0080 SET_BREAK/CLEAR_BREAK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) __u32 IOSPWriteMCR : 1; // 0100 MCR register writes (set/clr DTR/RTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) __u32 IOSPWriteLCR : 1; // 0200 LCR register writes (wordlen/stop/parity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) __u32 IOSPSetBaudRate : 1; // 0400 setting Baud rate (writes to LCR.80h and DLL/DLM register)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) __u32 IOSPDisableIntPipe : 1; // 0800 Do not use the interrupt pipe for TxCredits or RxButesAvailable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) __u32 IOSPRxDataAvail : 1; // 1000 Return status of RX Fifo (Data available in Fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) __u32 IOSPTxPurge : 1; // 2000 Purge TXBuffer and/or Fifo in Edgeport hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) __u32 IOSPUnused : 18; // Available for future expansion, must be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) // This __u32 defines which 'general' features are supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) __u32 TrueEdgeport : 1; // 0001 Set if device is a 'real' Edgeport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) // (Used only by driver, NEVER set by an EPiC device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) __u32 GenUnused : 31; // Available for future expansion, must be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define EDGE_COMPATIBILITY_MASK0 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define EDGE_COMPATIBILITY_MASK1 0x3FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define EDGE_COMPATIBILITY_MASK2 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct edge_compatibility_descriptor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) __u8 Length; // Descriptor Length (per USB spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) __u8 DescType; // Descriptor Type (per USB spec, =DEVICE type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) __u8 EpicVer; // Version of EPiC spec supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) // (Currently must be 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) __u8 NumPorts; // Number of serial ports supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) __u8 iDownloadFile; // Index of string containing download code filename
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) // 0=no download, FF=download compiled into driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) __u8 Unused[3]; // Available for future expansion, must be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) // (Currently must be 0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) __u8 MajorVersion; // Firmware version: xx.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) __u8 MinorVersion; // yy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) __le16 BuildNumber; // zzzz (LE format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) // The following structure contains __u32s, with each bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) // specifying whether the EPiC device supports the given
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) // command or functionality.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct edge_compatibility_bits Supports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) // Values for iDownloadFile
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #define EDGE_DOWNLOAD_FILE_NONE 0 // No download requested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define EDGE_DOWNLOAD_FILE_INTERNAL 0xFF // Download the file compiled into driver (930 version)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #define EDGE_DOWNLOAD_FILE_I930 0xFF // Download the file compiled into driver (930 version)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) #define EDGE_DOWNLOAD_FILE_80251 0xFE // Download the file compiled into driver (80251 version)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * Special addresses for READ/WRITE_RAM/ROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) // Version 1 (original) format of DeviceParams
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #define EDGE_MANUF_DESC_ADDR_V1 0x00FF7F00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #define EDGE_MANUF_DESC_LEN_V1 sizeof(EDGE_MANUF_DESCRIPTOR_V1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) // Version 2 format of DeviceParams. This format is longer (3C0h)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) // and starts lower in memory, at the uppermost 1K in ROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) #define EDGE_MANUF_DESC_ADDR 0x00FF7C00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #define EDGE_MANUF_DESC_LEN sizeof(struct edge_manuf_descriptor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) // Boot params descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #define EDGE_BOOT_DESC_ADDR 0x00FF7FC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define EDGE_BOOT_DESC_LEN sizeof(struct edge_boot_descriptor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) // Define the max block size that may be read or written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) // in a read/write RAM/ROM command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #define MAX_SIZE_REQ_ION_READ_MEM ((__u16)64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #define MAX_SIZE_REQ_ION_WRITE_MEM ((__u16)64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) // Notes for the following two ION vendor-specific param descriptors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) // 1. These have a standard USB descriptor header so they look like a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) // normal descriptor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) // 2. Any strings in the structures are in USB-defined string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) // descriptor format, so that they may be separately retrieved,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) // if necessary, with a minimum of work on the 930. This also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) // requires them to be in UNICODE format, which, for English at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) // least, simply means extending each __u8 into a __u16.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) // 3. For all fields, 00 means 'uninitialized'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) // 4. All unused areas should be set to 00 for future expansion.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) // This structure is ver 2 format. It contains ALL USB descriptors as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) // well as the configuration parameters that were in the original V1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) // structure. It is NOT modified when new boot code is downloaded; rather,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) // these values are set or modified by manufacturing. It is located at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) // xC00-xFBF (length 3C0h) in the ROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) // This structure is a superset of the v1 structure and is arranged so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) // that all of the v1 fields remain at the same address. We are just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) // adding more room to the front of the structure to hold the descriptors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) // The actual contents of this structure are defined in a 930 assembly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) // file, converted to a binary image, and then written by the serialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) // program. The C definition of this structure just defines a dummy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) // area for general USB descriptors and the descriptor tables (the root
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) // descriptor starts at xC00). At the bottom of the structure are the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) // fields inherited from the v1 structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) #define MAX_SERIALNUMBER_LEN 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #define MAX_ASSEMBLYNUMBER_LEN 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) struct edge_manuf_descriptor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) __u16 RootDescTable[0x10]; // C00 Root of descriptor tables (just a placeholder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) __u8 DescriptorArea[0x2E0]; // C20 Descriptors go here, up to 2E0h (just a placeholder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) // Start of v1-compatible section
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) __u8 Length; // F00 Desc length for what follows, per USB (= C0h )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) __u8 DescType; // F01 Desc type, per USB (=DEVICE type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) __u8 DescVer; // F02 Desc version/format (currently 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) __u8 NumRootDescEntries; // F03 # entries in RootDescTable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) __u8 RomSize; // F04 Size of ROM/E2PROM in K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) __u8 RamSize; // F05 Size of external RAM in K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) __u8 CpuRev; // F06 CPU revision level (chg only if s/w visible)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) __u8 BoardRev; // F07 PCB revision level (chg only if s/w visible)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) __u8 NumPorts; // F08 Number of ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) __u8 DescDate[3]; // F09 MM/DD/YY when descriptor template was compiler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) // so host can track changes to USB-only descriptors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) __u8 SerNumLength; // F0C USB string descriptor len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) __u8 SerNumDescType; // F0D USB descriptor type (=STRING type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) __le16 SerialNumber[MAX_SERIALNUMBER_LEN]; // F0E "01-01-000100" Unicode Serial Number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) __u8 AssemblyNumLength; // F26 USB string descriptor len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) __u8 AssemblyNumDescType; // F27 USB descriptor type (=STRING type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) __le16 AssemblyNumber[MAX_ASSEMBLYNUMBER_LEN]; // F28 "350-1000-01-A " assembly number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) __u8 OemAssyNumLength; // F44 USB string descriptor len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) __u8 OemAssyNumDescType; // F45 USB descriptor type (=STRING type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) __le16 OemAssyNumber[MAX_ASSEMBLYNUMBER_LEN]; // F46 "xxxxxxxxxxxxxx" OEM assembly number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) __u8 ManufDateLength; // F62 USB string descriptor len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) __u8 ManufDateDescType; // F63 USB descriptor type (=STRING type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) __le16 ManufDate[6]; // F64 "MMDDYY" manufacturing date
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) __u8 Reserved3[0x4D]; // F70 -- unused, set to 0 --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) __u8 UartType; // FBD Uart Type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) __u8 IonPid; // FBE Product ID, == LSB of USB DevDesc.PID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) // (Note: Edgeport/4s before 11/98 will have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) // 00 here instead of 01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) __u8 IonConfig; // FBF Config byte for ION manufacturing use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) // FBF end of structure, total len = 3C0h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #define MANUF_DESC_VER_1 1 // Original definition of MANUF_DESC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) #define MANUF_DESC_VER_2 2 // Ver 2, starts at xC00h len 3C0h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) // Uart Types
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) // Note: Since this field was added only recently, all Edgeport/4 units
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) // shipped before 11/98 will have 00 in this field. Therefore,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) // both 00 and 01 values mean '654.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) #define MANUF_UART_EXAR_654_EARLY 0 // Exar 16C654 in Edgeport/4s before 11/98
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #define MANUF_UART_EXAR_654 1 // Exar 16C654
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #define MANUF_UART_EXAR_2852 2 // Exar 16C2852
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) // Note: The CpuRev and BoardRev values do not conform to manufacturing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) // revisions; they are to be incremented only when the CPU or hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) // changes in a software-visible way, such that the 930 software or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) // the host driver needs to handle the hardware differently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) // Values of bottom 5 bits of CpuRev & BoardRev for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) // Implementation 0 (ie, 930-based)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) #define MANUF_CPU_REV_AD4 1 // 930 AD4, with EP1 Rx bug (needs RXSPM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) #define MANUF_CPU_REV_AD5 2 // 930 AD5, with above bug (supposedly) fixed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) #define MANUF_CPU_80251 0x20 // Intel 80251
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) #define MANUF_BOARD_REV_A 1 // Original version, == Manuf Rev A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) #define MANUF_BOARD_REV_B 2 // Manuf Rev B, wakeup interrupt works
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #define MANUF_BOARD_REV_C 3 // Manuf Rev C, 2/4 ports, rs232/rs422
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) #define MANUF_BOARD_REV_GENERATION_2 0x20 // Second generaiton edgeport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) // Values of bottom 5 bits of CpuRev & BoardRev for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) // Implementation 1 (ie, 251+Netchip-based)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) #define MANUF_CPU_REV_1 1 // C251TB Rev 1 (Need actual Intel rev here)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) #define MANUF_BOARD_REV_A 1 // First rev of 251+Netchip design
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) #define MANUF_SERNUM_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->SerialNumber)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) #define MANUF_ASSYNUM_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->AssemblyNumber)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) #define MANUF_OEMASSYNUM_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->OemAssyNumber)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) #define MANUF_MANUFDATE_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->ManufDate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) #define MANUF_ION_CONFIG_DIAG_NO_LOOP 0x20 // As below but no ext loopback test
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) #define MANUF_ION_CONFIG_DIAG 0x40 // 930 based device: 1=Run h/w diags, 0=norm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) // TIUMP Device : 1=IONSERIAL needs to run Final Test
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) #define MANUF_ION_CONFIG_MASTER 0x80 // 930 based device: 1=Master mode, 0=Normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) // TIUMP Device : 1=First device on a multi TIUMP Device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) // This structure describes parameters for the boot code, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) // is programmed along with new boot code. These are values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) // which are specific to a given build of the boot code. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) // is exactly 64 bytes long and is fixed at address FF:xFC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) // - FF:xFFF. Note that the 930-mandated UCONFIG bytes are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) // included in this structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct edge_boot_descriptor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) __u8 Length; // C0 Desc length, per USB (= 40h)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) __u8 DescType; // C1 Desc type, per USB (= DEVICE type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) __u8 DescVer; // C2 Desc version/format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) __u8 Reserved1; // C3 -- unused, set to 0 --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) __le16 BootCodeLength; // C4 Boot code goes from FF:0000 to FF:(len-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) // (LE format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) __u8 MajorVersion; // C6 Firmware version: xx.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) __u8 MinorVersion; // C7 yy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) __le16 BuildNumber; // C8 zzzz (LE format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) __u16 EnumRootDescTable; // CA Root of ROM-based descriptor table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) __u8 NumDescTypes; // CC Number of supported descriptor types
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) __u8 Reserved4; // CD Fix Compiler Packing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) __le16 Capabilities; // CE-CF Capabilities flags (LE format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) __u8 Reserved2[0x28]; // D0 -- unused, set to 0 --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) __u8 UConfig0; // F8 930-defined CPU configuration byte 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) __u8 UConfig1; // F9 930-defined CPU configuration byte 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) __u8 Reserved3[6]; // FA -- unused, set to 0 --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) // FF end of structure, total len = 80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) #define BOOT_DESC_VER_1 1 // Original definition of BOOT_PARAMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) #define BOOT_DESC_VER_2 2 // 2nd definition, descriptors not included in boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) // Capabilities flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) #define BOOT_CAP_RESET_CMD 0x0001 // If set, boot correctly supports ION_RESET_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) T I U M P D E F I N I T I O N S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) ***********************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) // Chip definitions in I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #define UMP5152 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) #define UMP3410 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) //************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) // TI I2C Format Definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) //************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) #define I2C_DESC_TYPE_INFO_BASIC 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) #define I2C_DESC_TYPE_FIRMWARE_BASIC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) #define I2C_DESC_TYPE_DEVICE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) #define I2C_DESC_TYPE_CONFIG 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) #define I2C_DESC_TYPE_STRING 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) #define I2C_DESC_TYPE_FIRMWARE_AUTO 0x07 // for 3410 download
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) #define I2C_DESC_TYPE_CONFIG_KLUDGE 0x14 // for 3410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) #define I2C_DESC_TYPE_WATCHPORT_VERSION 0x15 // firmware version number for watchport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) #define I2C_DESC_TYPE_WATCHPORT_CALIBRATION_DATA 0x16 // Watchport Calibration Data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) #define I2C_DESC_TYPE_FIRMWARE_BLANK 0xf2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) // Special section defined by ION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) #define I2C_DESC_TYPE_ION 0 // Not defined by TI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) struct ti_i2c_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) __u8 Type; // Type of descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) __le16 Size; // Size of data only not including header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) __u8 CheckSum; // Checksum (8 bit sum of data only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) __u8 Data[]; // Data starts here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) } __attribute__((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) // for 5152 devices only (type 2 record)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) // for 3410 the version is stored in the WATCHPORT_FIRMWARE_VERSION descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) struct ti_i2c_firmware_rec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) __u8 Ver_Major; // Firmware Major version number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) __u8 Ver_Minor; // Firmware Minor version number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) __u8 Data[]; // Download starts here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) } __attribute__((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) struct watchport_firmware_version {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) // Added 2 bytes for version number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) __u8 Version_Major; // Download Version (for Watchport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) __u8 Version_Minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) } __attribute__((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) // Structure of header of download image in fw_down.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) struct ti_i2c_image_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) __le16 Length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) __u8 CheckSum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) } __attribute__((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct ti_basic_descriptor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) __u8 Power; // Self powered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) // bit 7: 1 - power switching supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) // 0 - power switching not supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) // bit 0: 1 - self powered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) // 0 - bus powered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) __u16 HubVid; // VID HUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) __u16 HubPid; // PID HUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) __u16 DevPid; // PID Edgeport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) __u8 HubTime; // Time for power on to power good
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) __u8 HubCurrent; // HUB Current = 100ma
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) } __attribute__((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) // CPU / Board Rev Definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) #define TI_CPU_REV_5052 2 // 5052 based edgeports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) #define TI_CPU_REV_3410 3 // 3410 based edgeports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) #define TI_BOARD_REV_TI_EP 0 // Basic ti based edgeport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) #define TI_BOARD_REV_COMPACT 1 // Compact board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) #define TI_BOARD_REV_WATCHPORT 2 // Watchport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) #define TI_GET_CPU_REVISION(x) (__u8)((((x)>>4)&0x0f))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) #define TI_GET_BOARD_REVISION(x) (__u8)(((x)&0x0f))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) #define TI_I2C_SIZE_MASK 0x1f // 5 bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) #define TI_GET_I2C_SIZE(x) ((((x) & TI_I2C_SIZE_MASK)+1)*256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) #define TI_MAX_I2C_SIZE (16 * 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) #define TI_MANUF_VERSION_0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) // IonConig2 flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) #define TI_CONFIG2_RS232 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) #define TI_CONFIG2_RS422 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) #define TI_CONFIG2_RS485 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) #define TI_CONFIG2_SWITCHABLE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) #define TI_CONFIG2_WATCHPORT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) struct edge_ti_manuf_descriptor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) __u8 IonConfig; // Config byte for ION manufacturing use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) __u8 IonConfig2; // Expansion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) __u8 Version; // Version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) __u8 CpuRev_BoardRev; // CPU revision level (0xF0) and Board Rev Level (0x0F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) __u8 NumPorts; // Number of ports for this UMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) __u8 NumVirtualPorts; // Number of Virtual ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) __u8 HubConfig1; // Used to configure the Hub
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) __u8 HubConfig2; // Used to configure the Hub
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) __u8 TotalPorts; // Total Number of Com Ports for the entire device (All UMPs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) __u8 Reserved; // Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) } __attribute__((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) #endif // if !defined(_USBVEND_H)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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