^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2007, Frank A Kingswood <frank@kingswood-consulting.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2007, Werner Cornelius <werner@cornelius-consult.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2009, Boris Hajduk <boris@hajduk.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * ch341.c implements a serial port driver for the Winchiphead CH341.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * The CH341 device can be used to implement an RS232 asynchronous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * serial port, an IEEE-1284 parallel printer port or a memory-like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * interface. In all cases the CH341 supports an I2C interface as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This driver only supports the asynchronous serial interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/usb/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DEFAULT_BAUD_RATE 9600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DEFAULT_TIMEOUT 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* flags for IO-Bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define CH341_BIT_RTS (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define CH341_BIT_DTR (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /******************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* interrupt pipe definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /******************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* always 4 interrupt bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* first irq byte normally 0x08 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* second irq byte base 0x7d + below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* third irq byte base 0x94 + below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* fourth irq byte normally 0xee */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* second interrupt byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define CH341_MULT_STAT 0x04 /* multiple status since last interrupt event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* status returned in third interrupt answer byte, inverted in data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) from irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define CH341_BIT_CTS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define CH341_BIT_DSR 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define CH341_BIT_RI 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define CH341_BIT_DCD 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define CH341_BITS_MODEM_STAT 0x0f /* all bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Break support - the information used to implement this was gleaned from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * the Net/FreeBSD uchcom.c driver by Takanori Watanabe. Domo arigato.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define CH341_REQ_READ_VERSION 0x5F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define CH341_REQ_WRITE_REG 0x9A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define CH341_REQ_READ_REG 0x95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define CH341_REQ_SERIAL_INIT 0xA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define CH341_REQ_MODEM_CTRL 0xA4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define CH341_REG_BREAK 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define CH341_REG_PRESCALER 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define CH341_REG_DIVISOR 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define CH341_REG_LCR 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define CH341_REG_LCR2 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define CH341_NBREAK_BITS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define CH341_LCR_ENABLE_RX 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define CH341_LCR_ENABLE_TX 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define CH341_LCR_MARK_SPACE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define CH341_LCR_PAR_EVEN 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define CH341_LCR_ENABLE_PAR 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define CH341_LCR_STOP_BITS_2 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define CH341_LCR_CS8 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define CH341_LCR_CS7 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define CH341_LCR_CS6 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define CH341_LCR_CS5 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define CH341_QUIRK_LIMITED_PRESCALER BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define CH341_QUIRK_SIMULATE_BREAK BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static const struct usb_device_id id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) { USB_DEVICE(0x1a86, 0x5523) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) { USB_DEVICE(0x1a86, 0x7522) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) { USB_DEVICE(0x1a86, 0x7523) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) { USB_DEVICE(0x2184, 0x0057) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) { USB_DEVICE(0x4348, 0x5523) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) { USB_DEVICE(0x9986, 0x7523) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) MODULE_DEVICE_TABLE(usb, id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct ch341_private {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) spinlock_t lock; /* access lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned baud_rate; /* set baud rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u8 mcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u8 msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u8 lcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned long quirks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned long break_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static void ch341_set_termios(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct usb_serial_port *port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct ktermios *old_termios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static int ch341_control_out(struct usb_device *dev, u8 request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u16 value, u16 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) dev_dbg(&dev->dev, "%s - (%02x,%04x,%04x)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) request, value, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) r = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) value, index, NULL, 0, DEFAULT_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) dev_err(&dev->dev, "failed to send control message: %d\n", r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int ch341_control_in(struct usb_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) u8 request, u16 value, u16 index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) char *buf, unsigned bufsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) dev_dbg(&dev->dev, "%s - (%02x,%04x,%04x,%u)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) request, value, index, bufsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) r = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) value, index, buf, bufsize, DEFAULT_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (r < (int)bufsize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (r >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) dev_err(&dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) "short control message received (%d < %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) r, bufsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) r = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) dev_err(&dev->dev, "failed to receive control message: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define CH341_CLKRATE 48000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define CH341_CLK_DIV(ps, fact) (1 << (12 - 3 * (ps) - (fact)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define CH341_MIN_RATE(ps) (CH341_CLKRATE / (CH341_CLK_DIV((ps), 1) * 512))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static const speed_t ch341_min_rates[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) CH341_MIN_RATE(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) CH341_MIN_RATE(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) CH341_MIN_RATE(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) CH341_MIN_RATE(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* Supported range is 46 to 3000000 bps. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define CH341_MIN_BPS DIV_ROUND_UP(CH341_CLKRATE, CH341_CLK_DIV(0, 0) * 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define CH341_MAX_BPS (CH341_CLKRATE / (CH341_CLK_DIV(3, 0) * 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * The device line speed is given by the following equation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * baudrate = 48000000 / (2^(12 - 3 * ps - fact) * div), where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * 0 <= ps <= 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * 0 <= fact <= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * 2 <= div <= 256 if fact = 0, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * 9 <= div <= 256 if fact = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int ch341_get_divisor(struct ch341_private *priv, speed_t speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) unsigned int fact, div, clk_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) bool force_fact0 = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int ps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * Clamp to supported range, this makes the (ps < 0) and (div < 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * sanity checks below redundant.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) speed = clamp_val(speed, CH341_MIN_BPS, CH341_MAX_BPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * Start with highest possible base clock (fact = 1) that will give a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * divisor strictly less than 512.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) fact = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) for (ps = 3; ps >= 0; ps--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (speed > ch341_min_rates[ps])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (ps < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* Determine corresponding divisor, rounding down. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) clk_div = CH341_CLK_DIV(ps, fact);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) div = CH341_CLKRATE / (clk_div * speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* Some devices require a lower base clock if ps < 3. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (ps < 3 && (priv->quirks & CH341_QUIRK_LIMITED_PRESCALER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) force_fact0 = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* Halve base clock (fact = 0) if required. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (div < 9 || div > 255 || force_fact0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) div /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) clk_div *= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) fact = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (div < 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * Pick next divisor if resulting rate is closer to the requested one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * scale up to avoid rounding errors on low rates.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (16 * CH341_CLKRATE / (clk_div * div) - 16 * speed >=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 16 * speed - 16 * CH341_CLKRATE / (clk_div * (div + 1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) div++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * Prefer lower base clock (fact = 0) if even divisor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * Note that this makes the receiver more tolerant to errors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (fact == 1 && div % 2 == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) div /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) fact = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return (0x100 - div) << 8 | fact << 2 | ps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int ch341_set_baudrate_lcr(struct usb_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct ch341_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) speed_t baud_rate, u8 lcr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (!baud_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) val = ch341_get_divisor(priv, baud_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * CH341A buffers data until a full endpoint-size packet (32 bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * has been received unless bit 7 is set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) val |= BIT(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) r = ch341_control_out(dev, CH341_REQ_WRITE_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) CH341_REG_DIVISOR << 8 | CH341_REG_PRESCALER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * Chip versions before version 0x30 as read using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * CH341_REQ_READ_VERSION used separate registers for line control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * (stop bits, parity and word length). Version 0x30 and above use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * CH341_REG_LCR only and CH341_REG_LCR2 is always set to zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) r = ch341_control_out(dev, CH341_REQ_WRITE_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) CH341_REG_LCR2 << 8 | CH341_REG_LCR, lcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static int ch341_set_handshake(struct usb_device *dev, u8 control)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return ch341_control_out(dev, CH341_REQ_MODEM_CTRL, ~control, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static int ch341_get_status(struct usb_device *dev, struct ch341_private *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) const unsigned int size = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) char *buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) buffer = kmalloc(size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (!buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) r = ch341_control_in(dev, CH341_REQ_READ_REG, 0x0706, 0, buffer, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) spin_lock_irqsave(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) priv->msr = (~(*buffer)) & CH341_BITS_MODEM_STAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) spin_unlock_irqrestore(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) out: kfree(buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* -------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static int ch341_configure(struct usb_device *dev, struct ch341_private *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) const unsigned int size = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) char *buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) buffer = kmalloc(size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (!buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* expect two bytes 0x27 0x00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) r = ch341_control_in(dev, CH341_REQ_READ_VERSION, 0, 0, buffer, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) dev_dbg(&dev->dev, "Chip version: 0x%02x\n", buffer[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) r = ch341_control_out(dev, CH341_REQ_SERIAL_INIT, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) r = ch341_set_baudrate_lcr(dev, priv, priv->baud_rate, priv->lcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) r = ch341_set_handshake(dev, priv->mcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) out: kfree(buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static int ch341_detect_quirks(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) struct usb_device *udev = port->serial->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) const unsigned int size = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) unsigned long quirks = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) char *buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) buffer = kmalloc(size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (!buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * A subset of CH34x devices does not support all features. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) * prescaler is limited and there is no support for sending a RS232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * break condition. A read failure when trying to set up the latter is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * used to detect these devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) r = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), CH341_REQ_READ_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) CH341_REG_BREAK, 0, buffer, size, DEFAULT_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (r == -EPIPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) dev_info(&port->dev, "break control not supported, using simulated break\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) quirks = CH341_QUIRK_LIMITED_PRESCALER | CH341_QUIRK_SIMULATE_BREAK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) r = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (r != size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (r >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) r = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) dev_err(&port->dev, "failed to read break control: %d\n", r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) r = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) kfree(buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (quirks) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) dev_dbg(&port->dev, "enabling quirk flags: 0x%02lx\n", quirks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) priv->quirks |= quirks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static int ch341_port_probe(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) struct ch341_private *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) priv = kzalloc(sizeof(struct ch341_private), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) spin_lock_init(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) priv->baud_rate = DEFAULT_BAUD_RATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * Some CH340 devices appear unable to change the initial LCR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * settings, so set a sane 8N1 default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) priv->lcr = CH341_LCR_ENABLE_RX | CH341_LCR_ENABLE_TX | CH341_LCR_CS8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) r = ch341_configure(port->serial->dev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) usb_set_serial_port_data(port, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) r = ch341_detect_quirks(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) error: kfree(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static int ch341_port_remove(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct ch341_private *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) kfree(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static int ch341_carrier_raised(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (priv->msr & CH341_BIT_DCD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static void ch341_dtr_rts(struct usb_serial_port *port, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /* drop DTR and RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) spin_lock_irqsave(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) priv->mcr |= CH341_BIT_RTS | CH341_BIT_DTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) priv->mcr &= ~(CH341_BIT_RTS | CH341_BIT_DTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) spin_unlock_irqrestore(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ch341_set_handshake(port->serial->dev, priv->mcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) static void ch341_close(struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) usb_serial_generic_close(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) usb_kill_urb(port->interrupt_in_urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /* open this device, set default parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) ch341_set_termios(tty, port, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) dev_dbg(&port->dev, "%s - submitting interrupt urb\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) r = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (r) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) dev_err(&port->dev, "%s - failed to submit interrupt urb: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) __func__, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) r = ch341_get_status(port->serial->dev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (r < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) dev_err(&port->dev, "failed to read modem status: %d\n", r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) goto err_kill_interrupt_urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) r = usb_serial_generic_open(tty, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) goto err_kill_interrupt_urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) err_kill_interrupt_urb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) usb_kill_urb(port->interrupt_in_urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* Old_termios contains the original termios settings and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) * tty->termios contains the new setting to be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static void ch341_set_termios(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct usb_serial_port *port, struct ktermios *old_termios)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) unsigned baud_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) u8 lcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /* redundant changes may cause the chip to lose bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (old_termios && !tty_termios_hw_change(&tty->termios, old_termios))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) baud_rate = tty_get_baud_rate(tty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) lcr = CH341_LCR_ENABLE_RX | CH341_LCR_ENABLE_TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) switch (C_CSIZE(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) case CS5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) lcr |= CH341_LCR_CS5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) case CS6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) lcr |= CH341_LCR_CS6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) case CS7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) lcr |= CH341_LCR_CS7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) case CS8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) lcr |= CH341_LCR_CS8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (C_PARENB(tty)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) lcr |= CH341_LCR_ENABLE_PAR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) if (C_PARODD(tty) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) lcr |= CH341_LCR_PAR_EVEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) if (C_CMSPAR(tty))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) lcr |= CH341_LCR_MARK_SPACE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) if (C_CSTOPB(tty))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) lcr |= CH341_LCR_STOP_BITS_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if (baud_rate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) priv->baud_rate = baud_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) r = ch341_set_baudrate_lcr(port->serial->dev, priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) priv->baud_rate, lcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (r < 0 && old_termios) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) priv->baud_rate = tty_termios_baud_rate(old_termios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) tty_termios_copy_hw(&tty->termios, old_termios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) } else if (r == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) priv->lcr = lcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) spin_lock_irqsave(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (C_BAUD(tty) == B0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) priv->mcr &= ~(CH341_BIT_DTR | CH341_BIT_RTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) priv->mcr |= (CH341_BIT_DTR | CH341_BIT_RTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) spin_unlock_irqrestore(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) ch341_set_handshake(port->serial->dev, priv->mcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) * A subset of all CH34x devices don't support a real break condition and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * reading CH341_REG_BREAK fails (see also ch341_detect_quirks). This function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) * simulates a break condition by lowering the baud rate to the minimum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * supported by the hardware upon enabling the break condition and sending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * a NUL byte.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * Incoming data is corrupted while the break condition is being simulated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * Normally the duration of the break condition can be controlled individually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * by userspace using TIOCSBRK and TIOCCBRK or by passing an argument to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) * TCSBRKP. Due to how the simulation is implemented the duration can't be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * controlled. The duration is always about (1s / 46bd * 9bit) = 196ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static void ch341_simulate_break(struct tty_struct *tty, int break_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) unsigned long now, delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (break_state != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) dev_dbg(&port->dev, "enter break state requested\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) r = ch341_set_baudrate_lcr(port->serial->dev, priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) CH341_MIN_BPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) CH341_LCR_ENABLE_RX | CH341_LCR_ENABLE_TX | CH341_LCR_CS8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (r < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) dev_err(&port->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) "failed to change baud rate to %u: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) CH341_MIN_BPS, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) goto restore;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) r = tty_put_char(tty, '\0');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (r < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) dev_err(&port->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) "failed to write NUL byte for simulated break condition: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) goto restore;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) * Compute expected transmission duration including safety
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) * margin. The original baud rate is only restored after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) * computed point in time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) * 11 bits = 1 start, 8 data, 1 stop, 1 margin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) priv->break_end = jiffies + (11 * HZ / CH341_MIN_BPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) dev_dbg(&port->dev, "leave break state requested\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) now = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (time_before(now, priv->break_end)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) /* Wait until NUL byte is written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) delay = priv->break_end - now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) dev_dbg(&port->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) "wait %d ms while transmitting NUL byte at %u baud\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) jiffies_to_msecs(delay), CH341_MIN_BPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) schedule_timeout_interruptible(delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) restore:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) /* Restore original baud rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) r = ch341_set_baudrate_lcr(port->serial->dev, priv, priv->baud_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) priv->lcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) dev_err(&port->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) "restoring original baud rate of %u failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) priv->baud_rate, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) static void ch341_break_ctl(struct tty_struct *tty, int break_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) const uint16_t ch341_break_reg =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) ((uint16_t) CH341_REG_LCR << 8) | CH341_REG_BREAK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) uint16_t reg_contents;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) uint8_t *break_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) if (priv->quirks & CH341_QUIRK_SIMULATE_BREAK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) ch341_simulate_break(tty, break_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) break_reg = kmalloc(2, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (!break_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) r = ch341_control_in(port->serial->dev, CH341_REQ_READ_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) ch341_break_reg, 0, break_reg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) if (r < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) dev_err(&port->dev, "%s - USB control read error (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) __func__, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) dev_dbg(&port->dev, "%s - initial ch341 break register contents - reg1: %x, reg2: %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) __func__, break_reg[0], break_reg[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (break_state != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) dev_dbg(&port->dev, "%s - Enter break state requested\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) break_reg[0] &= ~CH341_NBREAK_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) break_reg[1] &= ~CH341_LCR_ENABLE_TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) dev_dbg(&port->dev, "%s - Leave break state requested\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) break_reg[0] |= CH341_NBREAK_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) break_reg[1] |= CH341_LCR_ENABLE_TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) dev_dbg(&port->dev, "%s - New ch341 break register contents - reg1: %x, reg2: %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) __func__, break_reg[0], break_reg[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) reg_contents = get_unaligned_le16(break_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) r = ch341_control_out(port->serial->dev, CH341_REQ_WRITE_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) ch341_break_reg, reg_contents);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) dev_err(&port->dev, "%s - USB control write error (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) __func__, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) kfree(break_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) static int ch341_tiocmset(struct tty_struct *tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) unsigned int set, unsigned int clear)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) u8 control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) spin_lock_irqsave(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if (set & TIOCM_RTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) priv->mcr |= CH341_BIT_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (set & TIOCM_DTR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) priv->mcr |= CH341_BIT_DTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (clear & TIOCM_RTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) priv->mcr &= ~CH341_BIT_RTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) if (clear & TIOCM_DTR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) priv->mcr &= ~CH341_BIT_DTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) control = priv->mcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) spin_unlock_irqrestore(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) return ch341_set_handshake(port->serial->dev, control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static void ch341_update_status(struct usb_serial_port *port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) unsigned char *data, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) struct tty_struct *tty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) u8 delta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) if (len < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) status = ~data[2] & CH341_BITS_MODEM_STAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) spin_lock_irqsave(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) delta = status ^ priv->msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) priv->msr = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) spin_unlock_irqrestore(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) if (data[1] & CH341_MULT_STAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) dev_dbg(&port->dev, "%s - multiple status change\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) if (!delta)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) if (delta & CH341_BIT_CTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) port->icount.cts++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if (delta & CH341_BIT_DSR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) port->icount.dsr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) if (delta & CH341_BIT_RI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) port->icount.rng++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (delta & CH341_BIT_DCD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) port->icount.dcd++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) tty = tty_port_tty_get(&port->port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) if (tty) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) usb_serial_handle_dcd_change(port, tty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) status & CH341_BIT_DCD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) tty_kref_put(tty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) wake_up_interruptible(&port->port.delta_msr_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static void ch341_read_int_callback(struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) struct usb_serial_port *port = urb->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) unsigned char *data = urb->transfer_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) unsigned int len = urb->actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) switch (urb->status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) /* success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) case -ECONNRESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) case -ENOENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) case -ESHUTDOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) /* this urb is terminated, clean up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) dev_dbg(&urb->dev->dev, "%s - urb shutting down: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) __func__, urb->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) dev_dbg(&urb->dev->dev, "%s - nonzero urb status: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) __func__, urb->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) usb_serial_debug_data(&port->dev, __func__, len, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) ch341_update_status(port, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) status = usb_submit_urb(urb, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) dev_err(&urb->dev->dev, "%s - usb_submit_urb failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) __func__, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static int ch341_tiocmget(struct tty_struct *tty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) struct usb_serial_port *port = tty->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) struct ch341_private *priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) u8 mcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) unsigned int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) spin_lock_irqsave(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) mcr = priv->mcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) status = priv->msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) spin_unlock_irqrestore(&priv->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) result = ((mcr & CH341_BIT_DTR) ? TIOCM_DTR : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) | ((mcr & CH341_BIT_RTS) ? TIOCM_RTS : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) | ((status & CH341_BIT_CTS) ? TIOCM_CTS : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) | ((status & CH341_BIT_DSR) ? TIOCM_DSR : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) | ((status & CH341_BIT_RI) ? TIOCM_RI : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) | ((status & CH341_BIT_DCD) ? TIOCM_CD : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) dev_dbg(&port->dev, "%s - result = %x\n", __func__, result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) static int ch341_reset_resume(struct usb_serial *serial)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) struct usb_serial_port *port = serial->port[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) struct ch341_private *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) priv = usb_get_serial_port_data(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) /* reconfigure ch341 serial port after bus-reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) ch341_configure(serial->dev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) if (tty_port_initialized(&port->port)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) ret = usb_submit_urb(port->interrupt_in_urb, GFP_NOIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) dev_err(&port->dev, "failed to submit interrupt urb: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) ret = ch341_get_status(port->serial->dev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) dev_err(&port->dev, "failed to read modem status: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) return usb_serial_generic_resume(serial);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) static struct usb_serial_driver ch341_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) .name = "ch341-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) .id_table = id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) .num_ports = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) .open = ch341_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) .dtr_rts = ch341_dtr_rts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) .carrier_raised = ch341_carrier_raised,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) .close = ch341_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) .set_termios = ch341_set_termios,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) .break_ctl = ch341_break_ctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) .tiocmget = ch341_tiocmget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) .tiocmset = ch341_tiocmset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) .tiocmiwait = usb_serial_generic_tiocmiwait,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) .read_int_callback = ch341_read_int_callback,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) .port_probe = ch341_port_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) .port_remove = ch341_port_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) .reset_resume = ch341_reset_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) static struct usb_serial_driver * const serial_drivers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) &ch341_device, NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) module_usb_serial_driver(serial_drivers, id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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