^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Intel XHCI (Cherry Trail, Broxton and others) USB OTG role switch driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2016-2017 Hans de Goede <hdegoede@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Loosely based on android x86 kernel code which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2014 Intel Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Author: Wu, Hao
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/usb/role.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* register definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DUAL_ROLE_CFG0 0x68
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SW_VBUS_VALID BIT(24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SW_IDPIN_EN BIT(21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SW_IDPIN BIT(20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define SW_SWITCH_EN BIT(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define DRD_CONFIG_DYNAMIC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define DRD_CONFIG_STATIC_HOST 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define DRD_CONFIG_STATIC_DEVICE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DRD_CONFIG_MASK 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DUAL_ROLE_CFG1 0x6c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define HOST_MODE BIT(29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define DUAL_ROLE_CFG1_POLL_TIMEOUT 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define DRV_NAME "intel_xhci_usb_sw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct intel_xhci_usb_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct usb_role_switch *role_sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) bool enable_sw_switch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static const struct software_node intel_xhci_usb_node = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) "intel-xhci-usb-sw",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int intel_xhci_usb_set_role(struct usb_role_switch *sw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) enum usb_role role)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct intel_xhci_usb_data *data = usb_role_switch_get_drvdata(sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u32 glk, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u32 drd_config = DRD_CONFIG_DYNAMIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * On many CHT devices ACPI event (_AEI) handlers read / modify /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * write the cfg0 register, just like we do. Take the ACPI lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * to avoid us racing with the AML code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) status = acpi_acquire_global_lock(ACPI_WAIT_FOREVER, &glk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (ACPI_FAILURE(status) && status != AE_NOT_CONFIGURED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) dev_err(data->dev, "Error could not acquire lock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) pm_runtime_get_sync(data->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * Set idpin value as requested.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * Since some devices rely on firmware setting DRD_CONFIG and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * SW_SWITCH_EN bits to be zero for role switch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * do not set these bits for those devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) val = readl(data->base + DUAL_ROLE_CFG0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) switch (role) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) case USB_ROLE_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) val |= SW_IDPIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) val &= ~SW_VBUS_VALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) drd_config = DRD_CONFIG_DYNAMIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) case USB_ROLE_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) val &= ~SW_IDPIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) val &= ~SW_VBUS_VALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) drd_config = DRD_CONFIG_STATIC_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) case USB_ROLE_DEVICE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) val |= SW_IDPIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) val |= SW_VBUS_VALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) drd_config = DRD_CONFIG_STATIC_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) val |= SW_IDPIN_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (data->enable_sw_switch) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) val &= ~DRD_CONFIG_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) val |= SW_SWITCH_EN | drd_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) writel(val, data->base + DUAL_ROLE_CFG0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) acpi_release_global_lock(glk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* In most case it takes about 600ms to finish mode switching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) timeout = jiffies + msecs_to_jiffies(DUAL_ROLE_CFG1_POLL_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* Polling on CFG1 register to confirm mode switch.*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) val = readl(data->base + DUAL_ROLE_CFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (!!(val & HOST_MODE) == (role == USB_ROLE_HOST)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) pm_runtime_put(data->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Interval for polling is set to about 5 - 10 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) usleep_range(5000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) } while (time_before(jiffies, timeout));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) pm_runtime_put(data->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dev_warn(data->dev, "Timeout waiting for role-switch\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static enum usb_role intel_xhci_usb_get_role(struct usb_role_switch *sw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct intel_xhci_usb_data *data = usb_role_switch_get_drvdata(sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) enum usb_role role;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) pm_runtime_get_sync(data->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) val = readl(data->base + DUAL_ROLE_CFG0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) pm_runtime_put(data->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (!(val & SW_IDPIN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) role = USB_ROLE_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) else if (val & SW_VBUS_VALID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) role = USB_ROLE_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) role = USB_ROLE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return role;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int intel_xhci_usb_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct usb_role_switch_desc sw_desc = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct intel_xhci_usb_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (!res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) data->base = devm_ioremap(dev, res->start, resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (!data->base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) platform_set_drvdata(pdev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ret = software_node_register(&intel_xhci_usb_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) sw_desc.set = intel_xhci_usb_set_role,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) sw_desc.get = intel_xhci_usb_get_role,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) sw_desc.allow_userspace_control = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) sw_desc.fwnode = software_node_fwnode(&intel_xhci_usb_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) sw_desc.driver_data = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) data->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) data->enable_sw_switch = !device_property_read_bool(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) "sw_switch_disable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) data->role_sw = usb_role_switch_register(dev, &sw_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (IS_ERR(data->role_sw)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) fwnode_handle_put(sw_desc.fwnode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return PTR_ERR(data->role_sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) pm_runtime_set_active(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static int intel_xhci_usb_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct intel_xhci_usb_data *data = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) pm_runtime_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) usb_role_switch_unregister(data->role_sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) fwnode_handle_put(software_node_fwnode(&intel_xhci_usb_node));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const struct platform_device_id intel_xhci_usb_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) { .name = DRV_NAME },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) MODULE_DEVICE_TABLE(platform, intel_xhci_usb_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static struct platform_driver intel_xhci_usb_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .id_table = intel_xhci_usb_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .probe = intel_xhci_usb_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .remove = intel_xhci_usb_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) module_platform_driver(intel_xhci_usb_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) MODULE_DESCRIPTION("Intel XHCI USB role switch driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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