^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-1.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Renesas USB driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2011 Renesas Solutions Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2019 Renesas Electronics Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/scatterlist.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "pipe.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * packet initialize
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) void usbhs_pkt_init(struct usbhs_pkt *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) INIT_LIST_HEAD(&pkt->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * packet control function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) dev_err(dev, "null handler\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static const struct usbhs_pkt_handle usbhsf_null_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .prepare = usbhsf_null_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .try_run = usbhsf_null_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) void (*done)(struct usbhs_priv *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct usbhs_pkt *pkt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void *buf, int len, int zero, int sequence)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (!done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) dev_err(dev, "no done function\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /******************** spin lock ********************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) usbhs_lock(priv, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (!pipe->handler) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) dev_err(dev, "no handler function\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) pipe->handler = &usbhsf_null_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) list_move_tail(&pkt->node, &pipe->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * each pkt must hold own handler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * because handler might be changed by its situation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * dma handler -> pio handler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) pkt->pipe = pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) pkt->buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) pkt->handler = pipe->handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) pkt->length = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) pkt->zero = zero;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) pkt->actual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) pkt->done = done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) pkt->sequence = sequence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) usbhs_unlock(priv, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /******************** spin unlock ******************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) list_del_init(&pkt->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct usbhs_fifo *fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct usbhs_pkt *pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /******************** spin lock ********************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) usbhs_lock(priv, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) usbhs_pipe_disable(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (!pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) pkt = __usbhsf_pkt_get(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (pkt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct dma_chan *chan = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) chan = usbhsf_dma_chan_get(fifo, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (chan) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) dmaengine_terminate_all(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) usbhsf_dma_unmap(pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (usbhs_pipe_is_dir_in(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) usbhsf_rx_irq_ctrl(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) usbhsf_tx_irq_ctrl(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) usbhs_pipe_clear_without_sequence(pipe, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) usbhs_pipe_running(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) __usbhsf_pkt_del(pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) usbhs_unlock(priv, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /******************** spin unlock ******************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) USBHSF_PKT_PREPARE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) USBHSF_PKT_TRY_RUN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) USBHSF_PKT_DMA_DONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct usbhs_pkt *pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int (*func)(struct usbhs_pkt *pkt, int *is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int is_done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /******************** spin lock ********************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) usbhs_lock(priv, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) pkt = __usbhsf_pkt_get(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (!pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) goto __usbhs_pkt_handler_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) case USBHSF_PKT_PREPARE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) func = pkt->handler->prepare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) case USBHSF_PKT_TRY_RUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) func = pkt->handler->try_run;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) case USBHSF_PKT_DMA_DONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) func = pkt->handler->dma_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) dev_err(dev, "unknown pkt handler\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) goto __usbhs_pkt_handler_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (likely(func))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) ret = func(pkt, &is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) __usbhsf_pkt_del(pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) __usbhs_pkt_handler_end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) usbhs_unlock(priv, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /******************** spin unlock ******************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (is_done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) pkt->done(priv, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) usbhs_pkt_start(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) void usbhs_pkt_start(struct usbhs_pipe *pipe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * irq enable/disable function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define usbhsf_irq_callback_ctrl(pipe, status, enable) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u16 status = (1 << usbhs_pipe_number(pipe)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (!mod) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) return; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (enable) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) mod->status |= status; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) mod->status &= ~status; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) usbhs_irq_callback_update(priv, mod); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * And DCP pipe can NOT use "ready interrupt" for "send"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * it should use "empty" interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * "Operation" - "Interrupt Function" - "BRDY Interrupt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * on the other hand, normal pipe can use "ready interrupt" for "send"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * even though it is single/double buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (usbhs_pipe_is_dcp(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) usbhsf_irq_empty_ctrl(pipe, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) usbhsf_irq_ready_ctrl(pipe, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) usbhsf_irq_ready_ctrl(pipe, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * FIFO ctrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct usbhs_fifo *fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct usbhs_fifo *fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* The FIFO port is accessible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (usbhs_read(priv, fifo->ctr) & FRDY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) struct usbhs_fifo *fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (!usbhs_pipe_is_dcp(pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * This driver checks the pipe condition first to avoid -EBUSY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * from usbhsf_fifo_barrier() if the pipe is RX direction and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * empty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (usbhs_pipe_is_dir_in(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) ret = usbhs_pipe_is_accessible(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ret = usbhsf_fifo_barrier(priv, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * if non-DCP pipe, this driver should set BCLR when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * usbhsf_fifo_barrier() returns 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) usbhs_write(priv, fifo->ctr, BCLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) struct usbhs_fifo *fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct usbhs_fifo *fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) usbhs_pipe_select_fifo(pipe, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) usbhs_write(priv, fifo->sel, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct usbhs_fifo *fifo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) int write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) int timeout = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (usbhs_pipe_is_busy(pipe) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) usbhsf_fifo_is_busy(fifo))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (usbhs_pipe_is_dcp(pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) base |= (1 == write) << 5; /* ISEL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (usbhs_mod_is_host(priv))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) usbhs_dcp_dir_for_host(pipe, write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* "base" will be used below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) usbhs_write(priv, fifo->sel, base | MBW_32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* check ISEL and CURPIPE value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) while (timeout--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (base == (mask & usbhs_read(priv, fifo->sel))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) usbhs_pipe_select_fifo(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) dev_err(dev, "fifo select error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * DCP status stage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) usbhs_pipe_disable(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ret = usbhsf_fifo_select(pipe, fifo, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) dev_err(dev, "%s() faile\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) usbhs_pipe_sequence_data1(pipe); /* DATA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) usbhsf_fifo_clear(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) usbhsf_send_terminator(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) usbhsf_tx_irq_ctrl(pipe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) usbhs_pipe_enable(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) usbhs_pipe_disable(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) ret = usbhsf_fifo_select(pipe, fifo, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) dev_err(dev, "%s() fail\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) usbhs_pipe_sequence_data1(pipe); /* DATA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) usbhsf_fifo_clear(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) usbhsf_rx_irq_ctrl(pipe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) usbhs_pipe_enable(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) usbhsf_tx_irq_ctrl(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) usbhsf_rx_irq_ctrl(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) pkt->actual = pkt->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) *is_done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .prepare = usbhs_dcp_dir_switch_to_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .try_run = usbhs_dcp_dir_switch_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .prepare = usbhs_dcp_dir_switch_to_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .try_run = usbhs_dcp_dir_switch_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * DCP data stage (push)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) usbhs_pipe_sequence_data1(pipe); /* DATA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * change handler to PIO push
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) pkt->handler = &usbhs_fifo_pio_push_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return pkt->handler->prepare(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .prepare = usbhsf_dcp_data_stage_try_push,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * DCP data stage (pop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (usbhs_pipe_is_busy(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) * prepare pop for DCP should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * - change DCP direction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) * - clear fifo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * - DATA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) usbhs_pipe_disable(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) usbhs_pipe_sequence_data1(pipe); /* DATA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) usbhsf_fifo_select(pipe, fifo, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) usbhsf_fifo_clear(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) * change handler to PIO pop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) pkt->handler = &usbhs_fifo_pio_pop_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) return pkt->handler->prepare(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) .prepare = usbhsf_dcp_data_stage_prepare_pop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) * PIO push handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) void __iomem *addr = priv->base + fifo->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) int maxp = usbhs_pipe_get_maxpacket(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) int total_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) int i, ret, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) int is_short;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) usbhs_pipe_data_sequence(pipe, pkt->sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) pkt->sequence = -1; /* -1 sequence will be ignored */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) ret = usbhsf_fifo_select(pipe, fifo, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) ret = usbhs_pipe_is_accessible(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) /* inaccessible pipe is not an error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) goto usbhs_fifo_write_busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) ret = usbhsf_fifo_barrier(priv, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) goto usbhs_fifo_write_busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) buf = pkt->buf + pkt->actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) len = pkt->length - pkt->actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) len = min(len, maxp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) total_len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) is_short = total_len < maxp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * FIXME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) * 32-bit access only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if (len >= 4 && !((unsigned long)buf & 0x03)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) iowrite32_rep(addr, buf, len / 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) len %= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) buf += total_len - len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) /* the rest operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (usbhs_get_dparam(priv, cfifo_byte_addr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) for (i = 0; i < len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) iowrite8(buf[i], addr + (i & 0x03));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) for (i = 0; i < len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * variable update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) pkt->actual += total_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (pkt->actual < pkt->length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) *is_done = 0; /* there are remainder data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) else if (is_short)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) *is_done = 1; /* short packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) *is_done = !pkt->zero; /* send zero packet ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * pipe/irq handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (is_short)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) usbhsf_send_terminator(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) usbhsf_tx_irq_ctrl(pipe, !*is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) usbhs_pipe_running(pipe, !*is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) usbhs_pipe_enable(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) usbhs_pipe_number(pipe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) pkt->length, pkt->actual, *is_done, pkt->zero);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) usbhs_fifo_write_busy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * pipe is busy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * retry in interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) usbhsf_tx_irq_ctrl(pipe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) usbhs_pipe_running(pipe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (usbhs_pipe_is_running(pkt->pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return usbhsf_pio_try_push(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) .prepare = usbhsf_pio_prepare_push,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .try_run = usbhsf_pio_try_push,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) * PIO pop handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (usbhs_pipe_is_busy(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (usbhs_pipe_is_running(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) * pipe enable to prepare packet receive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) usbhs_pipe_data_sequence(pipe, pkt->sequence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) pkt->sequence = -1; /* -1 sequence will be ignored */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (usbhs_pipe_is_dcp(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) usbhsf_fifo_clear(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) usbhs_pipe_enable(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) usbhs_pipe_running(pipe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) usbhsf_rx_irq_ctrl(pipe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) void __iomem *addr = priv->base + fifo->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) u32 data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) int maxp = usbhs_pipe_get_maxpacket(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) int rcv_len, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) int total_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) ret = usbhsf_fifo_select(pipe, fifo, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) ret = usbhsf_fifo_barrier(priv, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) goto usbhs_fifo_read_busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) buf = pkt->buf + pkt->actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) len = pkt->length - pkt->actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) len = min(len, rcv_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) total_len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) * update actual length first here to decide disable pipe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) * if this pipe keeps BUF status and all data were popped,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) * then, next interrupt/token will be issued again
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) pkt->actual += total_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) if ((pkt->actual == pkt->length) || /* receive all data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) (total_len < maxp)) { /* short packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) *is_done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) usbhsf_rx_irq_ctrl(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) usbhs_pipe_running(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) * If function mode, since this controller is possible to enter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) * Control Write status stage at this timing, this driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) * should not disable the pipe. If such a case happens, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) * controller is not able to complete the status stage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) usbhs_pipe_disable(pipe); /* disable pipe first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) * Buffer clear if Zero-Length packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) * see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (0 == rcv_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) pkt->zero = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) usbhsf_fifo_clear(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) goto usbhs_fifo_read_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) * FIXME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) * 32-bit access only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (len >= 4 && !((unsigned long)buf & 0x03)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) ioread32_rep(addr, buf, len / 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) len %= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) buf += total_len - len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) /* the rest operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) for (i = 0; i < len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) if (!(i & 0x03))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) data = ioread32(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) usbhs_fifo_read_end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) usbhs_pipe_number(pipe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) pkt->length, pkt->actual, *is_done, pkt->zero);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) usbhs_fifo_read_busy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .prepare = usbhsf_prepare_pop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .try_run = usbhsf_pio_try_pop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * DCP ctrol statge handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) usbhs_dcp_control_transfer_done(pkt->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) *is_done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .prepare = usbhsf_ctrl_stage_end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .try_run = usbhsf_ctrl_stage_end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) * DMA fifo functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) struct usbhs_pkt *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (&usbhs_fifo_dma_push_handler == pkt->handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) return fifo->tx_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) if (&usbhs_fifo_dma_pop_handler == pkt->handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) return fifo->rx_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) struct usbhs_pkt *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) struct usbhs_fifo *fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) usbhs_for_each_dfifo(priv, fifo, i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) if (usbhsf_dma_chan_get(fifo, pkt) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) !usbhsf_fifo_is_busy(fifo))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) return fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) #define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) #define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) struct usbhs_fifo *fifo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) u16 dreqe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) usbhs_bset(priv, fifo->sel, DREQE, dreqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) return info->dma_map_ctrl(chan->device->dev, pkt, map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) static void usbhsf_dma_complete(void *arg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) const struct dmaengine_result *result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) static void usbhsf_dma_xfer_preparing(struct usbhs_pkt *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) struct usbhs_fifo *fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) struct dma_async_tx_descriptor *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) struct dma_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) enum dma_transfer_direction dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) dma_cookie_t cookie;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) fifo = usbhs_pipe_to_fifo(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) if (!fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) chan = usbhsf_dma_chan_get(fifo, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) pkt->trans, dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) desc->callback_result = usbhsf_dma_complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) desc->callback_param = pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) cookie = dmaengine_submit(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) if (cookie < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) dev_err(dev, "Failed to submit dma descriptor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) dev_dbg(dev, " %s %d (%d/ %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) usbhs_pipe_running(pipe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) dma_async_issue_pending(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) usbhsf_dma_start(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) usbhs_pipe_enable(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) static void xfer_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) usbhs_lock(priv, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) usbhsf_dma_xfer_preparing(pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) usbhs_unlock(priv, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) * DMA push handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) struct usbhs_fifo *fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) int len = pkt->length - pkt->actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) uintptr_t align_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) if (usbhs_pipe_is_busy(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) /* use PIO if packet is less than pio_dma_border or pipe is DCP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) goto usbhsf_pio_prepare_push;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) /* check data length if this driver don't use USB-DMAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) goto usbhsf_pio_prepare_push;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) /* check buffer alignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) goto usbhsf_pio_prepare_push;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) /* return at this time if the pipe is running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) if (usbhs_pipe_is_running(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) /* get enable DMA fifo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) fifo = usbhsf_get_dma_fifo(priv, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) if (!fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) goto usbhsf_pio_prepare_push;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) ret = usbhsf_fifo_select(pipe, fifo, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) goto usbhsf_pio_prepare_push;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) if (usbhsf_dma_map(pkt) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) goto usbhsf_pio_prepare_push_unselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) pkt->trans = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) usbhsf_tx_irq_ctrl(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) /* FIXME: Workaound for usb dmac that driver can be used in atomic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) if (usbhs_get_dparam(priv, has_usb_dmac)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) usbhsf_dma_xfer_preparing(pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) INIT_WORK(&pkt->work, xfer_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) schedule_work(&pkt->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) usbhsf_pio_prepare_push_unselect:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) usbhsf_pio_prepare_push:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) * change handler to PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) pkt->handler = &usbhs_fifo_pio_push_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) return pkt->handler->prepare(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) pkt->actual += pkt->trans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) if (pkt->actual < pkt->length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) *is_done = 0; /* there are remainder data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) else if (is_short)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) *is_done = 1; /* short packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) *is_done = !pkt->zero; /* send zero packet? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) usbhs_pipe_running(pipe, !*is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) usbhsf_dma_stop(pipe, pipe->fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) usbhsf_dma_unmap(pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) usbhsf_fifo_unselect(pipe, pipe->fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) if (!*is_done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) /* change handler to PIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) pkt->handler = &usbhs_fifo_pio_push_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) return pkt->handler->try_run(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) .prepare = usbhsf_dma_prepare_push,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) .dma_done = usbhsf_dma_push_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) * DMA pop handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) return usbhsf_prepare_pop(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) struct usbhs_fifo *fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) if (usbhs_pipe_is_busy(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) /* use PIO if packet is less than pio_dma_border or pipe is DCP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) goto usbhsf_pio_prepare_pop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) fifo = usbhsf_get_dma_fifo(priv, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) if (!fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) goto usbhsf_pio_prepare_pop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) goto usbhsf_pio_prepare_pop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) /* return at this time if the pipe is running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) if (usbhs_pipe_is_running(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) usbhs_pipe_config_change_bfre(pipe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) ret = usbhsf_fifo_select(pipe, fifo, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) goto usbhsf_pio_prepare_pop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) if (usbhsf_dma_map(pkt) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) goto usbhsf_pio_prepare_pop_unselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) /* DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) * usbhs_fifo_dma_pop_handler :: prepare
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) * enabled irq to come here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) * but it is no longer needed for DMA. disable it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) usbhsf_rx_irq_ctrl(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) pkt->trans = pkt->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) usbhsf_dma_xfer_preparing(pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) usbhsf_pio_prepare_pop_unselect:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) usbhsf_pio_prepare_pop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) * change handler to PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) pkt->handler = &usbhs_fifo_pio_pop_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) usbhs_pipe_config_change_bfre(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) return pkt->handler->prepare(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) if (usbhs_get_dparam(priv, has_usb_dmac))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) struct usbhs_fifo *fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) int len, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) if (usbhs_pipe_is_busy(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) if (usbhs_pipe_is_dcp(pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) goto usbhsf_pio_prepare_pop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) /* get enable DMA fifo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) fifo = usbhsf_get_dma_fifo(priv, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) if (!fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) goto usbhsf_pio_prepare_pop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) goto usbhsf_pio_prepare_pop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) ret = usbhsf_fifo_select(pipe, fifo, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) goto usbhsf_pio_prepare_pop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) /* use PIO if packet is less than pio_dma_border */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) len = usbhsf_fifo_rcv_len(priv, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) len = min(pkt->length - pkt->actual, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) if (len & 0x7) /* 8byte alignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) goto usbhsf_pio_prepare_pop_unselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) if (len < usbhs_get_dparam(priv, pio_dma_border))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) goto usbhsf_pio_prepare_pop_unselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) ret = usbhsf_fifo_barrier(priv, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) goto usbhsf_pio_prepare_pop_unselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (usbhsf_dma_map(pkt) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) goto usbhsf_pio_prepare_pop_unselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) /* DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) * usbhs_fifo_dma_pop_handler :: prepare
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) * enabled irq to come here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) * but it is no longer needed for DMA. disable it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) usbhsf_rx_irq_ctrl(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) pkt->trans = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) INIT_WORK(&pkt->work, xfer_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) schedule_work(&pkt->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) usbhsf_pio_prepare_pop_unselect:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) usbhsf_pio_prepare_pop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) * change handler to PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) pkt->handler = &usbhs_fifo_pio_pop_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) return pkt->handler->try_run(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) int maxp = usbhs_pipe_get_maxpacket(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) usbhsf_dma_stop(pipe, pipe->fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) usbhsf_dma_unmap(pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) usbhsf_fifo_unselect(pipe, pipe->fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) pkt->actual += pkt->trans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) if ((pkt->actual == pkt->length) || /* receive all data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) (pkt->trans < maxp)) { /* short packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) *is_done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) usbhs_pipe_running(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) /* re-enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) usbhs_pipe_running(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) usbhsf_prepare_pop(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) struct dma_chan *chan, int dtln)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) size_t received_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) int maxp = usbhs_pipe_get_maxpacket(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) received_size = pkt->length - pkt->dma_result->residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) if (dtln) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) received_size -= USBHS_USB_DMAC_XFER_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) received_size &= ~(maxp - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) received_size += dtln;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) return received_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) int rcv_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) * Since the driver disables rx_irq in DMA mode, the interrupt handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) * cannot the BRDYSTS. So, the function clears it here because the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) * driver may use PIO mode next time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) usbhsf_fifo_clear(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) usbhs_pipe_running(pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) usbhsf_dma_stop(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) usbhsf_dma_unmap(pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) usbhsf_fifo_unselect(pipe, pipe->fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) /* The driver can assume the rx transaction is always "done" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) *is_done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) if (usbhs_get_dparam(priv, has_usb_dmac))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) .prepare = usbhsf_dma_prepare_pop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) .try_run = usbhsf_dma_try_pop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) .dma_done = usbhsf_dma_pop_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) * DMA setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) struct sh_dmae_slave *slave = param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) * FIXME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) * usbhs doesn't recognize id = 0 as valid DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) if (0 == slave->shdma_slave.slave_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) chan->private = slave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) if (fifo->tx_chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) dma_release_channel(fifo->tx_chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) if (fifo->rx_chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) dma_release_channel(fifo->rx_chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) fifo->tx_chan = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) fifo->rx_chan = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) dma_cap_mask_t mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) dma_cap_zero(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) dma_cap_set(DMA_SLAVE, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) &fifo->tx_slave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) dma_cap_zero(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) dma_cap_set(DMA_SLAVE, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) &fifo->rx_slave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) char name[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) * To avoid complex handing for DnFIFOs, the driver uses each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) * DnFIFO as TX or RX direction (not bi-direction).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) * So, the driver uses odd channels for TX, even channels for RX.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) snprintf(name, sizeof(name), "ch%d", channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) if (channel & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) fifo->tx_chan = dma_request_chan(dev, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) if (IS_ERR(fifo->tx_chan))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) fifo->tx_chan = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) fifo->rx_chan = dma_request_chan(dev, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) if (IS_ERR(fifo->rx_chan))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) fifo->rx_chan = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) if (dev_of_node(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) usbhsf_dma_init_dt(dev, fifo, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) usbhsf_dma_init_pdev(fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) if (fifo->tx_chan || fifo->rx_chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) fifo->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) fifo->tx_chan ? "[TX]" : " ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) fifo->rx_chan ? "[RX]" : " ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) * irq functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) static int usbhsf_irq_empty(struct usbhs_priv *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) struct usbhs_irq_state *irq_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) struct usbhs_pipe *pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) if (!irq_state->bempsts) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) dev_err(dev, "debug %s !!\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) * search interrupted "pipe"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) * not "uep".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) if (!(irq_state->bempsts & (1 << i)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) static int usbhsf_irq_ready(struct usbhs_priv *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) struct usbhs_irq_state *irq_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) struct usbhs_pipe *pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) if (!irq_state->brdysts) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) dev_err(dev, "debug %s !!\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) * search interrupted "pipe"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) * not "uep".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) if (!(irq_state->brdysts & (1 << i)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) static void usbhsf_dma_complete(void *arg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) const struct dmaengine_result *result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) struct usbhs_pkt *pkt = arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) struct usbhs_pipe *pipe = pkt->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) struct device *dev = usbhs_priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) pkt->dma_result = result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) dev_err(dev, "dma_complete run_error %d : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) usbhs_pipe_number(pipe), ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) /* clear DCP FIFO of transmission */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) usbhsf_fifo_clear(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) /* clear DCP FIFO of reception */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) usbhsf_fifo_clear(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) usbhsf_fifo_unselect(pipe, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) * fifo init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) void usbhs_fifo_init(struct usbhs_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) struct usbhs_mod *mod = usbhs_mod_get_current(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) struct usbhs_fifo *dfifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) mod->irq_empty = usbhsf_irq_empty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) mod->irq_ready = usbhsf_irq_ready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) mod->irq_bempsts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) mod->irq_brdysts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) cfifo->pipe = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) usbhs_for_each_dfifo(priv, dfifo, i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) dfifo->pipe = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) void usbhs_fifo_quit(struct usbhs_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) struct usbhs_mod *mod = usbhs_mod_get_current(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) mod->irq_empty = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) mod->irq_ready = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) mod->irq_bempsts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) mod->irq_brdysts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) #define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) fifo = usbhsf_get_dnfifo(priv, channel); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) fifo->name = "D"#channel"FIFO"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) fifo->port = fifo_port; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) fifo->sel = D##channel##FIFOSEL; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) fifo->ctr = D##channel##FIFOCTR; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) fifo->tx_slave.shdma_slave.slave_id = \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) usbhs_get_dparam(priv, d##channel##_tx_id); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) fifo->rx_slave.shdma_slave.slave_id = \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) usbhs_get_dparam(priv, d##channel##_rx_id); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) usbhsf_dma_init(priv, fifo, channel); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) #define USBHS_DFIFO_INIT(priv, fifo, channel) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) #define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) int usbhs_fifo_probe(struct usbhs_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) struct usbhs_fifo *fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) /* CFIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) fifo = usbhsf_get_cfifo(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) fifo->name = "CFIFO";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) fifo->port = CFIFO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) fifo->sel = CFIFOSEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) fifo->ctr = CFIFOCTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) /* DFIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) USBHS_DFIFO_INIT(priv, fifo, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) USBHS_DFIFO_INIT(priv, fifo, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) void usbhs_fifo_remove(struct usbhs_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) struct usbhs_fifo *fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) usbhs_for_each_dfifo(priv, fifo, i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) usbhsf_dma_quit(priv, fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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