^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * isp1301_omap - ISP 1301 USB transceiver, talking to OMAP OTG controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2004 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2004 David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/usb/ch9.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/usb/gadget.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/usb/otg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <mach/mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <mach/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #undef VERBOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define DRIVER_VERSION "24 August 2004"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define DRIVER_NAME (isp1301_driver.driver.name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MODULE_DESCRIPTION("ISP1301 USB OTG Transceiver Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct isp1301 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct usb_phy phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void (*i2c_release)(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int irq_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u32 last_otg_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned working:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct timer_list timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* use keventd context to change the state for us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct work_struct work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned long todo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) # define WORK_UPDATE_ISP 0 /* update ISP from OTG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) # define WORK_UPDATE_OTG 1 /* update OTG from ISP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) # define WORK_HOST_RESUME 4 /* resume host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) # define WORK_TIMER 6 /* timer fired */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) # define WORK_STOP 7 /* don't resubmit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* bits in OTG_CTRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define OTG_XCEIV_OUTPUTS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define OTG_XCEIV_INPUTS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define OTG_CTRL_BITS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* and OTG_PULLUP is sometimes written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define OTG_CTRL_MASK (OTG_DRIVER_SEL| \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) OTG_CTRL_BITS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* board-specific PM hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #if defined(CONFIG_MACH_OMAP_H2) || defined(CONFIG_MACH_OMAP_H3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #if IS_REACHABLE(CONFIG_TPS65010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #include <linux/mfd/tps65010.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static inline int tps65010_set_vbus_draw(unsigned mA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) pr_debug("tps65010: draw %d mA (STUB)\n", mA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static void enable_vbus_draw(struct isp1301 *isp, unsigned mA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int status = tps65010_set_vbus_draw(mA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) pr_debug(" VBUS %d mA error %d\n", mA, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static void enable_vbus_draw(struct isp1301 *isp, unsigned mA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* H4 controls this by DIP switch S2.4; no soft control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * ON means the charger is always enabled. Leave it OFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * unless the OTG port is used only in B-peripheral mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static void enable_vbus_source(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* this board won't supply more than 8mA vbus power.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * some boards can switch a 100ma "unit load" (or more).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* products will deliver OTG messages with LEDs, GUI, etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static inline void notresponding(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) printk(KERN_NOTICE "OTG device not responding.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static struct i2c_driver isp1301_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* smbus apis are used for portability */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static inline u8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) isp1301_get_u8(struct isp1301 *isp, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return i2c_smbus_read_byte_data(isp->client, reg + 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) isp1301_get_u16(struct isp1301 *isp, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return i2c_smbus_read_word_data(isp->client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) isp1301_set_bits(struct isp1301 *isp, u8 reg, u8 bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return i2c_smbus_write_byte_data(isp->client, reg + 0, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) isp1301_clear_bits(struct isp1301 *isp, u8 reg, u8 bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return i2c_smbus_write_byte_data(isp->client, reg + 1, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* identification */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define ISP1301_VENDOR_ID 0x00 /* u16 read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define ISP1301_PRODUCT_ID 0x02 /* u16 read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define ISP1301_BCD_DEVICE 0x14 /* u16 read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define I2C_VENDOR_ID_PHILIPS 0x04cc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define I2C_PRODUCT_ID_PHILIPS_1301 0x1301
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* operational registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) # define MC1_SPEED (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) # define MC1_SUSPEND (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) # define MC1_DAT_SE0 (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) # define MC1_TRANSPARENT (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) # define MC1_BDIS_ACON_EN (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) # define MC1_OE_INT_EN (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) # define MC1_UART_EN (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) # define MC1_MASK 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define ISP1301_MODE_CONTROL_2 0x12 /* u8 read, set, +1 clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) # define MC2_GLOBAL_PWR_DN (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) # define MC2_SPD_SUSP_CTRL (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) # define MC2_BI_DI (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) # define MC2_TRANSP_BDIR0 (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) # define MC2_TRANSP_BDIR1 (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) # define MC2_AUDIO_EN (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) # define MC2_PSW_EN (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) # define MC2_EN2V7 (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define ISP1301_OTG_CONTROL_1 0x06 /* u8 read, set, +1 clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) # define OTG1_DP_PULLUP (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) # define OTG1_DM_PULLUP (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) # define OTG1_DP_PULLDOWN (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) # define OTG1_DM_PULLDOWN (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) # define OTG1_ID_PULLDOWN (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) # define OTG1_VBUS_DRV (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) # define OTG1_VBUS_DISCHRG (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) # define OTG1_VBUS_CHRG (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define ISP1301_OTG_STATUS 0x10 /* u8 readonly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) # define OTG_B_SESS_END (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) # define OTG_B_SESS_VLD (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define ISP1301_INTERRUPT_SOURCE 0x08 /* u8 read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define ISP1301_INTERRUPT_LATCH 0x0A /* u8 read, set, +1 clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define ISP1301_INTERRUPT_FALLING 0x0C /* u8 read, set, +1 clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define ISP1301_INTERRUPT_RISING 0x0E /* u8 read, set, +1 clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /* same bitfields in all interrupt registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) # define INTR_VBUS_VLD (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) # define INTR_SESS_VLD (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) # define INTR_DP_HI (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) # define INTR_ID_GND (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) # define INTR_DM_HI (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) # define INTR_ID_FLOAT (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) # define INTR_BDIS_ACON (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) # define INTR_CR_INT (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static inline const char *state_name(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return usb_otg_state_string(isp->phy.otg->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* NOTE: some of this ISP1301 setup is specific to H2 boards;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * not everything is guarded by board-specific checks, or even using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * omap_usb_config data to deduce MC1_DAT_SE0 and MC2_BI_DI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * ALSO: this currently doesn't use ISP1301 low-power modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * while OTG is running.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static void power_down(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) isp->phy.otg->state = OTG_STATE_UNDEFINED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) // isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_ID_PULLDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static void __maybe_unused power_up(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) // isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* do this only when cpu is driving transceiver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * so host won't see a low speed device...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define NO_HOST_SUSPEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static int host_suspend(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #ifdef NO_HOST_SUSPEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (!isp->phy.otg->host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /* Currently ASSUMES only the OTG port matters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * other ports could be active...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) dev = isp->phy.otg->host->controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return dev->driver->suspend(dev, 3, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static int host_resume(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #ifdef NO_HOST_SUSPEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (!isp->phy.otg->host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) dev = isp->phy.otg->host->controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return dev->driver->resume(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static int gadget_suspend(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) isp->phy.otg->gadget->b_hnp_enable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) isp->phy.otg->gadget->a_hnp_support = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) isp->phy.otg->gadget->a_alt_hnp_support = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return usb_gadget_vbus_disconnect(isp->phy.otg->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define TIMER_MINUTES 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define TIMER_JIFFIES (TIMER_MINUTES * 60 * HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* Almost all our I2C messaging comes from a work queue's task context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * NOTE: guaranteeing certain response times might mean we shouldn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * share keventd's work queue; a realtime task might be safest.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static void isp1301_defer_work(struct isp1301 *isp, int work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (isp && !test_and_set_bit(work, &isp->todo)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) (void) get_device(&isp->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) status = schedule_work(&isp->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (!status && !isp->working)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) dev_vdbg(&isp->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) "work item %d may be lost\n", work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) /* called from irq handlers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static void a_idle(struct isp1301 *isp, const char *tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (isp->phy.otg->state == OTG_STATE_A_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) isp->phy.otg->default_a = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (isp->phy.otg->host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) isp->phy.otg->host->is_b_host = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) host_suspend(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (isp->phy.otg->gadget) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) isp->phy.otg->gadget->is_a_peripheral = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) gadget_suspend(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) isp->phy.otg->state = OTG_STATE_A_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) omap_writel(l, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) isp->last_otg_ctrl = l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) pr_debug(" --> %s/%s\n", state_name(isp), tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) /* called from irq handlers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static void b_idle(struct isp1301 *isp, const char *tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (isp->phy.otg->state == OTG_STATE_B_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) isp->phy.otg->default_a = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (isp->phy.otg->host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) isp->phy.otg->host->is_b_host = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) host_suspend(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (isp->phy.otg->gadget) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) isp->phy.otg->gadget->is_a_peripheral = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) gadget_suspend(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) isp->phy.otg->state = OTG_STATE_B_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) omap_writel(l, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) isp->last_otg_ctrl = l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) pr_debug(" --> %s/%s\n", state_name(isp), tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) dump_regs(struct isp1301 *isp, const char *label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) u8 ctrl = isp1301_get_u8(isp, ISP1301_OTG_CONTROL_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) u8 status = isp1301_get_u8(isp, ISP1301_OTG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) u8 src = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) pr_debug("otg: %06x, %s %s, otg/%02x stat/%02x.%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) omap_readl(OTG_CTRL), label, state_name(isp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ctrl, status, src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) /* mode control and irq enables don't change much */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * The OMAP OTG controller handles most of the OTG state transitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * We translate isp1301 outputs (mostly voltage comparator status) into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * OTG inputs; OTG outputs (mostly pullup/pulldown controls) and HNP state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * flags into isp1301 inputs ... and infer state transitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #ifdef VERBOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static void check_state(struct isp1301 *isp, const char *tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) enum usb_otg_state state = OTG_STATE_UNDEFINED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) u8 fsm = omap_readw(OTG_TEST) & 0x0ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) unsigned extra = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) switch (fsm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /* default-b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) case 0x0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) state = OTG_STATE_B_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) case 0x3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) case 0x7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) extra = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) case 0x1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) state = OTG_STATE_B_PERIPHERAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) case 0x11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) state = OTG_STATE_B_SRP_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) /* extra dual-role default-b states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) case 0x12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) case 0x13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) case 0x16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) extra = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) case 0x17:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) state = OTG_STATE_B_WAIT_ACON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) case 0x34:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) state = OTG_STATE_B_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /* default-a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) case 0x36:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) state = OTG_STATE_A_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) case 0x3c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) state = OTG_STATE_A_WAIT_VFALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) case 0x7d:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) state = OTG_STATE_A_VBUS_ERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) case 0x9e:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) case 0x9f:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) extra = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) case 0x89:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) state = OTG_STATE_A_PERIPHERAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) case 0xb7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) state = OTG_STATE_A_WAIT_VRISE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) case 0xb8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) state = OTG_STATE_A_WAIT_BCON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) case 0xb9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) state = OTG_STATE_A_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) case 0xba:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) state = OTG_STATE_A_SUSPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if (isp->phy.otg->state == state && !extra)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) usb_otg_state_string(state), fsm, state_name(isp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) omap_readl(OTG_CTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static inline void check_state(struct isp1301 *isp, const char *tag) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* outputs from ISP1301_INTERRUPT_SOURCE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static void update_otg1(struct isp1301 *isp, u8 int_src)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) u32 otg_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) otg_ctrl &= ~OTG_XCEIV_INPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) otg_ctrl &= ~(OTG_ID|OTG_ASESSVLD|OTG_VBUSVLD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (int_src & INTR_SESS_VLD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) otg_ctrl |= OTG_ASESSVLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) else if (isp->phy.otg->state == OTG_STATE_A_WAIT_VFALL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) a_idle(isp, "vfall");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) otg_ctrl &= ~OTG_CTRL_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (int_src & INTR_VBUS_VLD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) otg_ctrl |= OTG_VBUSVLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if (int_src & INTR_ID_GND) { /* default-A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (isp->phy.otg->state == OTG_STATE_B_IDLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) || isp->phy.otg->state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) == OTG_STATE_UNDEFINED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) a_idle(isp, "init");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) } else { /* default-B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) otg_ctrl |= OTG_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) if (isp->phy.otg->state == OTG_STATE_A_IDLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) || isp->phy.otg->state == OTG_STATE_UNDEFINED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) b_idle(isp, "init");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) omap_writel(otg_ctrl, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) /* outputs from ISP1301_OTG_STATUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static void update_otg2(struct isp1301 *isp, u8 otg_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) u32 otg_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) otg_ctrl &= ~OTG_XCEIV_INPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) otg_ctrl &= ~(OTG_BSESSVLD | OTG_BSESSEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (otg_status & OTG_B_SESS_VLD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) otg_ctrl |= OTG_BSESSVLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) else if (otg_status & OTG_B_SESS_END)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) otg_ctrl |= OTG_BSESSEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) omap_writel(otg_ctrl, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) /* inputs going to ISP1301 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static void otg_update_isp(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) u32 otg_ctrl, otg_change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) u8 set = OTG1_DM_PULLDOWN, clr = OTG1_DM_PULLUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) otg_ctrl = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) otg_change = otg_ctrl ^ isp->last_otg_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) isp->last_otg_ctrl = otg_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) otg_ctrl = otg_ctrl & OTG_XCEIV_INPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) switch (isp->phy.otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) case OTG_STATE_B_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) case OTG_STATE_B_PERIPHERAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) case OTG_STATE_B_SRP_INIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (!(otg_ctrl & OTG_PULLUP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) // if (otg_ctrl & OTG_B_HNPEN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if (isp->phy.otg->gadget->b_hnp_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) isp->phy.otg->state = OTG_STATE_B_WAIT_ACON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) pr_debug(" --> b_wait_acon\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) goto pulldown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) pullup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) set |= OTG1_DP_PULLUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) clr |= OTG1_DP_PULLDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) case OTG_STATE_A_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) case OTG_STATE_A_PERIPHERAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) if (otg_ctrl & OTG_PULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) goto pullup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /* FALLTHROUGH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) // case OTG_STATE_B_WAIT_ACON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) pulldown:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) set |= OTG1_DP_PULLDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) clr |= OTG1_DP_PULLUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) # define toggle(OTG,ISP) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (otg_ctrl & OTG) set |= ISP; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) else clr |= ISP; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (!(isp->phy.otg->host))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) otg_ctrl &= ~OTG_DRV_VBUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) switch (isp->phy.otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) case OTG_STATE_A_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (otg_ctrl & OTG_DRV_VBUS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) set |= OTG1_VBUS_DRV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* HNP failed for some reason (A_AIDL_BDIS timeout) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) notresponding(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) case OTG_STATE_A_VBUS_ERR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) isp->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) pr_debug(" --> a_wait_vfall\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) case OTG_STATE_A_WAIT_VFALL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) /* FIXME usbcore thinks port power is still on ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) clr |= OTG1_VBUS_DRV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) case OTG_STATE_A_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (otg_ctrl & OTG_DRV_VBUS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) isp->phy.otg->state = OTG_STATE_A_WAIT_VRISE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) pr_debug(" --> a_wait_vrise\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) toggle(OTG_DRV_VBUS, OTG1_VBUS_DRV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) toggle(OTG_PU_VBUS, OTG1_VBUS_CHRG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) toggle(OTG_PD_VBUS, OTG1_VBUS_DISCHRG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) # undef toggle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, clr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) /* HNP switch to host or peripheral; and SRP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (otg_change & OTG_PULLUP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) switch (isp->phy.otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) case OTG_STATE_B_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (clr & OTG1_DP_PULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) isp->phy.otg->state = OTG_STATE_B_PERIPHERAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) pr_debug(" --> b_peripheral\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) case OTG_STATE_A_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) if (clr & OTG1_DP_PULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) isp->phy.otg->state = OTG_STATE_A_PERIPHERAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) pr_debug(" --> a_peripheral\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) l = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) l |= OTG_PULLUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) omap_writel(l, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) check_state(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) dump_regs(isp, "otg->isp1301");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) static irqreturn_t omap_otg_irq(int irq, void *_isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) u16 otg_irq = omap_readw(OTG_IRQ_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) u32 otg_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) int ret = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) struct isp1301 *isp = _isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) struct usb_otg *otg = isp->phy.otg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) /* update ISP1301 transceiver from OTG controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) if (otg_irq & OPRT_CHG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) omap_writew(OPRT_CHG, OTG_IRQ_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) isp1301_defer_work(isp, WORK_UPDATE_ISP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) /* SRP to become b_peripheral failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) } else if (otg_irq & B_SRP_TMROUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) pr_debug("otg: B_SRP_TIMEOUT, %06x\n", omap_readl(OTG_CTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) notresponding(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) /* gadget drivers that care should monitor all kinds of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) * remote wakeup (SRP, normal) using their own timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) * to give "check cable and A-device" messages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (isp->phy.otg->state == OTG_STATE_B_SRP_INIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) b_idle(isp, "srp_timeout");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) omap_writew(B_SRP_TMROUT, OTG_IRQ_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) /* HNP to become b_host failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) } else if (otg_irq & B_HNP_FAIL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) pr_debug("otg: %s B_HNP_FAIL, %06x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) state_name(isp), omap_readl(OTG_CTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) notresponding(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) otg_ctrl = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) otg_ctrl |= OTG_BUSDROP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) omap_writel(otg_ctrl, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) /* subset of b_peripheral()... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) isp->phy.otg->state = OTG_STATE_B_PERIPHERAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) pr_debug(" --> b_peripheral\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) omap_writew(B_HNP_FAIL, OTG_IRQ_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) /* detect SRP from B-device ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) } else if (otg_irq & A_SRP_DETECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) pr_debug("otg: %s SRP_DETECT, %06x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) state_name(isp), omap_readl(OTG_CTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) isp1301_defer_work(isp, WORK_UPDATE_OTG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) switch (isp->phy.otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) case OTG_STATE_A_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) if (!otg->host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) isp1301_defer_work(isp, WORK_HOST_RESUME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) otg_ctrl = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) otg_ctrl |= OTG_A_BUSREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) & ~OTG_XCEIV_INPUTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) & OTG_CTRL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) omap_writel(otg_ctrl, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) omap_writew(A_SRP_DETECT, OTG_IRQ_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) /* timer expired: T(a_wait_bcon) and maybe T(a_wait_vrise)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) * we don't track them separately
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) } else if (otg_irq & A_REQ_TMROUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) otg_ctrl = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) pr_info("otg: BCON_TMOUT from %s, %06x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) state_name(isp), otg_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) notresponding(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) otg_ctrl |= OTG_BUSDROP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) omap_writel(otg_ctrl, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) isp->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) omap_writew(A_REQ_TMROUT, OTG_IRQ_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) /* A-supplied voltage fell too low; overcurrent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) } else if (otg_irq & A_VBUS_ERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) otg_ctrl = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) printk(KERN_ERR "otg: %s, VBUS_ERR %04x ctrl %06x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) state_name(isp), otg_irq, otg_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) otg_ctrl |= OTG_BUSDROP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) omap_writel(otg_ctrl, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) isp->phy.otg->state = OTG_STATE_A_VBUS_ERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) omap_writew(A_VBUS_ERR, OTG_IRQ_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) /* switch driver; the transceiver code activates it,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) * ungating the udc clock or resuming OHCI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) } else if (otg_irq & DRIVER_SWITCH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) int kick = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) otg_ctrl = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) printk(KERN_NOTICE "otg: %s, SWITCH to %s, ctrl %06x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) state_name(isp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) (otg_ctrl & OTG_DRIVER_SEL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) ? "gadget" : "host",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) otg_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) isp1301_defer_work(isp, WORK_UPDATE_ISP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) /* role is peripheral */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) if (otg_ctrl & OTG_DRIVER_SEL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) switch (isp->phy.otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) case OTG_STATE_A_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) b_idle(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) isp1301_defer_work(isp, WORK_UPDATE_ISP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /* role is host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) if (!(otg_ctrl & OTG_ID)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) omap_writel(otg_ctrl | OTG_A_BUSREQ, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) if (otg->host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) switch (isp->phy.otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) case OTG_STATE_B_WAIT_ACON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) isp->phy.otg->state = OTG_STATE_B_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) pr_debug(" --> b_host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) kick = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) case OTG_STATE_A_WAIT_BCON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) isp->phy.otg->state = OTG_STATE_A_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) pr_debug(" --> a_host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) case OTG_STATE_A_PERIPHERAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) isp->phy.otg->state = OTG_STATE_A_WAIT_BCON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) pr_debug(" --> a_wait_bcon\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) isp1301_defer_work(isp, WORK_HOST_RESUME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) omap_writew(DRIVER_SWITCH, OTG_IRQ_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) if (kick)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) usb_bus_start_enum(otg->host, otg->host->otg_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) check_state(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static struct platform_device *otg_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) static int isp1301_otg_init(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) if (!otg_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) dump_regs(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) /* some of these values are board-specific... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) l = omap_readl(OTG_SYSCON_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) l |= OTG_EN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /* for B-device: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) | SRP_GPDATA /* 9msec Bdev D+ pulse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) | SRP_GPDVBUS /* discharge after VBUS pulse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) // | (3 << 24) /* 2msec VBUS pulse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) /* for A-device: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) | (0 << 20) /* 200ms nominal A_WAIT_VRISE timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) | SRP_DPW /* detect 167+ns SRP pulses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) | SRP_DATA | SRP_VBUS /* accept both kinds of SRP pulse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) omap_writel(l, OTG_SYSCON_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) check_state(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) pr_debug("otg: %s, %s %06x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) state_name(isp), __func__, omap_readl(OTG_CTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) omap_writew(DRIVER_SWITCH | OPRT_CHG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) | B_SRP_TMROUT | B_HNP_FAIL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) | A_VBUS_ERR | A_SRP_DETECT | A_REQ_TMROUT, OTG_IRQ_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) l = omap_readl(OTG_SYSCON_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) l |= OTG_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) omap_writel(l, OTG_SYSCON_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static int otg_probe(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) // struct omap_usb_config *config = dev->platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) otg_dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) static int otg_remove(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) otg_dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static struct platform_driver omap_otg_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) .probe = otg_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) .remove = otg_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) .name = "omap_otg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) static int otg_bind(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) if (otg_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) status = platform_driver_register(&omap_otg_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) if (otg_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) status = request_irq(otg_dev->resource[1].start, omap_otg_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) 0, DRIVER_NAME, isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) status = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) platform_driver_unregister(&omap_otg_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) static void otg_unbind(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) if (!otg_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) free_irq(otg_dev->resource[1].start, isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) /* OTG controller isn't clocked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) #endif /* CONFIG_USB_OTG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) static void b_peripheral(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) omap_writel(l, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) usb_gadget_vbus_connect(isp->phy.otg->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) enable_vbus_draw(isp, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) otg_update_isp(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) enable_vbus_draw(isp, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) /* UDC driver just set OTG_BSESSVLD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLUP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) isp->phy.otg->state = OTG_STATE_B_PERIPHERAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) pr_debug(" --> b_peripheral\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) dump_regs(isp, "2periph");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) static void isp_update_otg(struct isp1301 *isp, u8 stat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) struct usb_otg *otg = isp->phy.otg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) u8 isp_stat, isp_bstat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) enum usb_otg_state state = isp->phy.otg->state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) if (stat & INTR_BDIS_ACON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) pr_debug("OTG: BDIS_ACON, %s\n", state_name(isp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) /* start certain state transitions right away */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) isp_stat = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) if (isp_stat & INTR_ID_GND) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) if (otg->default_a) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) case OTG_STATE_B_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) a_idle(isp, "idle");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) case OTG_STATE_A_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) enable_vbus_source(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) case OTG_STATE_A_WAIT_VRISE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) /* we skip over OTG_STATE_A_WAIT_BCON, since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) * the HC will transition to A_HOST (or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) * A_SUSPEND!) without our noticing except
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) * when HNP is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) if (isp_stat & INTR_VBUS_VLD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) isp->phy.otg->state = OTG_STATE_A_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) case OTG_STATE_A_WAIT_VFALL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) if (!(isp_stat & INTR_SESS_VLD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) a_idle(isp, "vfell");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) if (!(isp_stat & INTR_VBUS_VLD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) isp->phy.otg->state = OTG_STATE_A_VBUS_ERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) case OTG_STATE_B_PERIPHERAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) case OTG_STATE_B_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) case OTG_STATE_B_WAIT_ACON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) usb_gadget_vbus_disconnect(otg->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) if (state != OTG_STATE_A_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) a_idle(isp, "id");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (otg->host && state == OTG_STATE_A_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) isp1301_defer_work(isp, WORK_HOST_RESUME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) isp_bstat = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) /* if user unplugged mini-A end of cable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) * don't bypass A_WAIT_VFALL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) if (otg->default_a) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) isp->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) case OTG_STATE_A_WAIT_VFALL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) state = OTG_STATE_A_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) /* hub_wq may take a while to notice and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) * handle this disconnect, so don't go
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) * to B_IDLE quite yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) case OTG_STATE_A_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) host_suspend(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) MC1_BDIS_ACON_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) isp->phy.otg->state = OTG_STATE_B_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) l &= ~OTG_CTRL_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) omap_writel(l, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) case OTG_STATE_B_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) switch (isp->phy.otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) case OTG_STATE_B_PERIPHERAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) case OTG_STATE_B_WAIT_ACON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) case OTG_STATE_B_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) if (likely(isp_bstat & OTG_B_SESS_VLD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) enable_vbus_draw(isp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) #ifndef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) /* UDC driver will clear OTG_BSESSVLD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) OTG1_DP_PULLDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) OTG1_DP_PULLUP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) dump_regs(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) case OTG_STATE_B_SRP_INIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) b_idle(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) omap_writel(l, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) case OTG_STATE_B_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) if (otg->gadget && (isp_bstat & OTG_B_SESS_VLD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) update_otg1(isp, isp_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) update_otg2(isp, isp_bstat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) b_peripheral(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) } else if (!(isp_stat & (INTR_VBUS_VLD|INTR_SESS_VLD)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) isp_bstat |= OTG_B_SESS_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) case OTG_STATE_A_WAIT_VFALL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) pr_debug("otg: unsupported b-device %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) state_name(isp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) if (state != isp->phy.otg->state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) pr_debug(" isp, %s -> %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) usb_otg_state_string(state), state_name(isp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) /* update the OTG controller state to match the isp1301; may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) * trigger OPRT_CHG irqs for changes going to the isp1301.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) update_otg1(isp, isp_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) update_otg2(isp, isp_bstat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) check_state(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) dump_regs(isp, "isp1301->otg");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) static u8 isp1301_clear_latch(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) u8 latch = isp1301_get_u8(isp, ISP1301_INTERRUPT_LATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) isp1301_clear_bits(isp, ISP1301_INTERRUPT_LATCH, latch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) return latch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) isp1301_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) struct isp1301 *isp = container_of(work, struct isp1301, work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) int stop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) /* implicit lock: we're the only task using this device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) isp->working = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) stop = test_bit(WORK_STOP, &isp->todo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) /* transfer state from otg engine to isp1301 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) if (test_and_clear_bit(WORK_UPDATE_ISP, &isp->todo)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) otg_update_isp(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) put_device(&isp->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) /* transfer state from isp1301 to otg engine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) if (test_and_clear_bit(WORK_UPDATE_OTG, &isp->todo)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) u8 stat = isp1301_clear_latch(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) isp_update_otg(isp, stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) put_device(&isp->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) if (test_and_clear_bit(WORK_HOST_RESUME, &isp->todo)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) u32 otg_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) * skip A_WAIT_VRISE; hc transitions invisibly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) * skip A_WAIT_BCON; same.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) switch (isp->phy.otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) case OTG_STATE_A_WAIT_BCON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) case OTG_STATE_A_WAIT_VRISE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) isp->phy.otg->state = OTG_STATE_A_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) pr_debug(" --> a_host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) otg_ctrl = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) otg_ctrl |= OTG_A_BUSREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) & OTG_CTRL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) omap_writel(otg_ctrl, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) case OTG_STATE_B_WAIT_ACON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) isp->phy.otg->state = OTG_STATE_B_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) pr_debug(" --> b_host (acon)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) case OTG_STATE_B_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) case OTG_STATE_B_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) case OTG_STATE_A_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) pr_debug(" host resume in %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) state_name(isp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) host_resume(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) // mdelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) put_device(&isp->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) if (test_and_clear_bit(WORK_TIMER, &isp->todo)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) #ifdef VERBOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) dump_regs(isp, "timer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) if (!stop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) mod_timer(&isp->timer, jiffies + TIMER_JIFFIES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) put_device(&isp->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) if (isp->todo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) dev_vdbg(&isp->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) "work done, todo = 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) isp->todo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) if (stop) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) dev_dbg(&isp->client->dev, "stop\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) } while (isp->todo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) isp->working = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) static irqreturn_t isp1301_irq(int irq, void *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) isp1301_defer_work(isp, WORK_UPDATE_OTG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) static void isp1301_timer(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) struct isp1301 *isp = from_timer(isp, t, timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) isp1301_defer_work(isp, WORK_TIMER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) static void isp1301_release(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) struct isp1301 *isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) isp = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) /* FIXME -- not with a "new style" driver, it doesn't!! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) /* ugly -- i2c hijacks our memory hook to wait_for_completion() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) if (isp->i2c_release)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) isp->i2c_release(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) kfree(isp->phy.otg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) kfree (isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) static struct isp1301 *the_transceiver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) static int isp1301_remove(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) struct isp1301 *isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) isp = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) isp1301_clear_bits(isp, ISP1301_INTERRUPT_FALLING, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) isp1301_clear_bits(isp, ISP1301_INTERRUPT_RISING, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) free_irq(i2c->irq, isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) otg_unbind(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) if (machine_is_omap_h2())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) gpio_free(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) set_bit(WORK_STOP, &isp->todo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) del_timer_sync(&isp->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) flush_work(&isp->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) put_device(&i2c->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) the_transceiver = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) /* NOTE: three modes are possible here, only one of which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) * will be standards-conformant on any given system:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) * - OTG mode (dual-role), required if there's a Mini-AB connector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) * - HOST mode, for when there's one or more A (host) connectors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) * - DEVICE mode, for when there's a B/Mini-B (device) connector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) * As a rule, you won't have an isp1301 chip unless it's there to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) * support the OTG mode. Other modes help testing USB controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) * in isolation from (full) OTG support, or maybe so later board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) * revisions can help to support those feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) static int isp1301_otg_enable(struct isp1301 *isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) power_up(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) isp1301_otg_init(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) /* NOTE: since we don't change this, this provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) * a few more interrupts than are strictly needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) dev_info(&isp->client->dev, "ready for dual-role USB ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) /* add or disable the host device+driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) isp1301_set_host(struct usb_otg *otg, struct usb_bus *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) if (isp != the_transceiver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) if (!host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) omap_writew(0, OTG_IRQ_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) power_down(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) otg->host = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) otg->host = host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) dev_dbg(&isp->client->dev, "registered host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) host_suspend(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) if (otg->gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) return isp1301_otg_enable(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) #elif !IS_ENABLED(CONFIG_USB_OMAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) // FIXME update its refcount
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) otg->host = host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) power_up(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) if (machine_is_omap_h2())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) dev_info(&isp->client->dev, "A-Host sessions ok\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) INTR_ID_GND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) INTR_ID_GND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) /* If this has a Mini-AB connector, this mode is highly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) * nonstandard ... but can be handy for testing, especially with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) * the Mini-A end of an OTG cable. (Or something nonstandard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) * like MiniB-to-StandardB, maybe built with a gender mender.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_VBUS_DRV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) dump_regs(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) dev_dbg(&isp->client->dev, "host sessions not allowed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) isp1301_set_peripheral(struct usb_otg *otg, struct usb_gadget *gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) if (isp != the_transceiver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) if (!gadget) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) omap_writew(0, OTG_IRQ_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) if (!otg->default_a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) enable_vbus_draw(isp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) usb_gadget_vbus_disconnect(otg->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) otg->gadget = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) power_down(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) otg->gadget = gadget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) dev_dbg(&isp->client->dev, "registered gadget\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) /* gadget driver may be suspended until vbus_connect () */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) if (otg->host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) return isp1301_otg_enable(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) #elif !defined(CONFIG_USB_OHCI_HCD) && !defined(CONFIG_USB_OHCI_HCD_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) otg->gadget = gadget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) // FIXME update its refcount
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) l |= OTG_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) omap_writel(l, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) power_up(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) isp->phy.otg->state = OTG_STATE_B_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) if (machine_is_omap_h2() || machine_is_omap_h3())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) INTR_SESS_VLD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) INTR_VBUS_VLD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) dev_info(&isp->client->dev, "B-Peripheral sessions ok\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) dump_regs(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) /* If this has a Mini-AB connector, this mode is highly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) * nonstandard ... but can be handy for testing, so long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) * as you don't plug a Mini-A cable into the jack.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) if (isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE) & INTR_VBUS_VLD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) b_peripheral(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) dev_dbg(&isp->client->dev, "peripheral sessions not allowed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) isp1301_set_power(struct usb_phy *dev, unsigned mA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) if (!the_transceiver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) if (dev->otg->state == OTG_STATE_B_PERIPHERAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) enable_vbus_draw(the_transceiver, mA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) isp1301_start_srp(struct usb_otg *otg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) u32 otg_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) if (isp != the_transceiver || isp->phy.otg->state != OTG_STATE_B_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) otg_ctrl = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) if (!(otg_ctrl & OTG_BSESSEND))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) otg_ctrl |= OTG_B_BUSREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) omap_writel(otg_ctrl, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) isp->phy.otg->state = OTG_STATE_B_SRP_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) pr_debug("otg: SRP, %s ... %06x\n", state_name(isp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) omap_readl(OTG_CTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) check_state(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) isp1301_start_hnp(struct usb_otg *otg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) if (isp != the_transceiver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) if (otg->default_a && (otg->host == NULL || !otg->host->b_hnp_enable))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) return -ENOTCONN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) if (!otg->default_a && (otg->gadget == NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) || !otg->gadget->b_hnp_enable))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) return -ENOTCONN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) /* We want hardware to manage most HNP protocol timings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) * So do this part as early as possible...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) switch (isp->phy.otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) case OTG_STATE_B_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) isp->phy.otg->state = OTG_STATE_B_PERIPHERAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) /* caller will suspend next */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) case OTG_STATE_A_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) /* autoconnect mode avoids irq latency bugs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) MC1_BDIS_ACON_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) /* caller must suspend then clear A_BUSREQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) usb_gadget_vbus_connect(otg->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) l = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) l |= OTG_A_SETB_HNPEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) omap_writel(l, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) case OTG_STATE_A_PERIPHERAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) /* initiated by B-Host suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) return -EILSEQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) pr_debug("otg: HNP %s, %06x ...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) state_name(isp), omap_readl(OTG_CTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) check_state(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) /* srp-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) isp1301_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) struct isp1301 *isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) if (the_transceiver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) isp = kzalloc(sizeof *isp, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) if (!isp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) isp->phy.otg = kzalloc(sizeof *isp->phy.otg, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) if (!isp->phy.otg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) kfree(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) INIT_WORK(&isp->work, isp1301_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) timer_setup(&isp->timer, isp1301_timer, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) i2c_set_clientdata(i2c, isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) isp->client = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) /* verify the chip (shouldn't be necessary) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) status = isp1301_get_u16(isp, ISP1301_VENDOR_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) if (status != I2C_VENDOR_ID_PHILIPS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) dev_dbg(&i2c->dev, "not philips id: %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) status = isp1301_get_u16(isp, ISP1301_PRODUCT_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) if (status != I2C_PRODUCT_ID_PHILIPS_1301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) dev_dbg(&i2c->dev, "not isp1301, %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) isp->i2c_release = i2c->dev.release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) i2c->dev.release = isp1301_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) /* initial development used chiprev 2.00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) status = i2c_smbus_read_word_data(i2c, ISP1301_BCD_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) dev_info(&i2c->dev, "chiprev %x.%02x, driver " DRIVER_VERSION "\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) status >> 8, status & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) /* make like power-on reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_BI_DI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, ~MC2_BI_DI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) ~(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) isp1301_clear_bits(isp, ISP1301_INTERRUPT_LATCH, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) isp1301_clear_bits(isp, ISP1301_INTERRUPT_FALLING, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) isp1301_clear_bits(isp, ISP1301_INTERRUPT_RISING, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) status = otg_bind(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) dev_dbg(&i2c->dev, "can't bind OTG\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) if (machine_is_omap_h2()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) /* full speed signaling by default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) MC1_SPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) MC2_SPD_SUSP_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) /* IRQ wired at M14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) omap_cfg_reg(M14_1510_GPIO2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) if (gpio_request(2, "isp1301") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) gpio_direction_input(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) isp->irq_type = IRQF_TRIGGER_FALLING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) status = request_irq(i2c->irq, isp1301_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) isp->irq_type, DRIVER_NAME, isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) dev_dbg(&i2c->dev, "can't get IRQ %d, err %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) i2c->irq, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) isp->phy.dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) isp->phy.label = DRIVER_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) isp->phy.set_power = isp1301_set_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) isp->phy.otg->usb_phy = &isp->phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) isp->phy.otg->set_host = isp1301_set_host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) isp->phy.otg->set_peripheral = isp1301_set_peripheral,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) isp->phy.otg->start_srp = isp1301_start_srp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) isp->phy.otg->start_hnp = isp1301_start_hnp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) enable_vbus_draw(isp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) power_down(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) the_transceiver = isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) dump_regs(isp, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) #ifdef VERBOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) mod_timer(&isp->timer, jiffies + TIMER_JIFFIES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) dev_dbg(&i2c->dev, "scheduled timer, %d min\n", TIMER_MINUTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) status = usb_add_phy(&isp->phy, USB_PHY_TYPE_USB2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) dev_err(&i2c->dev, "can't register transceiver, %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) kfree(isp->phy.otg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) kfree(isp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) static const struct i2c_device_id isp1301_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) { "isp1301_omap", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) MODULE_DEVICE_TABLE(i2c, isp1301_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) static struct i2c_driver isp1301_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) .name = "isp1301_omap",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) .probe = isp1301_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) .remove = isp1301_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) .id_table = isp1301_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) static int __init isp_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) return i2c_add_driver(&isp1301_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) subsys_initcall(isp_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) static void __exit isp_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) if (the_transceiver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) usb_remove_phy(&the_transceiver->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) i2c_del_driver(&isp1301_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) module_exit(isp_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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