Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2005-2007 by Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Some code has been taken from tusb6010.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyrights for that are attributable to:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2006 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Tony Lindgren <tony@atomide.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * This file is part of the Inventra Controller Driver for Linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/usb/musb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/phy/omap_control_phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include "musb_core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include "omap2430.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) struct omap2430_glue {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct device		*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	struct platform_device	*musb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	enum musb_vbus_id_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct work_struct	omap_musb_mailbox_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct device		*control_otghs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define glue_to_musb(g)		platform_get_drvdata(g->musb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static struct omap2430_glue	*_glue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static inline void omap2430_low_level_exit(struct musb *musb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	/* in any role */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	l |= ENABLEFORCE;	/* enable MSTANDBY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static inline void omap2430_low_level_init(struct musb *musb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	l &= ~ENABLEFORCE;	/* disable MSTANDBY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static int omap2430_musb_mailbox(enum musb_vbus_id_status status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct omap2430_glue	*glue = _glue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	if (!glue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		pr_err("%s: musb core is not yet initialized\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	glue->status = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (!glue_to_musb(glue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		pr_err("%s: musb core is not yet ready\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	schedule_work(&glue->omap_musb_mailbox_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * HDRC controls CPEN, but beware current surges during device connect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  * They can trigger transient overcurrent conditions that must be ignored.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  * Note that we're skipping A_WAIT_VFALL -> A_IDLE and jumping right to B_IDLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  * as set by musb_set_peripheral().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static void omap_musb_set_mailbox(struct omap2430_glue *glue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	struct musb *musb = glue_to_musb(glue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	pm_runtime_get_sync(musb->controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	dev_dbg(musb->controller, "VBUS %s, devctl %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		usb_otg_state_string(musb->xceiv->otg->state),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		musb_readb(musb->mregs, MUSB_DEVCTL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	switch (glue->status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	case MUSB_ID_GROUND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		dev_dbg(musb->controller, "ID GND\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		switch (musb->xceiv->otg->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		case OTG_STATE_A_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			error = musb_set_host(musb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		case OTG_STATE_A_WAIT_VRISE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		case OTG_STATE_A_WAIT_BCON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		case OTG_STATE_A_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			 * On multiple ID ground interrupts just keep enabling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			 * VBUS. At least cpcap VBUS shuts down otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			otg_set_vbus(musb->xceiv->otg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			musb->xceiv->otg->state = OTG_STATE_A_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			musb->xceiv->last_event = USB_EVENT_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			if (musb->gadget_driver) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 				omap_control_usb_set_mode(glue->control_otghs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 							  USB_MODE_HOST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 				otg_set_vbus(musb->xceiv->otg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	case MUSB_VBUS_VALID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		dev_dbg(musb->controller, "VBUS Connect\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		musb->xceiv->otg->state = OTG_STATE_B_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		musb->xceiv->last_event = USB_EVENT_VBUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		omap_control_usb_set_mode(glue->control_otghs, USB_MODE_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	case MUSB_ID_FLOAT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	case MUSB_VBUS_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		dev_dbg(musb->controller, "VBUS Disconnect\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		musb->xceiv->last_event = USB_EVENT_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		musb_set_peripheral(musb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		otg_set_vbus(musb->xceiv->otg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		omap_control_usb_set_mode(glue->control_otghs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			USB_MODE_DISCONNECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		dev_dbg(musb->controller, "ID float\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	pm_runtime_mark_last_busy(musb->controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	pm_runtime_put_autosuspend(musb->controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	atomic_notifier_call_chain(&musb->xceiv->notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			musb->xceiv->last_event, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	struct omap2430_glue *glue = container_of(mailbox_work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 				struct omap2430_glue, omap_musb_mailbox_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	omap_musb_set_mailbox(glue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	unsigned long   flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	irqreturn_t     retval = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	struct musb     *musb = __hci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	spin_lock_irqsave(&musb->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	if (musb->int_usb || musb->int_tx || musb->int_rx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		retval = musb_interrupt(musb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	spin_unlock_irqrestore(&musb->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static int omap2430_musb_init(struct musb *musb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	struct device *dev = musb->controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	struct musb_hdrc_platform_data *plat = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	struct omap_musb_board_data *data = plat->board_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	/* We require some kind of external transceiver, hooked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	 * up through ULPI.  TWL4030-family PMICs include one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	 * which needs a driver, drivers aren't always needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	musb->phy = devm_phy_get(dev->parent, "usb2-phy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	/* We can't totally remove musb->xceiv as of now because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	 * musb core uses xceiv.state and xceiv.otg. Once we have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	 * a separate state machine to handle otg, these can be moved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	 * out of xceiv and then we can start using the generic PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	 * framework
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "usb-phy", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	if (IS_ERR(musb->xceiv)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		status = PTR_ERR(musb->xceiv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		if (status == -ENXIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		dev_dbg(dev, "HS USB OTG: no transceiver configured\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (IS_ERR(musb->phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		dev_err(dev, "HS USB OTG: no PHY configured\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		return PTR_ERR(musb->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	musb->isr = omap2430_musb_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	phy_init(musb->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	phy_power_on(musb->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	l = musb_readl(musb->mregs, OTG_INTERFSEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (data->interface_type == MUSB_INTERFACE_UTMI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		/* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		l &= ~ULPI_12PIN;       /* Disable ULPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		l |= UTMI_8BIT;         /* Enable UTMI  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		l |= ULPI_12PIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	musb_writel(musb->mregs, OTG_INTERFSEL, l);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	dev_dbg(dev, "HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			"sysstatus 0x%x, intrfsel 0x%x, simenable  0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			musb_readl(musb->mregs, OTG_REVISION),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			musb_readl(musb->mregs, OTG_SYSCONFIG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			musb_readl(musb->mregs, OTG_SYSSTATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			musb_readl(musb->mregs, OTG_INTERFSEL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			musb_readl(musb->mregs, OTG_SIMENABLE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static void omap2430_musb_enable(struct musb *musb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	struct device *dev = musb->controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	if (glue->status == MUSB_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		glue->status = MUSB_VBUS_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	omap_musb_set_mailbox(glue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static void omap2430_musb_disable(struct musb *musb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	struct device *dev = musb->controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	if (glue->status != MUSB_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		omap_control_usb_set_mode(glue->control_otghs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			USB_MODE_DISCONNECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int omap2430_musb_exit(struct musb *musb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	struct device *dev = musb->controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	omap2430_low_level_exit(musb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	phy_power_off(musb->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	phy_exit(musb->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	musb->phy = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	cancel_work_sync(&glue->omap_musb_mailbox_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static const struct musb_platform_ops omap2430_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	.quirks		= MUSB_DMA_INVENTRA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #ifdef CONFIG_USB_INVENTRA_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	.dma_init	= musbhs_dma_controller_create,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	.dma_exit	= musbhs_dma_controller_destroy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	.init		= omap2430_musb_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	.exit		= omap2430_musb_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	.enable		= omap2430_musb_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	.disable	= omap2430_musb_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	.phy_callback	= omap2430_musb_mailbox,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static u64 omap2430_dmamask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static int omap2430_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	struct resource			musb_resources[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	struct musb_hdrc_platform_data	*pdata = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	struct omap_musb_board_data	*data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	struct platform_device		*musb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	struct omap2430_glue		*glue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	struct device_node		*np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	struct musb_hdrc_config		*config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	struct device_node		*control_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	struct platform_device		*control_pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	int				ret = -ENOMEM, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	if (!glue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		goto err0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	if (!musb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		dev_err(&pdev->dev, "failed to allocate musb device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		goto err0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	musb->dev.parent		= &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	musb->dev.dma_mask		= &omap2430_dmamask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	musb->dev.coherent_dma_mask	= omap2430_dmamask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	glue->dev			= &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	glue->musb			= musb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	glue->status			= MUSB_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	glue->control_otghs = ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	if (!config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	of_property_read_u32(np, "mode", (u32 *)&pdata->mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	of_property_read_u32(np, "interface-type",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 			(u32 *)&data->interface_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	of_property_read_u32(np, "power", (u32 *)&pdata->power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	ret = of_property_read_u32(np, "multipoint", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	if (!ret && val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		config->multipoint = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	pdata->board_data	= data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	pdata->config		= config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	control_node = of_parse_phandle(np, "ctrl-module", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	if (control_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		control_pdev = of_find_device_by_node(control_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		if (!control_pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 			dev_err(&pdev->dev, "Failed to get control device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 			ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 			goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		glue->control_otghs = &control_pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	pdata->platform_ops		= &omap2430_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	platform_set_drvdata(pdev, glue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	 * REVISIT if we ever have two instances of the wrapper, we will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	 * in big trouble
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	_glue	= glue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	INIT_WORK(&glue->omap_musb_mailbox_work, omap_musb_mailbox_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	memset(musb_resources, 0x00, sizeof(*musb_resources) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 			ARRAY_SIZE(musb_resources));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	musb_resources[0].name = pdev->resource[0].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	musb_resources[0].start = pdev->resource[0].start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	musb_resources[0].end = pdev->resource[0].end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	musb_resources[0].flags = pdev->resource[0].flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	musb_resources[1].name = pdev->resource[1].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	musb_resources[1].start = pdev->resource[1].start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	musb_resources[1].end = pdev->resource[1].end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	musb_resources[1].flags = pdev->resource[1].flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	musb_resources[2].name = pdev->resource[2].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	musb_resources[2].start = pdev->resource[2].start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	musb_resources[2].end = pdev->resource[2].end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	musb_resources[2].flags = pdev->resource[2].flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	ret = platform_device_add_resources(musb, musb_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 			ARRAY_SIZE(musb_resources));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		dev_err(&pdev->dev, "failed to add resources\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 		goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		dev_err(&pdev->dev, "failed to add platform_data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	pm_runtime_enable(glue->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	ret = platform_device_add(musb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		dev_err(&pdev->dev, "failed to register musb device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 		goto err3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) err3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	pm_runtime_disable(glue->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) err2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	platform_device_put(musb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) err0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static int omap2430_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	struct omap2430_glue *glue = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	platform_device_unregister(glue->musb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	pm_runtime_disable(glue->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int omap2430_runtime_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	struct omap2430_glue		*glue = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	struct musb			*musb = glue_to_musb(glue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	if (!musb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	musb->context.otg_interfsel = musb_readl(musb->mregs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 						 OTG_INTERFSEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	omap2430_low_level_exit(musb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	phy_power_off(musb->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	phy_exit(musb->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static int omap2430_runtime_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	struct omap2430_glue		*glue = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	struct musb			*musb = glue_to_musb(glue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	if (!musb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	phy_init(musb->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	phy_power_on(musb->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	omap2430_low_level_init(musb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	musb_writel(musb->mregs, OTG_INTERFSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 		    musb->context.otg_interfsel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	/* Wait for musb to get oriented. Otherwise we can get babble */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	usleep_range(200000, 250000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static const struct dev_pm_ops omap2430_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	.runtime_suspend = omap2430_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	.runtime_resume = omap2430_runtime_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) #define DEV_PM_OPS	(&omap2430_pm_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) #define DEV_PM_OPS	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static const struct of_device_id omap2430_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 		.compatible = "ti,omap4-musb"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 		.compatible = "ti,omap3-musb"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) MODULE_DEVICE_TABLE(of, omap2430_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static struct platform_driver omap2430_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	.probe		= omap2430_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	.remove		= omap2430_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 		.name	= "musb-omap2430",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 		.pm	= DEV_PM_OPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 		.of_match_table = of_match_ptr(omap2430_id_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) module_platform_driver(omap2430_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) MODULE_LICENSE("GPL v2");