^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2015 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Zhigang.Wei <zhigang.wei@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Chunfeng.Yun <chunfeng.yun@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "xhci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "xhci-mtk.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SSP_BW_BOUNDARY 130000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define SS_BW_BOUNDARY 51000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define HS_BW_BOUNDARY 6144
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* usb2 spec section11.18.1: at most 188 FS bytes per microframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define FS_PAYLOAD_MAX 188
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * max number of microframes for split transfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * for fs isoc in : 1 ss + 1 idle + 7 cs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define TT_MICROFRAMES_MAX 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DBG_BUF_EN 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* schedule error type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define ESCH_SS_Y6 1001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define ESCH_SS_OVERLAP 1002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ESCH_CS_OVERFLOW 1003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define ESCH_BW_OVERFLOW 1004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define ESCH_FIXME 1005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* mtk scheduler bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define EP_BPKTS(p) ((p) & 0x7f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define EP_BCSCOUNT(p) (((p) & 0x7) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define EP_BBM(p) ((p) << 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define EP_BOFFSET(p) ((p) & 0x3fff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define EP_BREPEAT(p) (((p) & 0x7fff) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static char *sch_error_string(int err_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) switch (err_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) case ESCH_SS_Y6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return "Can't schedule Start-Split in Y6";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) case ESCH_SS_OVERLAP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return "Can't find a suitable Start-Split location";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) case ESCH_CS_OVERFLOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return "The last Complete-Split is greater than 7";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) case ESCH_BW_OVERFLOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return "Bandwidth exceeds the maximum limit";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) case ESCH_FIXME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return "FIXME, to be resolved";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return "Unknown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int is_fs_or_ls(enum usb_device_speed speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static const char *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) decode_ep(struct usb_host_endpoint *ep, enum usb_device_speed speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static char buf[DBG_BUF_EN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct usb_endpoint_descriptor *epd = &ep->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned int interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) const char *unit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) interval = usb_decode_interval(epd, speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (interval % 1000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unit = "us";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unit = "ms";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) interval /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) snprintf(buf, DBG_BUF_EN, "%s ep%d%s %s, mpkt:%d, interval:%d/%d%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) usb_speed_string(speed), usb_endpoint_num(epd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) usb_endpoint_dir_in(epd) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) usb_ep_type_string(usb_endpoint_type(epd)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) usb_endpoint_maxp(epd), epd->bInterval, interval, unit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static u32 get_bw_boundary(enum usb_device_speed speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) u32 boundary;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) switch (speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case USB_SPEED_SUPER_PLUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) boundary = SSP_BW_BOUNDARY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) case USB_SPEED_SUPER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) boundary = SS_BW_BOUNDARY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) boundary = HS_BW_BOUNDARY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return boundary;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * get the bandwidth domain which @ep belongs to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * the bandwidth domain array is saved to @sch_array of struct xhci_hcd_mtk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * each HS root port is treated as a single bandwidth domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * but each SS root port is treated as two bandwidth domains, one for IN eps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * one for OUT eps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * @real_port value is defined as follow according to xHCI spec:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * 1 for SSport0, ..., N+1 for SSportN, N+2 for HSport0, N+3 for HSport1, etc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * so the bandwidth domain array is organized as follow for simplification:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * SSport0-OUT, SSport0-IN, ..., SSportX-OUT, SSportX-IN, HSport0, ..., HSportY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static struct mu3h_sch_bw_info *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) get_bw_info(struct xhci_hcd_mtk *mtk, struct usb_device *udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct usb_host_endpoint *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct xhci_virt_device *virt_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int bw_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) virt_dev = xhci->devs[udev->slot_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (udev->speed >= USB_SPEED_SUPER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (usb_endpoint_dir_out(&ep->desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) bw_index = (virt_dev->real_port - 1) * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) bw_index = (virt_dev->real_port - 1) * 2 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* add one more for each SS port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) bw_index = virt_dev->real_port + xhci->usb3_rhub.num_ports - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return &mtk->sch_array[bw_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static u32 get_esit(struct xhci_ep_ctx *ep_ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u32 esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) esit = 1 << CTX_TO_EP_INTERVAL(le32_to_cpu(ep_ctx->ep_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (esit > XHCI_MTK_MAX_ESIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) esit = XHCI_MTK_MAX_ESIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static struct mu3h_sch_tt *find_tt(struct usb_device *udev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct usb_tt *utt = udev->tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct mu3h_sch_tt *tt, **tt_index, **ptt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) bool allocated_index = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (!utt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return NULL; /* Not below a TT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * Find/create our data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * For hubs with a single TT, we get it directly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * For hubs with multiple TTs, there's an extra level of pointers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) tt_index = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (utt->multi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) tt_index = utt->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (!tt_index) { /* Create the index array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) tt_index = kcalloc(utt->hub->maxchild,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) sizeof(*tt_index), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (!tt_index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) utt->hcpriv = tt_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) allocated_index = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ptt = &tt_index[udev->ttport - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ptt = (struct mu3h_sch_tt **) &utt->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) tt = *ptt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (!tt) { /* Create the mu3h_sch_tt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) tt = kzalloc(sizeof(*tt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (!tt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (allocated_index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) utt->hcpriv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) kfree(tt_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) INIT_LIST_HEAD(&tt->ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) *ptt = tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* Release the TT above udev, if it's not in use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static void drop_tt(struct usb_device *udev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct usb_tt *utt = udev->tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct mu3h_sch_tt *tt, **tt_index, **ptt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int i, cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (!utt || !utt->hcpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return; /* Not below a TT, or never allocated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (utt->multi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) tt_index = utt->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ptt = &tt_index[udev->ttport - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* How many entries are left in tt_index? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) for (i = 0; i < utt->hub->maxchild; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) cnt += !!tt_index[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) tt_index = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ptt = (struct mu3h_sch_tt **)&utt->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) tt = *ptt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (!tt || !list_empty(&tt->ep_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return; /* never allocated , or still in use*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) *ptt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) kfree(tt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (cnt == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) utt->hcpriv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) kfree(tt_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static struct mu3h_sch_ep_info *create_sch_ep(struct usb_device *udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct usb_host_endpoint *ep, struct xhci_ep_ctx *ep_ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct mu3h_sch_ep_info *sch_ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct mu3h_sch_tt *tt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u32 len_bw_budget_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) size_t mem_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (is_fs_or_ls(udev->speed))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) len_bw_budget_table = TT_MICROFRAMES_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) else if ((udev->speed >= USB_SPEED_SUPER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) && usb_endpoint_xfer_isoc(&ep->desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) len_bw_budget_table = get_esit(ep_ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) len_bw_budget_table = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) mem_size = sizeof(struct mu3h_sch_ep_info) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) len_bw_budget_table * sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) sch_ep = kzalloc(mem_size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (!sch_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (is_fs_or_ls(udev->speed)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) tt = find_tt(udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (IS_ERR(tt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) kfree(sch_ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) sch_ep->sch_tt = tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) sch_ep->ep = ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) sch_ep->speed = udev->speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) INIT_LIST_HEAD(&sch_ep->endpoint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) INIT_LIST_HEAD(&sch_ep->tt_endpoint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return sch_ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static void setup_sch_info(struct xhci_ep_ctx *ep_ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct mu3h_sch_ep_info *sch_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) u32 ep_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) u32 maxpkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) u32 max_burst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) u32 mult;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) u32 esit_pkts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u32 max_esit_payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u32 *bwb_table = sch_ep->bw_budget_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) maxpkt = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) max_burst = CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx->ep_info2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) mult = CTX_TO_EP_MULT(le32_to_cpu(ep_ctx->ep_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) max_esit_payload =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) (CTX_TO_MAX_ESIT_PAYLOAD_HI(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) le32_to_cpu(ep_ctx->ep_info)) << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) CTX_TO_MAX_ESIT_PAYLOAD(le32_to_cpu(ep_ctx->tx_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) sch_ep->esit = get_esit(ep_ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) sch_ep->ep_type = ep_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) sch_ep->maxpkt = maxpkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) sch_ep->offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) sch_ep->burst_mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) sch_ep->repeat = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (sch_ep->speed == USB_SPEED_HIGH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) sch_ep->cs_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * usb_20 spec section5.9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * a single microframe is enough for HS synchromous endpoints
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * in a interval
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) sch_ep->num_budget_microframes = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * xHCI spec section6.2.3.4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * @max_burst is the number of additional transactions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * opportunities per microframe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) sch_ep->pkts = max_burst + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) bwb_table[0] = sch_ep->bw_cost_per_microframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) } else if (sch_ep->speed >= USB_SPEED_SUPER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /* usb3_r1 spec section4.4.7 & 4.4.8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) sch_ep->cs_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) sch_ep->burst_mode = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * some device's (d)wBytesPerInterval is set as 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * then max_esit_payload is 0, so evaluate esit_pkts from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * mult and burst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) esit_pkts = DIV_ROUND_UP(max_esit_payload, maxpkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (esit_pkts == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) esit_pkts = (mult + 1) * (max_burst + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) sch_ep->pkts = esit_pkts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) sch_ep->num_budget_microframes = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) bwb_table[0] = maxpkt * sch_ep->pkts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (sch_ep->esit == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) sch_ep->pkts = esit_pkts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) else if (esit_pkts <= sch_ep->esit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) sch_ep->pkts = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) sch_ep->pkts = roundup_pow_of_two(esit_pkts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) / sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) sch_ep->num_budget_microframes =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) DIV_ROUND_UP(esit_pkts, sch_ep->pkts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) sch_ep->repeat = !!(sch_ep->num_budget_microframes > 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) for (i = 0; i < sch_ep->num_budget_microframes - 1; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) bwb_table[i] = sch_ep->bw_cost_per_microframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) /* last one <= bw_cost_per_microframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) bwb_table[i] = maxpkt * esit_pkts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) - i * sch_ep->bw_cost_per_microframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) } else if (is_fs_or_ls(sch_ep->speed)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) sch_ep->pkts = 1; /* at most one packet for each microframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * num_budget_microframes and cs_count will be updated when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * check TT for INT_OUT_EP, ISOC/INT_IN_EP type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) sch_ep->cs_count = DIV_ROUND_UP(maxpkt, FS_PAYLOAD_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) sch_ep->num_budget_microframes = sch_ep->cs_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) sch_ep->bw_cost_per_microframe =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) (maxpkt < FS_PAYLOAD_MAX) ? maxpkt : FS_PAYLOAD_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /* init budget table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (ep_type == ISOC_OUT_EP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) for (i = 0; i < sch_ep->num_budget_microframes; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) bwb_table[i] = sch_ep->bw_cost_per_microframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) } else if (ep_type == INT_OUT_EP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /* only first one consumes bandwidth, others as zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) bwb_table[0] = sch_ep->bw_cost_per_microframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) } else { /* INT_IN_EP or ISOC_IN_EP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) bwb_table[0] = 0; /* start split */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) bwb_table[1] = 0; /* idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * due to cs_count will be updated according to cs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * position, assign all remainder budget array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * elements as @bw_cost_per_microframe, but only first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * @num_budget_microframes elements will be used later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) for (i = 2; i < TT_MICROFRAMES_MAX; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) bwb_table[i] = sch_ep->bw_cost_per_microframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /* Get maximum bandwidth when we schedule at offset slot. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) struct mu3h_sch_ep_info *sch_ep, u32 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) u32 num_esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) u32 max_bw = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) u32 bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) for (i = 0; i < num_esit; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) u32 base = offset + i * sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) for (j = 0; j < sch_ep->num_budget_microframes; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) bw = sch_bw->bus_bw[base + j] +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) sch_ep->bw_budget_table[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (bw > max_bw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) max_bw = bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return max_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct mu3h_sch_ep_info *sch_ep, bool used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) u32 num_esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) u32 base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) for (i = 0; i < num_esit; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) base = sch_ep->offset + i * sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) for (j = 0; j < sch_ep->num_budget_microframes; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) sch_bw->bus_bw[base + j] +=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) sch_ep->bw_budget_table[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) sch_bw->bus_bw[base + j] -=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) sch_ep->bw_budget_table[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct mu3h_sch_tt *tt = sch_ep->sch_tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) u32 num_esit, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) int base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) for (i = 0; i < num_esit; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) base = offset + i * sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * Compared with hs bus, no matter what ep type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * the hub will always delay one uframe to send data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) for (j = 0; j < sch_ep->cs_count; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) tmp = tt->fs_bus_bw[base + j] + sch_ep->bw_cost_per_microframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) if (tmp > FS_PAYLOAD_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return -ESCH_BW_OVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static int check_sch_tt(struct mu3h_sch_ep_info *sch_ep, u32 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) struct mu3h_sch_tt *tt = sch_ep->sch_tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) u32 extra_cs_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) u32 start_ss, last_ss;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u32 start_cs, last_cs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) start_ss = offset % 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (sch_ep->ep_type == ISOC_OUT_EP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) last_ss = start_ss + sch_ep->cs_count - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * usb_20 spec section11.18:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) * must never schedule Start-Split in Y6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) if (!(start_ss == 7 || last_ss < 6))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) return -ESCH_SS_Y6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) for (i = 0; i < sch_ep->cs_count; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (test_bit(offset + i, tt->ss_bit_map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return -ESCH_SS_OVERLAP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) u32 cs_count = DIV_ROUND_UP(sch_ep->maxpkt, FS_PAYLOAD_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) * usb_20 spec section11.18:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) * must never schedule Start-Split in Y6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (start_ss == 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return -ESCH_SS_Y6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) /* one uframe for ss + one uframe for idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) start_cs = (start_ss + 2) % 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) last_cs = start_cs + cs_count - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (last_cs > 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return -ESCH_CS_OVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) if (sch_ep->ep_type == ISOC_IN_EP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) extra_cs_count = (last_cs == 7) ? 1 : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) else /* ep_type : INTR IN / INTR OUT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) extra_cs_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) cs_count += extra_cs_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (cs_count > 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) cs_count = 7; /* HW limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) if (test_bit(offset, tt->ss_bit_map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) return -ESCH_SS_OVERLAP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) sch_ep->cs_count = cs_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) /* one for ss, the other for idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) sch_ep->num_budget_microframes = cs_count + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) * if interval=1, maxp >752, num_budge_micoframe is larger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) * than sch_ep->esit, will overstep boundary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (sch_ep->num_budget_microframes > sch_ep->esit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) sch_ep->num_budget_microframes = sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return check_fs_bus_bw(sch_ep, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static void update_sch_tt(struct mu3h_sch_ep_info *sch_ep, bool used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) struct mu3h_sch_tt *tt = sch_ep->sch_tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) u32 base, num_esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) int bw_updated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) int bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) bits = (sch_ep->ep_type == ISOC_OUT_EP) ? sch_ep->cs_count : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) bw_updated = sch_ep->bw_cost_per_microframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) bw_updated = -sch_ep->bw_cost_per_microframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) for (i = 0; i < num_esit; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) base = sch_ep->offset + i * sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) for (j = 0; j < bits; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) if (used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) set_bit(base + j, tt->ss_bit_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) clear_bit(base + j, tt->ss_bit_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) for (j = 0; j < sch_ep->cs_count; j++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) tt->fs_bus_bw[base + j] += bw_updated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) list_add_tail(&sch_ep->tt_endpoint, &tt->ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) list_del(&sch_ep->tt_endpoint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static int load_ep_bw(struct mu3h_sch_bw_info *sch_bw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) struct mu3h_sch_ep_info *sch_ep, bool loaded)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (sch_ep->sch_tt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) update_sch_tt(sch_ep, loaded);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* update bus bandwidth info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) update_bus_bw(sch_bw, sch_ep, loaded);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) sch_ep->allocated = loaded;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) static u32 get_esit_boundary(struct mu3h_sch_ep_info *sch_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) u32 boundary = sch_ep->esit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) if (sch_ep->sch_tt) { /* LS/FS with TT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * tune for CS, normally esit >= 8 for FS/LS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * not add one for other types to avoid access array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) * out of boundary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (sch_ep->ep_type == ISOC_OUT_EP && boundary > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) boundary--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return boundary;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static int check_sch_bw(struct mu3h_sch_bw_info *sch_bw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) struct mu3h_sch_ep_info *sch_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) u32 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) u32 min_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) u32 min_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) u32 worst_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) u32 bw_boundary;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) u32 esit_boundary;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) u32 min_num_budget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) u32 min_cs_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * Search through all possible schedule microframes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * and find a microframe where its worst bandwidth is minimum.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) min_bw = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) min_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) min_cs_count = sch_ep->cs_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) min_num_budget = sch_ep->num_budget_microframes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) esit_boundary = get_esit_boundary(sch_ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) for (offset = 0; offset < sch_ep->esit; offset++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) if (sch_ep->sch_tt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) ret = check_sch_tt(sch_ep, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if ((offset + sch_ep->num_budget_microframes) > esit_boundary)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) worst_bw = get_max_bw(sch_bw, sch_ep, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) if (min_bw > worst_bw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) min_bw = worst_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) min_index = offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) min_cs_count = sch_ep->cs_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) min_num_budget = sch_ep->num_budget_microframes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if (min_bw == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) bw_boundary = get_bw_boundary(sch_ep->speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) /* check bandwidth */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) if (min_bw > bw_boundary)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) return ret ? ret : -ESCH_BW_OVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) sch_ep->offset = min_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) sch_ep->cs_count = min_cs_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) sch_ep->num_budget_microframes = min_num_budget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return load_ep_bw(sch_bw, sch_ep, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) static void destroy_sch_ep(struct usb_device *udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) struct mu3h_sch_bw_info *sch_bw, struct mu3h_sch_ep_info *sch_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) /* only release ep bw check passed by check_sch_bw() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) if (sch_ep->allocated)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) load_ep_bw(sch_bw, sch_ep, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (sch_ep->sch_tt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) drop_tt(udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) list_del(&sch_ep->endpoint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) kfree(sch_ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) static bool need_bw_sch(struct usb_host_endpoint *ep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) enum usb_device_speed speed, int has_tt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) /* only for periodic endpoints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (usb_endpoint_xfer_control(&ep->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) || usb_endpoint_xfer_bulk(&ep->desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * for LS & FS periodic endpoints which its device is not behind
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) * a TT are also ignored, root-hub will schedule them directly,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) * but need set @bpkts field of endpoint context to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) if (is_fs_or_ls(speed) && !has_tt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) /* skip endpoint with zero maxpkt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (usb_endpoint_maxp(&ep->desc) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) struct mu3h_sch_bw_info *sch_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) int num_usb_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /* ss IN and OUT are separated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) num_usb_bus = xhci->usb3_rhub.num_ports * 2 + xhci->usb2_rhub.num_ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) sch_array = kcalloc(num_usb_bus, sizeof(*sch_array), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) if (sch_array == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) for (i = 0; i < num_usb_bus; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) INIT_LIST_HEAD(&sch_array[i].bw_ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) mtk->sch_array = sch_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) INIT_LIST_HEAD(&mtk->bw_ep_chk_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) kfree(mtk->sch_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) static int add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) struct usb_host_endpoint *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) struct xhci_hcd *xhci = hcd_to_xhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) struct xhci_ep_ctx *ep_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) struct xhci_virt_device *virt_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) struct mu3h_sch_ep_info *sch_ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) unsigned int ep_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) virt_dev = xhci->devs[udev->slot_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ep_index = xhci_get_endpoint_index(&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) xhci_dbg(xhci, "%s %s\n", __func__, decode_ep(ep, udev->speed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) if (!need_bw_sch(ep, udev->speed, !!virt_dev->tt_info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) * set @bpkts to 1 if it is LS or FS periodic endpoint, and its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * device does not connected through an external HS hub
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (usb_endpoint_xfer_int(&ep->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) || usb_endpoint_xfer_isoc(&ep->desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) sch_ep = create_sch_ep(udev, ep, ep_ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) if (IS_ERR_OR_NULL(sch_ep))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) setup_sch_info(ep_ctx, sch_ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) list_add_tail(&sch_ep->endpoint, &mtk->bw_ep_chk_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) static void drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) struct usb_host_endpoint *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) struct xhci_hcd *xhci = hcd_to_xhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) struct xhci_virt_device *virt_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) struct mu3h_sch_bw_info *sch_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) struct mu3h_sch_ep_info *sch_ep, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) virt_dev = xhci->devs[udev->slot_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) xhci_dbg(xhci, "%s %s\n", __func__, decode_ep(ep, udev->speed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (!need_bw_sch(ep, udev->speed, !!virt_dev->tt_info))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) sch_bw = get_bw_info(mtk, udev, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) list_for_each_entry_safe(sch_ep, tmp, &sch_bw->bw_ep_list, endpoint) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) if (sch_ep->ep == ep) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) destroy_sch_ep(udev, sch_bw, sch_ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) int xhci_mtk_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) struct xhci_hcd *xhci = hcd_to_xhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) struct mu3h_sch_bw_info *sch_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) struct mu3h_sch_ep_info *sch_ep, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) xhci_dbg(xhci, "%s() udev %s\n", __func__, dev_name(&udev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) list_for_each_entry(sch_ep, &mtk->bw_ep_chk_list, endpoint) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) sch_bw = get_bw_info(mtk, udev, sch_ep->ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) ret = check_sch_bw(sch_bw, sch_ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) xhci_err(xhci, "Not enough bandwidth! (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) sch_error_string(-ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) return -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) list_for_each_entry_safe(sch_ep, tmp, &mtk->bw_ep_chk_list, endpoint) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) struct xhci_ep_ctx *ep_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) struct usb_host_endpoint *ep = sch_ep->ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) unsigned int ep_index = xhci_get_endpoint_index(&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) sch_bw = get_bw_info(mtk, udev, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) list_move_tail(&sch_ep->endpoint, &sch_bw->bw_ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(sch_ep->pkts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) | EP_BCSCOUNT(sch_ep->cs_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) | EP_BBM(sch_ep->burst_mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) ep_ctx->reserved[1] = cpu_to_le32(EP_BOFFSET(sch_ep->offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) | EP_BREPEAT(sch_ep->repeat));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) xhci_dbg(xhci, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) sch_ep->pkts, sch_ep->cs_count, sch_ep->burst_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) sch_ep->offset, sch_ep->repeat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) return xhci_check_bandwidth(hcd, udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) void xhci_mtk_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) struct xhci_hcd *xhci = hcd_to_xhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) struct mu3h_sch_bw_info *sch_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) struct mu3h_sch_ep_info *sch_ep, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) xhci_dbg(xhci, "%s() udev %s\n", __func__, dev_name(&udev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) list_for_each_entry_safe(sch_ep, tmp, &mtk->bw_ep_chk_list, endpoint) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) sch_bw = get_bw_info(mtk, udev, sch_ep->ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) destroy_sch_ep(udev, sch_bw, sch_ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) xhci_reset_bandwidth(hcd, udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) int xhci_mtk_add_ep(struct usb_hcd *hcd, struct usb_device *udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) struct usb_host_endpoint *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) ret = xhci_add_endpoint(hcd, udev, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) if (ep->hcpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) ret = add_ep_quirk(hcd, udev, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) int xhci_mtk_drop_ep(struct usb_hcd *hcd, struct usb_device *udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) struct usb_host_endpoint *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) ret = xhci_drop_endpoint(hcd, udev, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) if (ep->hcpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) drop_ep_quirk(hcd, udev, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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