^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * xHCI host controller driver for HiSilicon STB SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2017-2018 HiSilicon Co., Ltd. http://www.hisilicon.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Authors: Jianguo Sun <sunjianguo1@huawei.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/reset.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "xhci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define GTXTHRCFG 0xc108
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define GRXTHRCFG 0xc10c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define REG_GUSB2PHYCFG0 0xc200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define BIT_UTMI_8_16 BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BIT_UTMI_ULPI BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define BIT_FREECLK_EXIST BIT(30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define REG_GUSB3PIPECTL0 0xc2c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define USB3_DEEMPHASIS_MASK GENMASK(2, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define USB3_DEEMPHASIS0 BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define USB3_TX_MARGIN1 BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct xhci_hcd_histb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct usb_hcd *hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void __iomem *ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct clk *bus_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct clk *utmi_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct clk *pipe_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct clk *suspend_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct reset_control *soft_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static inline struct xhci_hcd_histb *hcd_to_histb(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return dev_get_drvdata(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int xhci_histb_config(struct xhci_hcd_histb *histb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct device_node *np = histb->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (of_property_match_string(np, "phys-names", "inno") >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* USB2 PHY chose ulpi 8bit interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) regval = readl(histb->ctrl + REG_GUSB2PHYCFG0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) regval &= ~BIT_UTMI_ULPI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) regval &= ~(BIT_UTMI_8_16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) regval &= ~BIT_FREECLK_EXIST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) writel(regval, histb->ctrl + REG_GUSB2PHYCFG0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (of_property_match_string(np, "phys-names", "combo") >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * write 0x010c0012 to GUSB3PIPECTL0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * GUSB3PIPECTL0[5:3] = 010 : Tx Margin = 900mV ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * decrease TX voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * GUSB3PIPECTL0[2:1] = 01 : Tx Deemphasis = -3.5dB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * refer to xHCI spec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) regval = readl(histb->ctrl + REG_GUSB3PIPECTL0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) regval &= ~USB3_DEEMPHASIS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) regval |= USB3_DEEMPHASIS0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) regval |= USB3_TX_MARGIN1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) writel(regval, histb->ctrl + REG_GUSB3PIPECTL0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) writel(0x23100000, histb->ctrl + GTXTHRCFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) writel(0x23100000, histb->ctrl + GRXTHRCFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static int xhci_histb_clks_get(struct xhci_hcd_histb *histb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct device *dev = histb->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) histb->bus_clk = devm_clk_get(dev, "bus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (IS_ERR(histb->bus_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) dev_err(dev, "fail to get bus clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return PTR_ERR(histb->bus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) histb->utmi_clk = devm_clk_get(dev, "utmi");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (IS_ERR(histb->utmi_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) dev_err(dev, "fail to get utmi clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return PTR_ERR(histb->utmi_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) histb->pipe_clk = devm_clk_get(dev, "pipe");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (IS_ERR(histb->pipe_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) dev_err(dev, "fail to get pipe clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return PTR_ERR(histb->pipe_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) histb->suspend_clk = devm_clk_get(dev, "suspend");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (IS_ERR(histb->suspend_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) dev_err(dev, "fail to get suspend clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return PTR_ERR(histb->suspend_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int xhci_histb_host_enable(struct xhci_hcd_histb *histb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = clk_prepare_enable(histb->bus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) dev_err(histb->dev, "failed to enable bus clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ret = clk_prepare_enable(histb->utmi_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dev_err(histb->dev, "failed to enable utmi clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) goto err_utmi_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) ret = clk_prepare_enable(histb->pipe_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) dev_err(histb->dev, "failed to enable pipe clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) goto err_pipe_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ret = clk_prepare_enable(histb->suspend_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) dev_err(histb->dev, "failed to enable suspend clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) goto err_suspend_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) reset_control_deassert(histb->soft_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) err_suspend_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) clk_disable_unprepare(histb->pipe_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) err_pipe_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) clk_disable_unprepare(histb->utmi_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) err_utmi_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) clk_disable_unprepare(histb->bus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static void xhci_histb_host_disable(struct xhci_hcd_histb *histb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) reset_control_assert(histb->soft_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) clk_disable_unprepare(histb->suspend_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) clk_disable_unprepare(histb->pipe_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) clk_disable_unprepare(histb->utmi_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) clk_disable_unprepare(histb->bus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static void xhci_histb_quirks(struct device *dev, struct xhci_hcd *xhci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * As of now platform drivers don't provide MSI support so we ensure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * here that the generic code does not try to make a pci_dev from our
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * dev struct in order to setup MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) xhci->quirks |= XHCI_PLAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* called during probe() after chip reset completes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int xhci_histb_setup(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) struct xhci_hcd_histb *histb = hcd_to_histb(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (usb_hcd_is_primary_hcd(hcd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ret = xhci_histb_config(histb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return xhci_gen_setup(hcd, xhci_histb_quirks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static const struct xhci_driver_overrides xhci_histb_overrides __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .reset = xhci_histb_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static struct hc_driver __read_mostly xhci_histb_hc_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int xhci_histb_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct xhci_hcd_histb *histb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) const struct hc_driver *driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct usb_hcd *hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct xhci_hcd *xhci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) int ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (usb_disabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) driver = &xhci_histb_hc_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) histb = devm_kzalloc(dev, sizeof(*histb), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (!histb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) histb->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) histb->ctrl = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (IS_ERR(histb->ctrl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return PTR_ERR(histb->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ret = xhci_histb_clks_get(histb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) histb->soft_reset = devm_reset_control_get(dev, "soft");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (IS_ERR(histb->soft_reset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) dev_err(dev, "failed to get soft reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return PTR_ERR(histb->soft_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) pm_runtime_get_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) device_enable_async_suspend(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* Initialize dma_mask and coherent_dma_mask to 32-bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) goto disable_pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) hcd = usb_create_hcd(driver, dev, dev_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (!hcd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) goto disable_pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) hcd->regs = histb->ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) hcd->rsrc_start = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) hcd->rsrc_len = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) histb->hcd = hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) dev_set_drvdata(hcd->self.controller, histb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ret = xhci_histb_host_enable(histb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) goto put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) xhci = hcd_to_xhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) device_wakeup_enable(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) xhci->main_hcd = hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) xhci->shared_hcd = usb_create_shared_hcd(driver, dev, dev_name(dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (!xhci->shared_hcd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) goto disable_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (device_property_read_bool(dev, "usb2-lpm-disable"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) xhci->quirks |= XHCI_HW_LPM_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (device_property_read_bool(dev, "usb3-lpm-capable"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) xhci->quirks |= XHCI_LPM_SUPPORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /* imod_interval is the interrupt moderation value in nanoseconds. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) xhci->imod_interval = 40000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) device_property_read_u32(dev, "imod-interval-ns",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) &xhci->imod_interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) goto put_usb3_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (HCC_MAX_PSA(xhci->hcc_params) >= 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) xhci->shared_hcd->can_do_streams = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) goto dealloc_usb2_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) device_enable_async_suspend(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) pm_runtime_put_noidle(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * Prevent runtime pm from being on as default, users should enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * runtime pm using power/control in sysfs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) pm_runtime_forbid(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) dealloc_usb2_hcd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) usb_remove_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) put_usb3_hcd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) usb_put_hcd(xhci->shared_hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) disable_host:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) xhci_histb_host_disable(histb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) put_hcd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) disable_pm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) pm_runtime_put_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int xhci_histb_remove(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct xhci_hcd_histb *histb = platform_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct usb_hcd *hcd = histb->hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct xhci_hcd *xhci = hcd_to_xhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct usb_hcd *shared_hcd = xhci->shared_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) xhci->xhc_state |= XHCI_STATE_REMOVING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) usb_remove_hcd(shared_hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) xhci->shared_hcd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) device_wakeup_disable(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) usb_remove_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) usb_put_hcd(shared_hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) xhci_histb_host_disable(histb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) pm_runtime_put_sync(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) pm_runtime_disable(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static int __maybe_unused xhci_histb_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) struct xhci_hcd_histb *histb = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct usb_hcd *hcd = histb->hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct xhci_hcd *xhci = hcd_to_xhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) ret = xhci_suspend(xhci, device_may_wakeup(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (!device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) xhci_histb_host_disable(histb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static int __maybe_unused xhci_histb_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) struct xhci_hcd_histb *histb = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) struct usb_hcd *hcd = histb->hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct xhci_hcd *xhci = hcd_to_xhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (!device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) xhci_histb_host_enable(histb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) return xhci_resume(xhci, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static const struct dev_pm_ops xhci_histb_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) SET_SYSTEM_SLEEP_PM_OPS(xhci_histb_suspend, xhci_histb_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &xhci_histb_pm_ops : NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static const struct of_device_id histb_xhci_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) { .compatible = "hisilicon,hi3798cv200-xhci"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) MODULE_DEVICE_TABLE(of, histb_xhci_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) static struct platform_driver histb_xhci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .probe = xhci_histb_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .remove = xhci_histb_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .name = "xhci-histb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .pm = DEV_PM_OPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .of_match_table = of_match_ptr(histb_xhci_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) MODULE_ALIAS("platform:xhci-histb");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static int __init xhci_histb_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) xhci_init_driver(&xhci_histb_hc_driver, &xhci_histb_overrides);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) return platform_driver_register(&histb_xhci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) module_init(xhci_histb_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static void __exit xhci_histb_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) platform_driver_unregister(&histb_xhci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) module_exit(xhci_histb_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) MODULE_DESCRIPTION("HiSilicon STB xHCI Host Controller Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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